JPH03174793A - Semiconductor laser - Google Patents

Semiconductor laser

Info

Publication number
JPH03174793A
JPH03174793A JP22437490A JP22437490A JPH03174793A JP H03174793 A JPH03174793 A JP H03174793A JP 22437490 A JP22437490 A JP 22437490A JP 22437490 A JP22437490 A JP 22437490A JP H03174793 A JPH03174793 A JP H03174793A
Authority
JP
Japan
Prior art keywords
layer
semiconductor
type
band width
forbidden band
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22437490A
Other languages
Japanese (ja)
Inventor
Shinji Sakano
伸治 坂野
So Otoshi
創 大歳
Naoki Kayane
茅根 直樹
Shinji Sasaki
真二 佐々木
Kazuhisa Uomi
魚見 和久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of JPH03174793A publication Critical patent/JPH03174793A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • H01S5/2275Buried mesa structure ; Striped active layer mesa created by etching

Abstract

PURPOSE:To decrease leakage current even in a high temperature state by providing a third semiconductor layer wherein P-type impurities are added and which has the forbidden band wider than that of a semiconductor substrate and prevents leakage of electrons, or a third semiconductor layer wherein N-type impurities are added and which has the forbidden band width wider than that in the semiconductor substrate and prevents holes at one part of a semiconductor layer at the periphery of a light emitting part. CONSTITUTION:A light emitting region 1 including an active layer comprising InGaAsP is formed in a stripe shape on an N-type InP substrate 2. An InGaP layer 11, an InP layer 13 and an InGaP layer 12 are sequentially laminated on the substrate 2 on both sides of the light emitting region 1. Zn as P-type impurities is added in the layer 11, and the layer 11 has the forbidden band width wider than InP. The InP layer 13 is of a P-type and has the low impurity concentration. Se as N-type impurities is added into the layer 12. Namely, a layer having the broad forbidden band width in a current block layer is made to act as a barrier layer. Impurities which impart the polarity that is opposite to the conductivity of carriers whose leakage is to be prevented are added in the layer. The barrier layer is formed of the impurity added layer. In this constitution, the decreasing effect of leakage current at high temperature is enhanced, and the high-temperature operation can be performed.

Description

【発明の詳細な説明】[Detailed description of the invention] 【産業上の利用分野】[Industrial application field]

本発明は半導体Iノーザ、更に詳しくいえば、活性層近
傍に電流ブロック層をもうけた構造の半導体レーザの構
造に関する。
The present invention relates to a semiconductor laser, and more specifically, to a semiconductor laser structure in which a current blocking layer is provided near an active layer.

【従来の技術] 半導体レーザにおいては、電流の活性層への閉じ込め、
しきい電流を低くし、発光効率を高めるために、活性層
周辺部に電流ブロック層を設ける構造が主流となってい
る。しかし、活性層以外の電流ブロック領域へ流れ込む
電流が依然として存在し、注入電流の閉じ込めが不十分
で、発光効率が低下する一つの要因となっている。また
、この漏れ電流が大きくなると素子温度が高くなり、極
端な場合は発振が停止することがある。この漏れ電流を
低減するものとして、 活性層の上下の領域以外を禁制帯幅が活性層より大きい
クラッド層で埋込み、この埋込んだ領域に逆バイアス接
合が形成され漏れ電流を少なくするようにn型基板に対
してはp型Hn型層のの結晶成長層を設ける構造の半導
体レーザが一般に知られている。しかし、逆バイアス接
合の構成では、活性層上のP型クラッド層と埋込領域の
p型層の接触があり、漏れ電流を防ぎきることができな
かった・ これに対し、活性層の」1下の領域以外の周辺の埋込領
域にFeを添加して漏れ電流を防ぐ4i#造の半導体レ
ーザが知られている(特許公告公報、特公平2−179
4.4号)。この構造においても、漏れ電流を防ぎ切る
ことはできず、埋込領域にFe添加の高抵抗層を設ける
ほかに、更に、クラッド層のInPよりも禁制帯幅が広
いTnGaP層と組み合わせた構造の半導体レーザが提
案され3 ている(アイ・イー・イー ジャーナル オブカンタム
 エレクトロニクス、第25巻の第1362から第13
68頁IEEE Journai of El−sct
ronics Vol、25 No、6pp、1362
−13681989”)。 【発明が解決しようとする課題] 上記従来の埋込領域にクラッド層よりも禁制帯幅が広い
障壁層(電流ブロックM)を設ける技術は漏れ電流の低
減にかなり有効であるが、温度上昇に伴い、高いエネル
ギーを有するキャリア(電子又は正札)の増加を生じる
とき、依然として漏れ電流を生じるという問題がある。 本発明の第1の目的は広い禁制帯幅を有する電流ブロッ
ク層の電流障壁の役割を高め、高温状態においても漏れ
電流を低くする半導体レーザを実現することである。 本発明の第2の目的は活性層領域外の漏れ込み領域への
高温状態における漏れ電流を低く押さえることにある。 更に、本発明の第3の目的は活性層上、又は、下に接す
るクラッド層への高温状態における漏れ電流を低く押さ
えることにある。 【課題を解決するための手段1 本発明は第1の目的を達成するために、広い禁制帯幅を
有する層(障壁層)を、障壁層として働かせて漏れを防
ぐ対象となるキャリアの導電性と反対の極性を与える不
純物を添加した層を付加して構成した。即ち、半導体レ
ーザの発光的周辺部に設けられた半導体層の少なくとも
一部の層として、P型の不純物が添加され半導体基板よ
りも広い禁制帯幅を有し電子の漏れを防ぐか、又は、n
型の不純物が添加され半導体基板よりも広い禁制帯幅を
有し正孔を防ぐ第3半導体層を設けて構成した。 又、第2の目的を達成するために、埋込領域に2つの導
電性を有する広い禁制帯幅を有する層(障壁層)を用い
、電子または正孔の漏れを防ぐ構成とした。 更に第3の目的を達成するために、活性層上、又は、下
のクラッド層と活性層の間に各々のクラッド層の導電性
と同じ導電性を有するように不純物を添加した広い禁制
帯幅を有する障壁層、例えばp型りラッド層の間にP型
不純物添加した障壁層を挿入して構成した。 【作用】 本発明による半導体レーザの障壁層の動作原理について
、第2図第3図及び第4図を用いて説明する。第1図は
p−n接合の接合部に広い禁制帯幅を有する障壁層を挿
入し、順バイアス(n型層側を負にバイアス)を加えた
ときの(a)障壁層に不純物を添加しない場合と、(b
)障壁層にp型の不純物を添加した場合のエネルギーバ
ンド図である。 p型の不純物を添加しない場合には、n型領域の伝導電
子が感じる障壁層のエネルギー障壁高さは接合時の伝導
帯エネルギー差ΔECである。これに対し、p型の不純
物を添加した場合(b)では、接合エネルギー差ΔEc
に更に、電価バランスによるバンドの曲がりが加わって
エネルギー差ΔEc’ となり、伝導電子に対するエネ
ルギー障壁の高さが(a)のエネルギー差ΔECより高
く一 なる。この場合、価電子帯の正孔に対する実効的なエネ
ルギー障壁は低くなるが、逆に、障壁層にn型不純物を
添加すると正孔に対する障壁が高くなる。温度が高くな
るとフェルミ デイラフの分布に従い高いエネルギを有
する伝導電子が増加し、(a)の場合、障壁高さΔEc
を超え易くなる。 これが漏れ電流となる訳であるが、P型不純物を添加す
ると(b)に示したように障壁が高くなり超え難くなる
。 前記の原理を電子だけでなく、電子と正孔の両方にに対
しても適用する場合について、第3図を用いて説明する
。 第3図にはn型InPとp型InPの接合のエネル
ギバンド図を例に、 n型InPとp型InPの間にn
型InP側からP型の障壁層、低不純物添加のp−型I
nP層、n型の障壁層を挿入し、順バイアスを加えたと
きのエネルギバンド図が示されている。n型InP中の
主キャリアである電子はp型障壁層の障壁が高く(ΔE
c’)高温状態においても障壁ΔE c’ を超えられ
ない。又、p型InPの正孔も障壁ΔE■が大きく、こ
れを超えられない。このため、電子と正孔の再結合が起
きず順バイアスにおいても高温状態で電流が流れない。 また、前記の原理を電子の流れは遮断し、正孔は通す方
法と利用について、第4図を用いて説明する。第4図に
はInGaAsP (活性層)に順バイアスを加えた状
態で、n型InF’層から電子を、p型InP層から正
孔を注入するときのエネルギバンド図が示されている。 この時の活性層とp型InP層の間に広い禁制帯幅を有
するp型の障壁層を入れると活性層に注入された電子に
対しては障壁層ΔEc’ を生じるため、p型InP層
への漏れは高温状態で防ぐことができる。同時に、障壁
層は正孔に対してはほとんど障壁層としては働かず、p
型InP層から活性層へ効率良く注入される。この構造
では正孔を活性層に注入しながら電子を効率良く活性層
に閉じ込め、p型InP層への漏れ出しを防ぐことがで
きる。更に、n型InP層と活性層の間n型の障壁層を
入れることで電子は活性層へ注入し、正孔のn型InP
層への漏れを防ぐことができ、−M活性層へのキャリア
の閉じ込めを良くし、高温での漏れ電流を防ぐことがで
きる。 この障壁層の材料は、例えばInPに対しては、格子整
合がとれるものとしてI n A n A sがあり、
整合がとれない歪み系としてはI n 1−xA Q 
xA s(X>0.48)又はInGaP、I n G
 a A sP系、あるいはII−VI族半導体が相当
する。 前記の障壁層への不純物添加の適用は、InP系に限定
されるものでなく、この原理を適用できる構造全てにあ
てはまる。
[Prior art] In semiconductor lasers, current confinement in the active layer,
In order to lower the threshold current and increase luminous efficiency, a structure in which a current blocking layer is provided around the active layer has become mainstream. However, current still flows into current blocking regions other than the active layer, and the injection current is not sufficiently confined, which is one of the causes of reduced luminous efficiency. Furthermore, when this leakage current increases, the element temperature increases, and in extreme cases, oscillation may stop. In order to reduce this leakage current, the regions other than the upper and lower regions of the active layer are buried with a cladding layer whose forbidden band width is larger than that of the active layer, and a reverse bias junction is formed in this buried region to reduce the leakage current. A semiconductor laser having a structure in which a p-type Hn-type crystal growth layer is provided on a type substrate is generally known. However, in the reverse bias junction configuration, there was contact between the P-type cladding layer on the active layer and the P-type layer in the buried region, and leakage current could not be completely prevented. A 4i# semiconductor laser is known that prevents leakage current by adding Fe to the surrounding embedded region other than the lower region (Patent Publication No. 2-179).
4.4). Even in this structure, leakage current cannot be completely prevented, and in addition to providing a Fe-doped high-resistance layer in the buried region, a structure that combines a TnGaP layer with a wider forbidden band width than InP of the cladding layer is used. Semiconductor lasers have been proposed3 (I.E. Journal of Quantum Electronics, Vol. 25, Nos. 1362 to 13).
68 pages IEEE Journey of El-sct
ronics Vol, 25 No, 6pp, 1362
-13681989"). [Problems to be Solved by the Invention] The above conventional technique of providing a barrier layer (current block M) with a wider forbidden band width than the cladding layer in the buried region is quite effective in reducing leakage current. However, when carriers with high energy (electrons or genuine cards) increase as the temperature rises, there is still a problem that leakage current occurs.The first object of the present invention is to create a current blocking layer with a wide forbidden band width It is an object of the present invention to realize a semiconductor laser that enhances the role of a current barrier and reduces leakage current even in a high temperature state.A second object of the present invention is to reduce leakage current in a high temperature state to a leakage region outside the active layer region. Furthermore, the third object of the present invention is to suppress the leakage current to the cladding layer on or below the active layer in a high temperature state. [Means for Solving the Problems 1] In order to achieve the first objective, the present invention adds an impurity to a layer having a wide forbidden band width (barrier layer) that gives it a polarity opposite to the conductivity of carriers, which acts as a barrier layer and prevents leakage. In other words, at least a part of the semiconductor layer provided in the light-emitting periphery of the semiconductor laser is doped with P-type impurities and has a forbidden band width wider than that of the semiconductor substrate. Prevent electron leakage or n
The third semiconductor layer is doped with type impurities, has a wider forbidden band width than the semiconductor substrate, and prevents holes. Furthermore, in order to achieve the second objective, a structure was adopted in which two conductive layers (barrier layers) having a wide forbidden band width were used in the buried region to prevent leakage of electrons or holes. Furthermore, in order to achieve the third objective, impurities are added between the cladding layer above or below the active layer and the active layer so that the conductivity is the same as that of each cladding layer. For example, a barrier layer doped with a P-type impurity is inserted between barrier layers having a p-type rad layer. [Operation] The operating principle of the barrier layer of the semiconductor laser according to the present invention will be explained using FIG. 2, FIG. 3, and FIG. 4. Figure 1 shows (a) impurities added to the barrier layer when a barrier layer with a wide forbidden band width is inserted into the junction of a p-n junction and a forward bias (negative bias on the n-type layer side) is applied. (b
) is an energy band diagram when p-type impurities are added to the barrier layer. When no p-type impurity is added, the energy barrier height of the barrier layer felt by conduction electrons in the n-type region is the conduction band energy difference ΔEC at the time of junction. On the other hand, in case (b) when p-type impurities are added, the junction energy difference ΔEc
In addition, band bending due to charge balance is added, resulting in an energy difference ΔEc', and the height of the energy barrier to conduction electrons is higher than the energy difference ΔEC in (a). In this case, the effective energy barrier to holes in the valence band becomes low, but conversely, when n-type impurities are added to the barrier layer, the barrier to holes becomes high. As the temperature increases, the number of conduction electrons with high energy increases according to the Fermi day rough distribution, and in the case of (a), the barrier height ΔEc
becomes easier to exceed. This becomes a leakage current, but when a P-type impurity is added, the barrier becomes higher as shown in (b) and becomes difficult to overcome. A case in which the above principle is applied not only to electrons but also to both electrons and holes will be explained using FIG. 3. Figure 3 shows an energy band diagram of a junction between n-type InP and p-type InP as an example.
P-type barrier layer from InP side, lightly doped p-type I
An energy band diagram is shown when an nP layer and an n-type barrier layer are inserted and a forward bias is applied. Electrons, which are the main carriers in n-type InP, have a high barrier of the p-type barrier layer (ΔE
c') The barrier ΔE c' cannot be exceeded even in a high temperature state. Furthermore, the barrier ΔE■ for holes in p-type InP is also large and cannot be exceeded. Therefore, recombination of electrons and holes does not occur, and no current flows even in a forward bias state at a high temperature. Further, a method and use of the above-mentioned principle for blocking the flow of electrons and allowing holes to pass will be explained using FIG. 4. FIG. 4 shows an energy band diagram when electrons are injected from the n-type InF' layer and holes are injected from the p-type InP layer with a forward bias applied to InGaAsP (active layer). At this time, if a p-type barrier layer with a wide forbidden band width is inserted between the active layer and the p-type InP layer, a barrier layer ΔEc' is created for electrons injected into the active layer, so the p-type InP layer leakage can be prevented at high temperatures. At the same time, the barrier layer hardly acts as a barrier layer for holes, and p
It is efficiently implanted from the InP type layer to the active layer. With this structure, electrons can be efficiently confined in the active layer while holes are injected into the active layer, and leakage to the p-type InP layer can be prevented. Furthermore, by inserting an n-type barrier layer between the n-type InP layer and the active layer, electrons are injected into the active layer, and holes are injected into the n-type InP layer.
It is possible to prevent leakage into the layer, improve the confinement of carriers in the -M active layer, and prevent leakage current at high temperatures. The material of this barrier layer is, for example, InP, which can be lattice matched to InA s.
As a strain system that cannot be matched, I n 1−xA Q
xA s (X>0.48) or InGaP, InG
This corresponds to a A sP type semiconductor or a II-VI group semiconductor. The above-mentioned application of impurity addition to the barrier layer is not limited to the InP type, but applies to all structures to which this principle can be applied.

【実施例】【Example】

以下、本発明の実施例について図面を用いて説明する。 実施例1 第1図は本発明による半導体レーザの第1の実施例の断
面図を示す。本実施例は先導波層の両側に設けられた電
流ブロック層に第3図の原理による障壁層を設けたもの
である。 本実施例の半導体レーザはn型InP基板2上に、I 
n G a A s Pからなる活性層を含む発光領域
1が紙面に垂直方向に伸びたストライプ状に形成され、
上記n型InP基板2上かつ発光領域1の両側に、P型
不純物としてZnを添加したInPよりも広い禁制帯幅
を有するInGaP層11とp型の低い不純物濃度のI
nPM 13とn型不純物としてSeを添加したInG
aP障壁層とが順次積層され、上記発光領域l及びIn
GaP[12の上部全面にp型のInPクラッドN3、
InGaAsPキャップ層7が形成され、上記In G
 a A s P層7上面の上記発光領域1上面に対応
する部分を除く位置にS i O2絶縁膜6が形成され
、上記I n G a A s P層7上面の上記発光
領域1上面に対応する部分を除く位置及び SiO2絶
縁膜6上 基板2の下面に下部電極4が形成されている。 上記半導体レーザの製造方法を説明する。 n型1nP基板2上にInGaAsPからなる活性層を
含む発光領域1を結晶成長する。即ち、吸収端波長が1
.3μmのI n G a A s P 1 − 1を
約0.15μm厚、吸収端波長が1.5μmのI n 
G a A s P 1 − 2を約0.15μm厚、
(活性M)、更に吸収端波長が1.3μmのInGaA
 s P 1 − 3を約0.15μm厚積層する。こ
の発光領域1上にSin,の保護膜を着け、更にホトレ
ジストをパターニングして、SiO2をフッ酸系のエツ
チング液でエツチングし、@1μmのストライプ状に残
す。SiO2をマスクにして硫酸系のエツチング液でI
 n G a A s Pの発光領域1をn型InP層
2の基板表面までエツチングし除去する。SiO2のマ
スクをそのまま残し、n型不純物として、Znを添加し
たInP層よりも0、1eV広い禁制帯幅を有するIn
GaP層11を0.015μm、更にp型で1×101
10l7”程度の低い不純物濃度のInP層13を0、
4μm厚、およびn型不純物としてSeを添加したIn
GaP層12を0.015μm厚有機金属気相成長法(
MOVPE法)でS i O2以外の領域に結晶成長す
る。この後、5in2マスクを除去し、全面にP型のI
nPクラッド層3、吸11− 収端波長が、1.15μmのInGaAsP層7を結晶
成長する。尚、上記のp型、n型の不純物濃度は特定し
ない場合はすべてIXI○18cm−3程度である。S
iO2絶縁膜6をパターニングし、窓部にZnを拡散し
、p電極5及びn電極4を蒸着する。レーザ発振波長で
ある1.54μmでの、InGaP障壁層11及び12
の屈折率はInPより小さくなるがO0O上5μm程度
と薄いため、従来のInPのみからなる埋込領域に比べ
、光学的な電界分布の大きな歪みを生じるようなことは
ない。 本実施例は、電流ブロックが前記第3図の原理によって
なされるもので、反対の導電性を持つ障壁と組み合わせ
ることで、容易に100℃以上においてもレーザ発振が
得られる。 実施例2 第5図は本発明による半導体レーザの第2の実施例の断
面図を示す。 本実施例は第1図で示した半導体レーザの発光領域1の
上部に第4図の原理による障壁層14を12− 般けたもので、他の部分は同じ構成である。発光領域1
上にp型の不純物としてZnをI X 1 018cm
−’程度添加した厚さ約0.015μmのInGaP障
壁層工4を第1回の結晶成長で活性層1の結晶成長と同
時に形成する。 この障壁層14を設けることにより、電子のp型1nP
3層への漏れが減り、100℃での電流−光出力の変換
効率が高くなる。これにより一層高温で安定したレーザ
発振が得られる。 また、第5図の光導電層lとn型InP基板2の間にn
型の不純物としてSeをI X 1 0 ”cm−’程
度添加したInGaP障壁層を挿入することにより、正
孔のn型InP基板2への漏れを防ぐことができる。こ
れにより、更に高温での特性を高めることができる。 実施例3 第6図は本発明による半導体レーザの第3の実施例の断
面構成図を示す。本実施例は発光領域の両側に設けられ
た電流ブロック層に第2図(b)の原理による障壁層を
設けたものである。 本実施例の半導体レーザは、n型InP基板21上にp
型InPlil−1、アンドープI nGaA s P
活性層1−2、n型InP層1−3からなる発光領域1
が紙面に垂直方向に伸・びたストライプ状にメサが形成
され、上記n型InP基板21上かつ発光領域1の両側
に、p型InP層8、n型InP電流ブロック層13、
p型不純物を添加されたp型In(1−52A此。、4
.As電流ブロック層15が積層され、上記発光領域l
及び電流ブロック層15上面にn型InP埋込層3が形
成され、上記n型InP埋込層3上面の上記発光領域1
上面に対応する部分を除く位置に5in2絶縁膜6が形
成され、上記埋込層3上面の上記発光領域1上面に対応
する部分を除く位置及び5in2絶縁膜6上面に上部n
電極5が、上記n型InP基板2の下面に下部p電極4
が形成されている。 上記半導体レーザの製造方法を説明する。 まず、P型InP基板2上に、MOCVD法によりp型
InP層1−1(厚さ1μm)、アンドープInGaP
活性層1−2(厚さ0.14pm)、n型InP層1−
3(厚さ0.3μm)を順次成長じた後、通常のウェッ
トエツチング法によりメサを形成する。その後、液層成
長を用いてp型InP電流ブロック層8、n型InP電
流ブロック層13、p型I n 11 a 52 A 
n 11 * 4 s Ag電流ブClツタ層15、n
型InP埋込層3を順次図に示すように成長する。その
後、5i02絶縁膜6をCVD法で形成し、コンタクト
孔を設けた後、最後に蒸着法を用いてn型電極5とp型
電極4を形成する。 本実施例の半導体レーザは160℃までCW発振し、1
00℃における効率は0.08nW/mAであった。 以上本発明の実施例について説明したが、本発明は上記
実施例に限定されず、基板をp型とした導電型を逆にし
たもの、分布帰還型(DFB)レーザ、ブラッグ反射型
(DBF)レーザ、外部共振器付きレーザ等にも適用さ
れる。
Embodiments of the present invention will be described below with reference to the drawings. Embodiment 1 FIG. 1 shows a sectional view of a first embodiment of a semiconductor laser according to the present invention. In this embodiment, barrier layers based on the principle shown in FIG. 3 are provided in current blocking layers provided on both sides of a leading wave layer. The semiconductor laser of this example has I
A light emitting region 1 including an active layer made of nGaAsP is formed in a stripe shape extending perpendicular to the plane of the paper,
On the n-type InP substrate 2 and on both sides of the light emitting region 1, an InGaP layer 11 having a wider forbidden band width than InP doped with Zn as a p-type impurity and a p-type I with a low impurity concentration are formed.
nPM 13 and InG doped with Se as an n-type impurity
The aP barrier layer is sequentially laminated to form the light emitting region l and the In
P-type InP clad N3 on the entire upper surface of GaP[12,
An InGaAsP cap layer 7 is formed, and the InGaAsP
An SiO2 insulating film 6 is formed at a position on the upper surface of the a As P layer 7 excluding a portion corresponding to the upper surface of the light emitting region 1, and corresponds to the upper surface of the light emitting region 1 on the upper surface of the In Ga As P layer 7. A lower electrode 4 is formed on the SiO2 insulating film 6 and on the lower surface of the substrate 2 except for the portion where the lower electrode 4 is formed. A method of manufacturing the above semiconductor laser will be explained. A light emitting region 1 including an active layer made of InGaAsP is grown on an n-type 1nP substrate 2 by crystal growth. That is, the absorption edge wavelength is 1
.. 3 μm of In Ga As P 1-1 is approximately 0.15 μm thick and the absorption edge wavelength is 1.5 μm.
G a As P 1-2 with a thickness of about 0.15 μm,
(active M), and InGaA with an absorption edge wavelength of 1.3 μm
s P 1-3 is laminated to a thickness of about 0.15 μm. A protective film of Sin is placed on the light emitting region 1, and the photoresist is further patterned, and the SiO2 is etched with a hydrofluoric acid etching solution to leave a stripe shape of @1 μm. I was etched with a sulfuric acid-based etching solution using SiO2 as a mask.
The light emitting region 1 of nGaAsP is etched down to the substrate surface of the n-type InP layer 2 and removed. The SiO2 mask is left as is, and an InP layer is added as an n-type impurity, which has a forbidden band width 0.1 eV wider than that of the InP layer doped with Zn.
The GaP layer 11 is 0.015 μm thick and is p-type and 1×101
The InP layer 13 with a low impurity concentration of about 10l7" is
In with a thickness of 4 μm and Se added as an n-type impurity.
The GaP layer 12 is grown by a 0.015 μm thick organometallic vapor phase epitaxy method (
(MOVPE method) to grow crystals in regions other than SiO2. After this, the 5in2 mask was removed and the entire surface was covered with P type I.
In the nP cladding layer 3, an InGaAsP layer 7 having an absorption wavelength of 1.15 μm is grown. Incidentally, the above p-type and n-type impurity concentrations are all about IXI 18 cm-3 unless otherwise specified. S
The iO2 insulating film 6 is patterned, Zn is diffused into the window, and the p-electrode 5 and n-electrode 4 are deposited. InGaP barrier layers 11 and 12 at the laser oscillation wavelength of 1.54 μm
Although the refractive index of InP is smaller than that of InP, since it is thin at about 5 μm above O0O, it does not cause a large distortion in the optical electric field distribution compared to a conventional buried region made only of InP. In this embodiment, the current block is made according to the principle shown in FIG. 3, and by combining it with a barrier having the opposite conductivity, laser oscillation can be easily obtained even at temperatures of 100° C. or higher. Embodiment 2 FIG. 5 shows a cross-sectional view of a second embodiment of a semiconductor laser according to the present invention. In this embodiment, a barrier layer 14 based on the principle shown in FIG. 4 is disposed above the light emitting region 1 of the semiconductor laser shown in FIG. 1, and the other parts have the same structure. Light emitting area 1
Zn as a p-type impurity on top of I x 1018cm
An InGaP barrier layer 4 with a thickness of about 0.015 μm doped with about -' is formed at the same time as the crystal growth of the active layer 1 in the first crystal growth. By providing this barrier layer 14, the electron p-type 1nP
Leakage into the three layers is reduced and the current-to-light output conversion efficiency at 100° C. is increased. This allows for more stable laser oscillation at higher temperatures. Also, between the photoconductive layer l and the n-type InP substrate 2 in FIG.
By inserting an InGaP barrier layer doped with Se as a type impurity at an amount of approximately I x 10 cm-', leakage of holes to the n-type InP substrate 2 can be prevented. Embodiment 3 FIG. 6 shows a cross-sectional diagram of a third embodiment of the semiconductor laser according to the present invention.This embodiment has a second current blocking layer provided on both sides of the light emitting region. A barrier layer is provided based on the principle shown in Figure (b).The semiconductor laser of this example has a p
Type InPlil-1, undoped InGaAs P
Light emitting region 1 consisting of active layer 1-2 and n-type InP layer 1-3
A mesa is formed in the shape of a stripe extending perpendicularly to the plane of the paper, and a p-type InP layer 8, an n-type InP current blocking layer 13,
p-type In added with p-type impurities (1-52A, 4
.. An As current blocking layer 15 is stacked on the light emitting region l.
An n-type InP buried layer 3 is formed on the upper surface of the current blocking layer 15, and the light emitting region 1 on the upper surface of the n-type InP buried layer 3 is formed.
A 5in2 insulating film 6 is formed at a position excluding a portion corresponding to the upper surface, and an upper n is formed at a position excluding a portion corresponding to the upper surface of the light emitting region 1 on the upper surface of the buried layer 3 and an upper surface of the 5in2 insulating film 6.
An electrode 5 is connected to a lower p-electrode 4 on the lower surface of the n-type InP substrate 2.
is formed. A method of manufacturing the above semiconductor laser will be explained. First, a p-type InP layer 1-1 (thickness 1 μm) is formed on a p-type InP substrate 2 by the MOCVD method, and an undoped InGaP
Active layer 1-2 (thickness 0.14 pm), n-type InP layer 1-
3 (thickness: 0.3 μm), a mesa is formed by a normal wet etching method. Thereafter, p-type InP current blocking layer 8, n-type InP current blocking layer 13, and p-type InP current blocking layer 13 are formed using liquid layer growth.
n 11 * 4 s Ag current block Cl ivy layer 15, n
An InP type buried layer 3 is grown sequentially as shown in the figure. Thereafter, a 5i02 insulating film 6 is formed by the CVD method, contact holes are provided, and finally an n-type electrode 5 and a p-type electrode 4 are formed by using a vapor deposition method. The semiconductor laser of this example oscillates CW up to 160°C, and
The efficiency at 00°C was 0.08 nW/mA. Although the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and includes lasers in which the substrate is p-type and the conductivity type is reversed, distributed feedback (DFB) lasers, and Bragg reflection lasers (DBF). It is also applied to lasers, lasers with external resonators, etc.

【発明の効果】【Effect of the invention】

本発明によれば、電流ブロック層に広い禁制帯15− 幅を有する層(障壁層)を、障壁層として働かせて漏れ
を防ぐ対象となるキャリアの導電性と反対の極性を与え
る不純物を添加した層で構成した。 そのため、特に高温下での漏れ電流の低減効果が高めら
れ、高温動作が可能となる。
According to the present invention, an impurity is added to the current blocking layer to provide a layer (barrier layer) having a wide forbidden band width with a polarity opposite to that of the conductivity of the carriers to act as a barrier layer and prevent leakage. Composed of layers. Therefore, the effect of reducing leakage current is particularly enhanced at high temperatures, and high-temperature operation is possible.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第5図及び第6図はいずれも本発明による半導
体レーザの実施例の断面構造図、第2図は本発明の原理
を表したエネルギーバンドダイアグラム、第3図は電子
と正孔の両方に不純物添加障害壁を適用したときのエネ
ルギーバンドダイアグラム、第4図は電子は遮断し、正
孔は通す様に不純物添加障害壁を適用したときのエネル
ギーバンドダイアグラムである。 1・・・活性層を含む発光部、2・・・n型InP基板
、3・・・p型InPクラッド層、4・・・n電極、5
・・・p電極、6−8iO2絶縁膜、7− I n G
 a A s P層、11−p型InGaP障害壁、1
2− n型■16− nGaP障害壁、13・・・低不純物濃度p型InP層
、14・・・p型InGaP障害壁。
Figures 1, 5, and 6 are all cross-sectional structural diagrams of embodiments of the semiconductor laser according to the present invention, Figure 2 is an energy band diagram showing the principle of the present invention, and Figure 3 is an electron and hole diagram. FIG. 4 is an energy band diagram when an impurity-doped barrier wall is applied to both. FIG. 4 is an energy band diagram when an impurity-doped barrier wall is applied to block electrons and allow holes to pass. DESCRIPTION OF SYMBOLS 1... Light emitting part including active layer, 2... N-type InP substrate, 3... P-type InP cladding layer, 4... N-electrode, 5
...p electrode, 6-8iO2 insulating film, 7-I n G
a A s P layer, 11-p-type InGaP barrier wall, 1
2- n-type 16- nGaP barrier wall, 13...p-type InP layer with low impurity concentration, 14... p-type InGaP barrier wall.

Claims (1)

【特許請求の範囲】 1、半導体基板上に、上記半導体基板と同じか又は狭い
禁制帯幅を持つ第1導電型の第1半導体と上記第1半導
体より狭い禁制帯幅をもつ活性層と第2導電型で上記活
性層よりも広く上記半導体基板と同じか又は狭い禁制帯
幅をもつ第2導電型の第2半導体とからなる発光部と、
上記発光部周辺部に設けられた半導体層もつ半導体レー
ザにおいて、 上記発光部周辺部に設けられた半導体層の一部にp型の
不純物が添加され上記半導体基板よりも広い禁制帯幅を
有し電子の漏れを防ぐか、又は、n型の不純物が添加さ
れ上記半導体基板よりも広い禁制帯幅を有し正孔を防ぐ
第3半導体層を設けて構成されたことを特徴とする半導
体レーザ。 2、請求項第1記載において、第2の導電型の不純物を
添加した広い禁制帯幅を有する層を上記活性層と上記第
2半導体層の間に挿入して構成されたことを特徴とする
半導体レーザ。 3、請求項第1記載において、第1導電型の不純物を添
加した広い禁制帯幅を有する層を上記活性層と上記第1
半導体層の間に挿入して構成されたことを特徴とする半
導体レーザ。 4、請求項第1、第2又は第3記載において、上記活性
層の側面に接するか又は近傍に上記第3又は第4の半導
体層を、上記第1半導体と接する領域が第2導電型にな
るように挿入するか、又は上記第2半導体と接する領域
が第1の導電型になるように挿入されて構成されたこと
を特徴とする半導体レーザ。 5、請求項第1、第2又は第3記載において、上記発光
部周辺部に設けられた半導体層は上記基板上で上記発光
部の側面に接して形成され、上記基板上に順次積層され
た第4、第5及び第6の半導体層からなり、上記第4及
び第6半導体層がそれぞれ第2及び第1の導電型の不純
物を添加されかつ上記第1及び第2導電型半導体より広
い禁制帯幅をもつ半導体であり、上記第5半導体層は禁
制帯幅が上記活性層の禁制帯幅より広く、上記第4及び
第6半導体層の禁制帯幅より狭い半導体で構成されたこ
とを特徴とする半導体レーザ。
[Claims] 1. On a semiconductor substrate, a first semiconductor of a first conductivity type having a forbidden band width that is the same as or narrower than that of the semiconductor substrate, an active layer having a forbidden band width narrower than that of the first semiconductor, and a second semiconductor substrate. a light emitting section comprising a second semiconductor of a second conductivity type and having a forbidden band width wider than the active layer and the same as or narrower than the semiconductor substrate;
In a semiconductor laser having a semiconductor layer provided in a peripheral area of the light emitting part, a part of the semiconductor layer provided in a peripheral part of the light emitting part is doped with p-type impurities and has a forbidden band width wider than that of the semiconductor substrate. A semiconductor laser comprising a third semiconductor layer which prevents leakage of electrons or which is doped with n-type impurities and has a wider forbidden band width than the semiconductor substrate and prevents holes. 2. In claim 1, the semiconductor device is characterized in that a layer having a wide forbidden band width doped with impurities of a second conductivity type is inserted between the active layer and the second semiconductor layer. semiconductor laser. 3. In claim 1, a layer having a wide forbidden band width doped with impurities of a first conductivity type is combined with the active layer
A semiconductor laser characterized in that it is inserted between semiconductor layers. 4. Claim 1, 2 or 3, wherein the third or fourth semiconductor layer is in contact with or near a side surface of the active layer, and a region in contact with the first semiconductor is of a second conductivity type. 1. A semiconductor laser characterized in that the semiconductor laser is inserted such that the semiconductor laser has a first conductivity type, or the semiconductor laser is inserted such that a region in contact with the second semiconductor has a first conductivity type. 5. In the first, second or third claim, the semiconductor layer provided around the light emitting part is formed on the substrate in contact with a side surface of the light emitting part, and is laminated in sequence on the substrate. a fourth, a fifth, and a sixth semiconductor layer, the fourth and sixth semiconductor layers doped with impurities of second and first conductivity types, respectively, and have a wider range of impurities than the first and second conductivity type semiconductors; The fifth semiconductor layer is a semiconductor having a band width, and the fifth semiconductor layer is made of a semiconductor whose forbidden band width is wider than the forbidden band width of the active layer and narrower than the forbidden band width of the fourth and sixth semiconductor layers. semiconductor laser.
JP22437490A 1989-09-04 1990-08-28 Semiconductor laser Pending JPH03174793A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP22734889 1989-09-04
JP1-227348 1989-09-04

Publications (1)

Publication Number Publication Date
JPH03174793A true JPH03174793A (en) 1991-07-29

Family

ID=16859395

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22437490A Pending JPH03174793A (en) 1989-09-04 1990-08-28 Semiconductor laser

Country Status (1)

Country Link
JP (1) JPH03174793A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0992935A (en) * 1995-09-23 1997-04-04 Nec Corp Optical semiconductor element and its manufacture
JP2010129743A (en) * 2008-11-27 2010-06-10 Fujitsu Ltd Optical semiconductor device
JP2017108061A (en) * 2015-12-11 2017-06-15 三菱電機株式会社 Method of manufacturing semiconductor laser

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0992935A (en) * 1995-09-23 1997-04-04 Nec Corp Optical semiconductor element and its manufacture
JP2010129743A (en) * 2008-11-27 2010-06-10 Fujitsu Ltd Optical semiconductor device
JP2017108061A (en) * 2015-12-11 2017-06-15 三菱電機株式会社 Method of manufacturing semiconductor laser

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