JPH03173233A - Jitter reducing system - Google Patents

Abstract

PURPOSE:To reduce jitter by dividing plural stuff pulses inserted to one frame at a reception side, inserting the divided pulse to each frame again, eliminating the stuff pulses and smoothing the pulses. CONSTITUTION:A stuff pulse(SP) is inserted simultaneously to one frame in 8-bit rate by an 8-bit SP insertion circuit 10 according to the North America new standards. When the SP in 8-bit is inserted to a frame, the SP is not inserted at least to succeeding three frames. A reception side equipment B applies photoelectric conversion and a pointer processing section 12 detects the presence of the SP and outputs a signal S1 to a readout circuit 16. Only each bit of a reception data string is written in a memory 14 and the SP is not written. The circuit 16 reads out the memory 14 to write it into a memory 20, then an the SP in each 2-bit is inserted to a data by 4 frames in the presence of the SP. Then the SP in 2-bit is eliminated to smooth bit synchronization. Thus, jitter is reduced.

Description

[Detailed Description of the Invention] (Summary of the Invention) Regarding a jitter reduction method in a transmission method that inserts multiple stuff pulses between data, even if multiple stuff pulses are inserted and transmitted, there is no jitter on the receiving side. The purpose of this is to move multiple bits of frame data at a time, insert multiple stuff pulses into the empty spaces, and transmit the data.On the receiving side, the stuff pulses are removed and the data is smoothed to a constant value. In a jitter reduction method for a transmission method that creates a data string arranged with a bit period of The stuff pulse is inserted into a frame where the stuff pulse is not present, and the data of this stuff pulse reinsertion frame is subjected to stuff pulse removal and smoothing.

(Industrial Application Field) The present invention relates to a jitter reduction method in a transmission method that inserts a plurality of stuff pulses between data.

In digital transmission, if there is a speed difference between the device and the transmission path, data bits are moved and stuff bits are inserted in order to compensate for the speed difference. Generally, the stuff bit is 1 bit, but 5ONET (Synchronous 0P) is a new standard in North America that is currently being standardized.
tical Network), CCITT's SDI,
In NTT's new synchronous network, 8 bits are used to match the processing unit.

[Conventional technology]

Figure 3 shows the conventional method. DO~D8 are data bits,
a is the stuff bit, (1) is the input signal of the transmission device,
(2) is a signal on the transmission path, and (3) is a signal supplied (output) to the receiving side device. Since the transmission line is faster, bit synchronization becomes increasingly difficult (it becomes difficult to maintain bit synchronization, but when this happens, the data bits are moved significantly and stuff bits a are inserted in the empty space to maintain focus synchronization.

The stuff bits are due to circumstances on the transmission path, so to speak.
This is excluded on the receiving side because it has nothing to do with the transmission information, but
Since missing portions are a problem, they are smoothed using a PLL or the like to create a smooth receiving side data string similar to the transmitting side data string. FIG. 3(3) shows a data string whose bit period has been smoothed.

Considering this smoothing, stuff bits are
Preferably, the number of bits is 1 bit, but it is not preferable to use multiple bits because it increases jitter.

However, in a synchronous optical network such as 5ONET mentioned above, the stuff focus is also 8 bits in accordance with the 8 bits of data processing unit.
Become a bit. A to h in FIG. 4 are 8 bits of this stuff pulse. However, this makes it difficult to smooth the receiving side PLL, and the jitter becomes 8 times thicker than when the number of stuff bits is 1 bit.

[Problem to be solved by the invention]

As mentioned above, for example, in 5ONET, the data is 8 at a time.
The bit is moved and an 8-bit stats pulse is inserted.
There is a problem in that smoothing in the receiving PLL becomes difficult and jitter increases.

The present invention attempts to improve this point, and aims to prevent jitter from increasing on the receiving side even if a plurality of stuff pulses are inserted and transmitted.

[Means to solve the problem]

As shown in FIG. 1, in the present invention, a data string (1) that is transmitted with a plurality of stuff pulses, 8 bits in this example, a-h inserted therein, is converted into a data string (2) on the receiving side. ■
The frame includes one segment a and b of the 8-bit staff pulse.
, change to one that only contains c and d. In this example, the 8-bit stuff pulse is divided into 4 parts, each of which has 2 bits, and each of these parts is divided into the frame containing the 8-bit stuff pulse and the subsequent 3 frames (
This does not contain the staff pulse), and is divided into 4 frames in total.

The data string (2) of this stuff pulse reinsertion frame is subjected to removal of stuff pulses and smoothing of the bit period, resulting in a data string as shown in FIG. 1 (3).

[Effect]

In this way, on the receiving side, instead of smoothing the bit period by removing the 8-bit stuff pulse at a time, it inserts 2 bits each four times, and then removes the 2-bit stuff pulse. By smoothing the bit period, the disturbance is small, and therefore the jitter can be reduced.

In the 5ONET standard, data movement requests (stuff pulse insertion requests) come less than once every 4 frames.
It is possible to divide the 8-bit staff into four parts and distribute each division into four frames.

〔Example〕

FIG. 2 shows an embodiment of the present invention. A is the transmission device on the sending side,
B is a receiving side transmission device, and C is a transmission path connecting these devices.

Devices (terminal stations) A and B are each placed in a certain city, and transmission line C is an optical cable that connects these cities.

A large number of lines are connected to the device A, and data from these many input lines is multiplexed, electrical-to-optical converted, and sent to a transmission line C. The L number of lines are asynchronous and slower than the transmission line C. Device A has a clock oscillator that defines the data bit period of the transmission path, and performs the above multiplexing using this clock, and inserts stuff pulses as necessary (stuff pulse insertion rate is set from 0 to 100%). (The bit rate of the multiplexed data in device A is designed in advance so that it matches the bit rate of the transmission line by changing the bit rate within the range of . In the 5ONET standard, the stuff pulses are 8 bits at a time, and circuit 10 does this. If we insert this 8-bit stuff pulse in a certain frame, we will insert a stuff pulse in the following 3 frames. A data string is transmitted through transmission path C.

The receiving side transmission device B receives this and performs optical-to-electrical conversion. Then, the pointer processing section 12 detects the presence/absence of the stuff pulse, and notifies the readout circuit 16 of this fact using a signal S1. The format of the signal on the transmission path is roughly in the form of a frame synchronization pattern and a group of data bits.
The frame synchronization pattern includes various control bits in addition to the synchronization bit that indicates the beginning of the frame, and a bit that indicates the presence or absence of a stuff pulse (stuff indicator) also constitutes a part of the control bits, and the stuff pulse is in the data focus group. placed in place. Therefore, the presence or absence of a stuff pulse can be determined from the bit indicating the presence or absence of the stuff pulse, and if it exists, it should be at a predetermined position in the data bit group. Also, in transmission device B, clock CK is output from the received data string.
The pointer processing unit 12 and the reading circuit 1
Inform 6. Only each data bit of the received data string is written to memory (FIFO) 14, and the stuff pulse is R.
Don't get involved. The readout circuit 16 sequentially reads data from the memory 14 and writes successive data to the memory 20, but when it receives notification of the presence of a stuff pulse by the signal S, it writes data for each of four frames, including that frame, into the memory 20. A bit stuff pulse is inserted, specifically, only the two bits are not written. As a result, the aforementioned stuff pulse υI
, reinsertion is performed. A rectangular frame 18 indicates this stuff pulse converter.

The transmission device B is provided with a PLL, which is composed of a phase comparator 22, a low-pass filter 24, and a CO26. Reading of the memory 20 is performed using the clock CK outputted by C026, and the read data becomes a reception output and is sent to a device (not shown) following the transmission device B.

The read clock CKR and write clock CKti of the memory 20 are also input to a phase comparator 22, where the phases are compared. Normally, after a certain period of time, the write clock CK is input, and the output of the phase comparator and therefore the LPF output, ■ CO oscillation frequency is at a predetermined value (
Since we are reading out what has been written in memory, we start reading data after writing to memory to a certain extent, and on average, the speed at which data is read in and the speed at which data is read out are the same, and it is used cyclically. However, when the write clock CKw is lost due to stuff pulse insertion, the phase between CK and CRR changes significantly, and as a result, the phase The comparator output, LPF output, and VCO oscillation frequency change, and a corrective action is performed to return the phase difference to its normal value. Therefore, if there are a large number of stuff pulses, a large disturbance will be added to the PLL, but in the present invention, this is divided and distributed, so the disturbance is small, and the fluctuation in the output frequency of the VCO 26 and therefore the jitter are reduced.

The present invention is, of course, applicable not only to the 5ONET standard but also to any other transmission system that performs insertion and transmission of a plurality of stuff pulses, removal of stuff pulses on the receiving side, and smoothing of the data bit period.

[Effects of the Invention] As explained above, in the present invention, since the amount of data movement by pointer action is divided,
Smoothing in L can be facilitated, and therefore jitter can be suppressed, which greatly contributes to improved device performance.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the principle of the present invention, FIG. 2 is a block diagram showing an embodiment of the invention, FIG. 3 is an explanatory diagram of a stuff pulse, and FIG. 4 is an explanatory diagram of a multi-bit stuff pulse.

Claims (1)

[Claims] 1. Move multiple bits of frame data at a time, insert multiple stuff pulses into the empty spaces, transmit, and then remove the stuff pulses on the receiving side and smooth it into a data string arranged at a constant bit period. In a jitter reduction method in a transmission method that uses a plurality of stuff pulses (a
Divide ~h) into each section (a and b, c and d,...)
is inserted into a frame that contains a stuff pulse and a subsequent frame that does not contain a stuff pulse, and performs stuff pulse removal and smoothing on the data of this stuff pulse reinsertion frame. .