JPH0315961B2 - - Google Patents

Info

Publication number
JPH0315961B2
JPH0315961B2 JP24848783A JP24848783A JPH0315961B2 JP H0315961 B2 JPH0315961 B2 JP H0315961B2 JP 24848783 A JP24848783 A JP 24848783A JP 24848783 A JP24848783 A JP 24848783A JP H0315961 B2 JPH0315961 B2 JP H0315961B2
Authority
JP
Japan
Prior art keywords
circuit
voltage
sample
power supply
integrator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP24848783A
Other languages
Japanese (ja)
Other versions
JPS60143702A (en
Inventor
Hiroyuki Takuno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TOKYO SOTSUKI KENKYUSHO KK
Original Assignee
TOKYO SOTSUKI KENKYUSHO KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TOKYO SOTSUKI KENKYUSHO KK filed Critical TOKYO SOTSUKI KENKYUSHO KK
Priority to JP24848783A priority Critical patent/JPS60143702A/en
Publication of JPS60143702A publication Critical patent/JPS60143702A/en
Publication of JPH0315961B2 publication Critical patent/JPH0315961B2/ja
Granted legal-status Critical Current

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  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)

Description

【発明の詳細な説明】 本発明は、交流電源に接続されたひずみゲージ
を含むブリツジ回路の出力からひずみ量を測定す
るひずみ測定回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a strain measurement circuit that measures the amount of strain from the output of a bridge circuit that includes a strain gauge connected to an AC power source.

従来この種の回路では、該ブリツジ回路の出力
信号を増幅した後検波回路、平滑回路を用いて復
調し、デイジタル量に変換していたが、検波回路
以降の零点変動が出力に加算され、また回路が複
雑になり、ノイズの影響も受けやすい等の不都合
があり、また多点測定の場合、平滑回路の特性上
高速では切換えができず、高速に測定しようとす
ると増幅器や平滑回路等が点数分必要となる不都
合があつた。
Conventionally, in this type of circuit, the output signal of the bridge circuit was amplified, then demodulated using a detection circuit and a smoothing circuit, and converted into a digital quantity, but the zero point fluctuation after the detection circuit was added to the output, and There are disadvantages such as the circuit becoming complicated and being easily affected by noise, and in the case of multi-point measurement, due to the characteristics of the smoothing circuit, switching cannot be done at high speed, and when trying to measure at high speed, the amplifier and smoothing circuit etc. There was an inconvenience that made it necessary.

本発明は、かかる不都合の無いひずみ測定回路
を提供することをその目的としたもので、交流電
源に接続されたひずみゲージを含むプリツジ回路
の出力信号を交流増幅器を介して積分器に供給
し、該積分器で出力信号を交流電源電圧の各半周
期において積分し、その積分電圧をサンプルホー
ルド回路でサンプルホールドし、互に隣接する交
流電圧の半周期における各サンプルホールド値の
算術平均を演算回路で行うようにしたことを特徴
とする。
An object of the present invention is to provide a strain measurement circuit that does not have such inconveniences, and which supplies an output signal of a predetermined circuit including a strain gauge connected to an AC power source to an integrator via an AC amplifier. The integrator integrates the output signal in each half period of the AC power supply voltage, the integrated voltage is sampled and held in a sample hold circuit, and the arithmetic mean of each sample and hold value in mutually adjacent half periods of the AC voltage is calculated by the calculation circuit. It is characterized by the fact that it is carried out in

以下本発明の実施例を図面につき説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第1図において、1はブリツジ電源2に接続さ
れた、機械的ひずみを受けることによつて抵抗変
化を生ずるひずみゲージを含む抵抗体によつて構
成されるブリツジ回路、3は交流増幅器、4はブ
リツジ電源電圧の各半周期における2/3の区間入
力信号を積分する積分器、5は積分器4で積分さ
れた電圧を各半周期毎にサンプルホールドするサ
ンプルホールド回路、6はA−D変換器、7はブ
リツジ電源2の正の半サイクルと負サイクルにお
ける各サンプルホールド値の差の平均を行う演算
回路、8は前記積分器4、サンプルホールド回路
5及び演算回路7をそれぞれ後に詳述するような
所定の動作をさせるためのコントロール回路であ
る。
In FIG. 1, 1 is a bridge circuit connected to a bridge power supply 2 and constituted by a resistor including a strain gauge that changes resistance when subjected to mechanical strain, 3 is an AC amplifier, and 4 is an AC amplifier. An integrator that integrates the 2/3 interval input signal in each half cycle of the bridge power supply voltage, 5 a sample hold circuit that samples and holds the voltage integrated by the integrator 4 every half cycle, and 6 an A-D converter. 7 is an arithmetic circuit that averages the difference between the sample and hold values in the positive half cycle and the negative cycle of the bridge power supply 2, and 8 is the integrator 4, sample and hold circuit 5, and arithmetic circuit 7, which will be described in detail later. This is a control circuit for performing such predetermined operations.

次にその作動について説明すると、ブリツジ回
路1の出力信号はブリツジ電源2の電圧(第2図
A)により変調された信号で、交流増幅器3で増
幅器され積分器4に入力する(第2図B)。この
積分器4では、ブリツジ電源電圧の各半周期にお
けるその2/3の区間入力信号を積分する。入力信
号が一定の時は、第2図Cに示すように、入力信
号は各半周期毎に入力信号に比例した電圧VI
で正及び負方向に積分される。積分電圧VI、−VI
はサンプルホールド回路5でサンプルホールドさ
れて(第2図D)後A−D変換器6でA−D変換
されてデイジタル値となり演算回路7に入力す
る。演算回路7では、ブリツジ電源電圧の負のサ
イクル時のデイジタル値(VI)の極性反転を行
ない、正の半サイクル時のデイジタル値(VI
ΔV)と加算して後2で割算を行う。
Next, to explain its operation, the output signal of the bridge circuit 1 is a signal modulated by the voltage of the bridge power supply 2 (Fig. 2A), which is amplified by the AC amplifier 3 and input to the integrator 4 (Fig. 2B). ). This integrator 4 integrates the 2/3 interval input signal in each half period of the bridge power supply voltage. When the input signal is constant, the input signal is integrated in the positive and negative directions each half period to a voltage V I proportional to the input signal, as shown in FIG. 2C. Integral voltage V I , −V I
is sampled and held by the sample-and-hold circuit 5 (FIG. 2D), and then A-D converted by the A-D converter 6 to become a digital value, which is input to the arithmetic circuit 7. The arithmetic circuit 7 inverts the polarity of the digital value (V I ) during the negative cycle of the bridge power supply voltage, and converts the digital value (V I +
ΔV) and then divide by 2.

このΔVは積分回路4以後の零点変動によるド
リフト電圧であり、以上の演算処理により (VI+ΔV)−(−VI+ΔV)/2=VI となつてドリフト電圧が除去された出力信号に比
例した電圧が出力する。
This ΔV is the drift voltage due to the zero point fluctuation after the integration circuit 4, and the above calculation process yields (V I +ΔV)−(−V I +ΔV)/2=V I , resulting in an output signal from which the drift voltage has been removed. A proportional voltage is output.

ブリツジ回路1の出力信号に第3図Aに示すよ
うにブリツジ電源電圧の第3高調波Hが含まれる
ときは、積分器4においてブリツジ電源電圧の半
周期Toの2/3の期間積分が行なわれるので、第3
図Bに示すように正負相殺されて第3高調波は除
去される。
When the output signal of the bridge circuit 1 contains the third harmonic H of the bridge power supply voltage as shown in FIG. Therefore, the third
As shown in Figure B, the third harmonic is removed by canceling the positive and negative waves.

尚以上の実施例では、A−D変換回路6を用い
てデイジタル量に変換しているが、アナログ量の
まゝ演算回路で演算処理してもよい。
In the above embodiment, the A/D conversion circuit 6 is used to convert the data into digital quantities, but the analog quantities may also be processed by the arithmetic circuit.

このように本発明によるときはブリツジ回路の
出力信号を交流増幅器を介して積分器に供給し、
該積分器で出力信号を交流電源電圧の各半周期に
おいて積分し、その積分電圧をサンプルホールド
回路でサンプルホールドし、互に隣接する交流電
圧の半周期における各サンプルホールド値の算術
平均を演算回路で行なうようにしたので、ドリフ
ト電圧が除去でき、またノイズの影響も少ない等
の効果を有する。また多点測定の場合、交流増幅
器3の入力側に切換器を挿入することにより1点
の増幅器等を設けるだけですみ、構成が簡単にな
る効果を有する。
According to the present invention, the output signal of the bridge circuit is supplied to the integrator via the AC amplifier,
The integrator integrates the output signal in each half period of the AC power supply voltage, the integrated voltage is sampled and held in a sample hold circuit, and the arithmetic mean of each sample and hold value in mutually adjacent half periods of the AC voltage is calculated by the calculation circuit. Since this is carried out, drift voltage can be removed, and the influence of noise is also reduced. Furthermore, in the case of multi-point measurement, by inserting a switching device on the input side of the AC amplifier 3, it is sufficient to provide only one amplifier, etc., which has the effect of simplifying the configuration.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のブロツク図、第2
図A,B,C及びDは第1図示の回路各部におけ
る波形図、第3図A,Bは動作説明図を示す。 1……ひずみゲージを含むブリツジ回路、2…
…ブリツジ電源、3……交流増幅器、4……積分
器、5……サンプルホールド回路、6……A−D
変換器、7……演算回路、8……コントロール回
路。
FIG. 1 is a block diagram of one embodiment of the present invention, and FIG.
Figures A, B, C and D are waveform diagrams at various parts of the circuit shown in the first figure, and Figures A and B are operation explanatory diagrams. 1...Bridge circuit including strain gauge, 2...
... Bridge power supply, 3 ... AC amplifier, 4 ... Integrator, 5 ... Sample hold circuit, 6 ... A-D
Converter, 7... Arithmetic circuit, 8... Control circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 交流電源に接続されたひずみゲージを含むブ
リツジ回路の出力信号を交流増幅器を介して積分
器に供給し、該積分器で出力信号を交流電源電圧
の各半周期において積分し、その積分電圧をサン
プルホールド回路でサンプルホールドし、互に隣
接する交流電源の半周期における各サンプルホー
ルド値の算術平均を演算回路で行うようにしたこ
とを特徴とするひずみ測定回路。
1. The output signal of a bridge circuit including a strain gauge connected to an AC power supply is supplied to an integrator via an AC amplifier, the output signal is integrated in each half period of the AC power supply voltage by the integrator, and the integrated voltage is A distortion measurement circuit characterized in that a sample and hold circuit performs sample and hold, and an arithmetic circuit calculates the arithmetic average of each sample and hold value in half cycles of adjacent AC power supplies.
JP24848783A 1983-12-29 1983-12-29 Strain measuring circuit Granted JPS60143702A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24848783A JPS60143702A (en) 1983-12-29 1983-12-29 Strain measuring circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24848783A JPS60143702A (en) 1983-12-29 1983-12-29 Strain measuring circuit

Publications (2)

Publication Number Publication Date
JPS60143702A JPS60143702A (en) 1985-07-30
JPH0315961B2 true JPH0315961B2 (en) 1991-03-04

Family

ID=17178889

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24848783A Granted JPS60143702A (en) 1983-12-29 1983-12-29 Strain measuring circuit

Country Status (1)

Country Link
JP (1) JPS60143702A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4903312B2 (en) * 2001-01-17 2012-03-28 大和製衡株式会社 Weight measuring device

Also Published As

Publication number Publication date
JPS60143702A (en) 1985-07-30

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