JPS623734Y2 - - Google Patents
Info
- Publication number
- JPS623734Y2 JPS623734Y2 JP17887879U JP17887879U JPS623734Y2 JP S623734 Y2 JPS623734 Y2 JP S623734Y2 JP 17887879 U JP17887879 U JP 17887879U JP 17887879 U JP17887879 U JP 17887879U JP S623734 Y2 JPS623734 Y2 JP S623734Y2
- Authority
- JP
- Japan
- Prior art keywords
- comparator
- noise
- output
- level
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000005259 measurement Methods 0.000 description 3
- 238000012544 monitoring process Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Measurement Of Current Or Voltage (AREA)
- Indication And Recording Devices For Special Purposes And Tariff Metering Devices (AREA)
- Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)
Description
【考案の詳細な説明】
本考案は雑音のレベルを測定する装置に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device for measuring the level of noise.
従来、突発性の雑音が混在する雑音のレベル測
定を行う場合メータ出力が突発性の雑音のため急
激な変動を受け真値を表示しない場合があつた。
そこで真の雑音レベルの測定を行うにはまずレコ
ーダに雑音波形を記録し、突発性の雑音の部分を
除去して再度測定を行なつたり、長時間の平均を
行い突発性の雑音の影響を少なくする等の方法が
行われていたがいずれの方法も測定に長時間を要
する欠点があつた。 Conventionally, when measuring the level of noise in which sudden noise is mixed, there have been cases where the meter output fluctuates rapidly due to the sudden noise and does not display the true value.
Therefore, to measure the true noise level, first record the noise waveform on a recorder, remove the sudden noise part and take the measurement again, or average it over a long period of time to eliminate the effects of the sudden noise. Methods have been used to reduce the amount of water used, but all methods have the drawback of requiring a long time for measurement.
本考案は、これらの欠点を除去するために、雑
音測定中に突発性雑音の発生を検知し、レベルメ
ータが真の雑音レベルを示しているかを判定する
ことにより、短時間で雑音レベルを測定する装置
を提供するものである。 In order to eliminate these drawbacks, the present invention detects the occurrence of sudden noise during noise measurement and determines whether the level meter indicates the true noise level, thereby measuring the noise level in a short time. The present invention provides a device for
本考案によれば、入力雑音をレベルメータ１の
入力端子に接続し、前記レベルメータ１のメータ
出力に保持回路２とコンパレータ４と位相反転器
６を接続し、位相反転器６の出力をコンパレータ
５に接続し、保持回路２の出力をバイアス回路３
に接続し、バイアス回路３の出力をコンパレータ
４とコンパレータ５の比較電圧端子に接続し、コ
ンパレータ４とコンパレータ５のそれぞれの出力
を排他的論理和回路７の入力端子に接続し、排他
的論理和回路７の出力を得ることを特徴とする雑
音レベル測定装置が得られる。 According to the present invention, the input noise is connected to the input terminal of the level meter 1, the holding circuit 2, the comparator 4, and the phase inverter 6 are connected to the meter output of the level meter 1, and the output of the phase inverter 6 is connected to the output terminal of the level meter 1. 5 and connect the output of holding circuit 2 to bias circuit 3.
, the output of bias circuit 3 is connected to the comparison voltage terminals of comparator 4 and comparator 5, and the respective outputs of comparator 4 and comparator 5 are connected to the input terminal of exclusive OR circuit 7. A noise level measuring device characterized by obtaining the output of the circuit 7 is obtained.
図は本考案の一実施例を示す構成図で、レベル
メータ１で測定された雑音レベルは、測定する雑
音の直流変動に追従できる時定数を持つ保持回路
２で保持される。この保持されたレベルは雑音の
平均電圧を示すものであるが、これにバイアス回
路３により雑音の３σ等の値をバイアスした値を
コンパレータ４とコンパレータ５の比較基準電圧
として設定する。コンパレータ４は雑音の＋側の
振幅が比較基準電圧以上の振幅となるかを監視
し、位相反転器６の後段のコンパレータ５は雑音
の一側の振幅が比較基準電圧以下の振幅になるか
を監視している。突発性の雑音が発生するとメー
タ出力に急激なレベル変動が現われるが保持回路
２の時定数では追従しないので比較電圧はそのま
ま保持される。ところが突発性の雑音が発生する
とメータ出力は＋側に変動が激しく現われるの
で、＋側を監視しているコンパレータ４と一側を
監視しているコンパレータ５の出力が不一致とな
る。この不一致は後段の排他的論理和回路７で不
一致信号として出力される。 The figure is a block diagram showing an embodiment of the present invention. The noise level measured by a level meter 1 is held by a holding circuit 2 having a time constant that can follow DC fluctuations of the noise to be measured. This held level indicates the average voltage of the noise, and a value obtained by biasing this level with a value such as 3σ of the noise by the bias circuit 3 is set as the comparison reference voltage of the comparator 4 and the comparator 5. The comparator 4 monitors whether the amplitude on the positive side of the noise is greater than the comparison reference voltage, and the comparator 5 after the phase inverter 6 monitors whether the amplitude on the one side of the noise is less than the comparison reference voltage. I'm monitoring it. When a sudden noise occurs, a sudden level change appears in the meter output, but the time constant of the holding circuit 2 does not follow it, so the comparative voltage is held as it is. However, when a sudden noise occurs, the meter output fluctuates sharply on the + side, so the outputs of the comparator 4 monitoring the + side and the comparator 5 monitoring the one side become inconsistent. This mismatch is outputted as a mismatch signal by the exclusive OR circuit 7 at the subsequent stage.
以上のようにレベルメータで測定中の雑音が突
発性の雑音の場合は不一致信号が出力されている
ので、その時の値を真の雑音レベルとせず不一致
信号が出力されていない時の値を真値とすること
により従来と比較して非常な短時間で雑音レベル
を測定することが可能となる。 As mentioned above, when the noise being measured with a level meter is sudden noise, a mismatch signal is output, so instead of using the value at that time as the true noise level, use the value when no mismatch signal is output as the true noise level. By using this value, it becomes possible to measure the noise level in a much shorter time than in the past.
図は本考案の一実施例を示す構成図で、１はレ
ベルメータ、２は保持回路、３はバイアス回路、
４および５はコンパレータ、６は位相反転器、７
は排他的論理和回路である。
The figure is a configuration diagram showing an embodiment of the present invention, in which 1 is a level meter, 2 is a holding circuit, 3 is a bias circuit,
4 and 5 are comparators, 6 is a phase inverter, 7
is an exclusive OR circuit.
Claims (1)
力をそれぞれの入力とするコンパレータ４および
位相反転器６および保持回路２と、さらに位相反
転器６の出力を入力とするコンパレータ５と、保
持回路２の出力を入力としコンパレータ４および
コンパレータ５の比較電圧を設定するバイアス回
路３と、コンパレータ４およびコンパレータ５の
それぞれの出力を入力とする排他的論理和回路７
とから構成されたことを特徴とする雑音レベル測
定装置。 A level meter 1, a comparator 4, a phase inverter 6, and a holding circuit 2 each receiving the meter output of the level meter 1, a comparator 5 receiving the output of the phase inverter 6, and an output of the holding circuit 2. a bias circuit 3 which takes as input and sets the comparison voltages of comparator 4 and comparator 5; and an exclusive OR circuit 7 which takes output of each of comparator 4 and comparator 5 as input.
A noise level measuring device comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17887879U JPS623734Y2 (en) | 1979-12-24 | 1979-12-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17887879U JPS623734Y2 (en) | 1979-12-24 | 1979-12-24 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5694915U JPS5694915U (en) | 1981-07-28 |
| JPS623734Y2 true JPS623734Y2 (en) | 1987-01-28 |
Family
ID=29689395
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17887879U Expired JPS623734Y2 (en) | 1979-12-24 | 1979-12-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS623734Y2 (en) |
-
1979
- 1979-12-24 JP JP17887879U patent/JPS623734Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5694915U (en) | 1981-07-28 |
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