JPH03147403A - Microwave integrated circuit - Google Patents
Microwave integrated circuitInfo
- Publication number
- JPH03147403A JPH03147403A JP28617889A JP28617889A JPH03147403A JP H03147403 A JPH03147403 A JP H03147403A JP 28617889 A JP28617889 A JP 28617889A JP 28617889 A JP28617889 A JP 28617889A JP H03147403 A JPH03147403 A JP H03147403A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- microwave integrated
- dielectric substrate
- metallic plate
- fet chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims abstract description 30
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 9
- 238000005476 soldering Methods 0.000 claims abstract description 6
- 239000004065 semiconductor Substances 0.000 claims description 5
- 229910000679 solder Inorganic materials 0.000 abstract description 2
- 239000006185 dispersion Substances 0.000 abstract 1
- 239000002184 metal Substances 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 10
- 230000000694 effects Effects 0.000 description 3
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000011179 visual inspection Methods 0.000 description 1
Landscapes
- Microwave Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明はマイクロ波集積回路に関し、特に半導体素子
及び誘電体基板の半導付は個所を明確にしたマイクロス
トリップ線路の構造に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microwave integrated circuit, and in particular to a structure of a microstrip line in which semiconductor elements and dielectric substrates are semiconductor-attached at clearly defined locations.
従来のマイクロ波集積回路の手回図を第4図に、その断
面図を第5図に示す。図において、(1)は誘電体基板
、(2月よマイクロストリップ線路で、整合回路を形成
している。(3)はグランド用の金属板、(4)はFE
Tチップ、(5)、(6)はFETチップ(4ンのそれ
ぞれゲートパッド及びドレインパッド、(7)は金ワイ
ヤである。A circuit diagram of a conventional microwave integrated circuit is shown in FIG. 4, and a cross-sectional view thereof is shown in FIG. In the figure, (1) is a dielectric substrate, (a microstrip line) forms a matching circuit, (3) is a metal plate for grounding, and (4) is an FE
T chips, (5) and (6) are FET chips (four gate and drain pads, respectively, and (7) are gold wires.
次に動作について説明する。ここでは、FETチップ(
4)と、その入出力整合回路を形成した2枚の誘電体基
板(1)及び、FETチップ(4)と誘電体基板(1)
上に形成されたマイクロストリップ線路(2)からなる
マイクロ波集積回路の場合を例として説明する。Next, the operation will be explained. Here, the FET chip (
4), two dielectric substrates (1) forming the input/output matching circuit, and FET chip (4) and dielectric substrate (1)
The case of a microwave integrated circuit consisting of a microstrip line (2) formed above will be explained as an example.
マイクロ波帯ではFETチップ(4)の入出力整合を取
る場合には、誘電体基板(1)上に入出力それぞれの整
合回路をマイクロストリップ線路(2)で形成し、その
誘電体基板(1)をFETチップ(4)の入出力に配置
するようにして、誘電体基板(1)及びFETチップ(
4)を半田付けした後、FETチップ(4)のゲート及
びドレインパッド(5)、(6)とマイクロストリップ
線路(2)とを金ワイヤ(7)で接続していた。In the microwave band, when matching the input and output of the FET chip (4), the input and output matching circuits are formed using microstrip lines (2) on the dielectric substrate (1), and the dielectric substrate (1) ) are placed at the input and output of the FET chip (4), and the dielectric substrate (1) and the FET chip (
After soldering 4), the gate and drain pads (5), (6) of the FET chip (4) and the microstrip line (2) were connected with a gold wire (7).
従来のマイクロ波集積回路は以上のように構成されてい
たので、誘電体基板とFETチップを平坦な金属板(3
)上に半田付けする際に、位置を確認する目標物がなく
、主に目視によって作業が実施されるため、集積回路を
組立てるごとに基板位置のずれや金ワイヤの長さの変動
が生じるため、マイクロ波集積回路の特性のばらつきが
大きな原因となるなどの問題点があった。Conventional microwave integrated circuits were constructed as described above, so the dielectric substrate and FET chip were connected to a flat metal plate (3
) When soldering to the top of the board, there is no target to confirm the position, and the work is mainly done by visual inspection, which causes shifts in the board position and variations in the length of the gold wire each time the integrated circuit is assembled. , there were problems such as large variations in the characteristics of microwave integrated circuits.
この発明は上記のような問題点を解消するためになされ
たもので、誘電体基板やFETチップを半田付けする際
の組立て精度の向上と組立て作業の能率向上が図れるマ
イクロ波集積回路を得ることを目的とする。This invention was made in order to solve the above-mentioned problems, and provides a microwave integrated circuit that can improve assembly accuracy and efficiency of assembly work when soldering dielectric substrates and FET chips. With the goal.
本発明に係るマイクロ波集積回路は、誘電体基板並びに
FETチップを半田付けする金属板に凸部を設け、さら
にFETチップの整合回路を形成している誘電体基板上
にグランド用パッドを設けたものである。In the microwave integrated circuit according to the present invention, convex portions are provided on the dielectric substrate and the metal plate to which the FET chip is soldered, and a grounding pad is further provided on the dielectric substrate forming the matching circuit of the FET chip. It is something.
〔作用〕
この発明におけるマイクロ波集積回路は、金属板に凸部
を設け、さらに誘電体基板上にグランド用パッドを設け
ることにより、精度良く、マイクロ波集積(ロ)路の組
立てが実施でき、集積回路の特性のばらつきを小さく抑
えることができ、また、組立て作業の能率を向上させる
ことができる。[Function] In the microwave integrated circuit of the present invention, by providing a convex portion on the metal plate and further providing a grounding pad on the dielectric substrate, the microwave integrated circuit can be assembled with high precision. Variations in the characteristics of integrated circuits can be suppressed to a small level, and the efficiency of assembly work can be improved.
以下、この発明の一実施例を図について説明する。第1
図はこの発明の一実施例を示すマイクロ波511回路の
平面図、第2図は第1図の断面図である。図において、
(1)は誘電体基板、(2)はマイクロストリップ線路
、(3)は金属板、(4)はFETチップ、(5L(6
〕はFETチップ(4)のそれぞれゲートパッド及びド
レインパッド、(7)は誘電体基板(1)上のマイクロ
ストリップ線路(2)とゲートパッド(5)又はドレイ
ンパッド(6)とを接続する金ワイヤである。An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure is a plan view of a microwave 511 circuit showing an embodiment of the present invention, and FIG. 2 is a sectional view of FIG. 1. In the figure,
(1) is a dielectric substrate, (2) is a microstrip line, (3) is a metal plate, (4) is a FET chip, (5L (6
] are the gate pad and drain pad, respectively, of the FET chip (4), and (7) is the gold plate connecting the microstrip line (2) on the dielectric substrate (1) and the gate pad (5) or drain pad (6). It's a wire.
第3図は第1図のFETチップ(4)及び金ワイヤ(7
)を取付ける[171の状態を示す平面図で、図におい
て、(8)はkfU体基板基板)上に形成されたグラン
ドバットである。Figure 3 shows the FET chip (4) and gold wire (7) in Figure 1.
) is a plan view showing the state of [171] in which the kfU body board is attached. In the figure, (8) is a ground bat formed on the kfU body substrate).
次に動作について説明する。Next, the operation will be explained.
まず第3図番こ示すように、金属板(3)の凸部に合せ
て誘電体基板(1)をそれぞれ半田付けする。この時、
誘電体基板(1)の横手方向はグランドバット(8)を
目印に誘電体基板(1)の位置を決定する。この時に、
金属板(3)の凸部及び2枚の誘電体基板(1)上のグ
ランドパッド(8ンからFETチップ(4)を半田付け
する位置が明確にさ口る。First, as shown in Figure 3, the dielectric substrate (1) is soldered to the convex portions of the metal plate (3). At this time,
In the lateral direction of the dielectric substrate (1), the position of the dielectric substrate (1) is determined using the ground batt (8) as a landmark. At this time,
The position where the FET chip (4) is soldered is clearly located from the convex part of the metal plate (3) and the ground pad (8) on the two dielectric substrates (1).
次に第1図、第2図に示すように、誘電体基板(1)を
金属板(3)に半田付けすることにより、形成されたF
ETチップ(4)用のグランド位置にFETチップ(4
)を半田付けし、さらに、マイクロストリップ線路(2
)とゲート及びドレインパッド(5)、(6)とを金ワ
イヤ(7月ごて接続することにより、マイクロ波集積回
路が形成できる。Next, as shown in FIGS. 1 and 2, the dielectric substrate (1) is soldered to the metal plate (3) to form an F.
Attach the FET chip (4) to the ground position for the ET chip (4).
), and then solder the microstrip line (2
) and the gate and drain pads (5), (6) using a gold wire (7), a microwave integrated circuit can be formed.
なお、上記実施例ではFETチップ(4)を使用する場
合を説明したが、FETチップは他の半導体素子であっ
てもよく、上記実施例と同様の効果を奏する。In addition, although the case where the FET chip (4) is used was explained in the said Example, the FET chip may be other semiconductor elements, and it will produce the same effect as the said Example.
以上のようにこの発明によれば、金属板に凸部を設けさ
らに誘電体基板にグランドパッドを形成したので、誘電
体基板及びFETチップの半田付けが精度良〈実施でき
るため、特性のばらつきを低く抑えることが可能となり
、さらに、作業能率も向上するという効果がある。As described above, according to the present invention, since the convex portion is provided on the metal plate and the ground pad is formed on the dielectric substrate, soldering of the dielectric substrate and the FET chip can be carried out with high precision, thereby reducing variations in characteristics. It is possible to keep the amount low, and furthermore, it has the effect of improving work efficiency.
第1図はこの発明の一実施例によるマイクロ波集積回路
を示す平面図、第2図は第1図の断面図、第3図は第1
図のマイクロ波集積回路の組立て工程前の構造を示す平
面図、第4図は従来のマイクロ波i積回路を示す平面図
、第5図は第4図の断面図である。
図において、(1)は誘電体基板、(2)はマイクロス
トリップ線路、(3)は金属板、(4)はFETチップ
、(5)はゲートパッド、(6)はドレインパッド、(
7)は金ワイヤ、(8)はグランドパッドを示す。
なお、図中、同一符号は同一、又は相当部分を示す。FIG. 1 is a plan view showing a microwave integrated circuit according to an embodiment of the present invention, FIG. 2 is a sectional view of FIG. 1, and FIG.
FIG. 4 is a plan view showing the structure of the microwave integrated circuit before the assembly process, FIG. 4 is a plan view showing a conventional microwave integrated circuit, and FIG. 5 is a sectional view of FIG. 4. In the figure, (1) is a dielectric substrate, (2) is a microstrip line, (3) is a metal plate, (4) is a FET chip, (5) is a gate pad, (6) is a drain pad, (
7) indicates a gold wire, and (8) indicates a ground pad. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
半導体素子、金ワイヤからなるマイクロ波集積回路にお
いて、前記誘電体基板の前記半導体素子と隣り合う端面
に前記半導体素子を半田付けするパターンを形成したこ
とを特徴とするマイクロ波集積回路。A dielectric substrate on which a microstrip line is formed,
1. A microwave integrated circuit comprising a semiconductor element and a gold wire, characterized in that a pattern for soldering the semiconductor element is formed on an end surface of the dielectric substrate adjacent to the semiconductor element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28617889A JPH03147403A (en) | 1989-11-01 | 1989-11-01 | Microwave integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28617889A JPH03147403A (en) | 1989-11-01 | 1989-11-01 | Microwave integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03147403A true JPH03147403A (en) | 1991-06-24 |
Family
ID=17700957
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP28617889A Pending JPH03147403A (en) | 1989-11-01 | 1989-11-01 | Microwave integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03147403A (en) |
-
1989
- 1989-11-01 JP JP28617889A patent/JPH03147403A/en active Pending
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