JPH03145315A - Variable phase circuit - Google Patents

Abstract

PURPOSE:To eliminate a need of a transformer by outputting the in-phase output and the anti-phase output of a clock signal by a gate circuit. CONSTITUTION:The clock signal inputted to a signal input terminal 1 is inputted to a gate circuit 2, and the in-phase output and the anti-phase output are outputted from this circuit 2. One output passes a variable resistance 4 and the other passes a capacitor 5, and they are added and are outputted from a signal output terminal 6. At this time, the sum of these two signals is taken to convert signals to a vector sum; and when the resistance value of the variable resistance 4 is changed, the vector sum is changed to output the signal, which has the phase changed, from the signal output terminal 6. Thus, a transformer to get the in-phase output and the anti-phase output is unnecessary to reduce the scale and the weight of the circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a variable phase circuit, and particularly to a variable phase circuit that varies the phase of a clock signal.

[Conventional technology]

Conventionally, this type of variable phase circuit has generally been constructed using a transformer, an example of which is shown in FIG. In the figure, 11 is a signal input terminal, 12 is a gate circuit, and 13 is a signal input terminal.
is a transformer, 14 is a variable resistor, 15 is a capacitor, 16
indicates a signal input terminal.

In this configuration, the clock signal input from the input signal terminal 11 to the gate circuit 12 is input from the output of the gate circuit 12 to the primary side of the transformer 13. Since the middle point of the secondary side of the transformer 13 is grounded, positive-phase and negative-phase signals are output from both ends of the transformer 13, respectively, and the variable resistor 14. It is input to capacitor 15, on which both are added. Here, by changing the resistance value of the variable resistor 14, the vector sum of the positive phase and negative phase signals changes,
Clock signals with different phases are output from the signal output terminal 16.

[Problem to be solved by the invention]

The conventional variable phase circuit described above uses the transformer 13 to obtain signals of positive phase and negative phase, so the transformer is required. However, transformers are usually large and heavy, so
There are problems in that the circuit scale of the variable phase circuit becomes large and heavy, and the transformer is expensive, leading to an increase in price.

An object of the present invention is to provide a variable phase circuit that does not require a transformer.

[Means to solve the problem]

The variable phase circuit of the present invention includes a gate circuit configured to have at least one input and two outputs, and outputting a positive phase output and a negative phase output to the two outputs, respectively, and a variable resistor connected to one output of the gate circuit. , and a capacitor connected to the output of the other, and is configured to combine the respective outputs of these variable resistors and the capacitor.

[Function] With this configuration, it is possible to take out a positive phase output and a negative phase output for one input signal from the gate circuit, and by combining these outputs through a variable resistor and a capacitor, it is possible to obtain an arbitrary phase. Become.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the variable phase circuit of the present invention. In the figure, 1 is a signal input terminal, 2 is a gate circuit,
4 is a variable resistor, 5 is a capacitor, and 6 is a signal output terminal. Here, the gate circuit 2 has E CL (Em
itter Coupled Logic) and commercials
L (Current Mode Logic), has one input terminal and two output terminals, and has two
Each output of the two output terminals is configured to be output as a positive phase output and a negative phase output.

According to this configuration, a clock signal input to the signal input terminal 1 is input to the gate circuit 2, from which a positive phase output and a negative phase output are respectively output.

Then, one output is passed through a variable resistor 4, and the other output is passed through a capacitor 5, and each is added and outputted from a signal output terminal 6.

At this time, by taking the sum of these two signals, the signals are vector summed, and by changing the resistance value of the variable resistor 4, the vector sum is changed, and a signal with a changed phase is output from the signal output terminal 6. .

Figure 2 shows changes in the vector sum. The output from variable resistor 4 is VR, and the output from capacitor 5 is ■. Then, when the variable resistor 4 has a certain resistance value R, the vector sum is V,
Ten V. The phase at this time is θ. variable resistance 4
When the resistance value becomes R', the output of the variable resistor 4 becomes V8', the vector sum becomes ``E'+■'', and the phase at this time becomes θ'. This shows that the phase has changed from θ to θ'.

Therefore, in this variable phase circuit, since the gate circuit 2 outputs the positive phase output and the negative phase output of the clock signal, a transformer is not required, and the circuit size and weight can be reduced, and the price can be reduced. possible.

(Effects of the Invention) As explained above, the present invention extracts a positive phase output and a negative phase output for one input signal from a gate circuit, and synthesizes these outputs through a variable resistor and a capacitor to obtain an arbitrary phase. This eliminates the need for a transformer to obtain positive-phase and negative-phase outputs, making the circuit smaller and lighter.
Moreover, it has the effect of realizing a reduction in price.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an embodiment of the present invention, FIG. 2 is a diagram showing a vector sum of signals and its phase, and FIG. 3 is a circuit diagram showing an example of a conventional variable phase circuit. 1.11...Signal input terminal, 2,12...Gate circuit, 4.14...Variable resistor, 5. I5...Capacitor, 6.16...Signal output terminal, 13...Transformer. Figure ■ Figure 3 Figure 2

Claims (1)

[Claims] 1. A gate circuit configured with at least one input and two outputs and outputting a positive phase output and a negative phase output to the two outputs, a variable resistor connected to one output of this gate circuit, and a capacitor connected to the other output. A variable phase circuit comprising: a variable phase circuit configured to combine the respective outputs of the variable resistor and the capacitor.