JPH0450633B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrated four-quadrant analog signal multiplier circuit for multiplying two analog electrical signals together. Analog multiplication circuits, like delay lines, subtraction circuits, or addition circuits, are important basic circuits that constitute analog integrated circuits such as analog signal processors. Compared to digital integrated circuits, analog integrated circuits have the characteristics of extremely small circuit scale, extremely small power consumption, and extremely high processing speed, making them extremely advantageous in realizing high-speed, wide-bandwidth, and small-sized integrated circuits. . However, analog integrated circuits have the disadvantage of deteriorating the characteristics of the integrated circuit because they generate harmonic distortion that is unique to analog systems.

SUMMARY OF THE INVENTION An object of the present invention is to provide a four-quadrant analog signal multiplication circuit characterized by a smaller circuit scale than conventional multiplication circuits. Another object of the present invention is to provide a multiplication circuit that can significantly improve harmonic distortion, which is a drawback of analog systems.

According to the present invention, the first MOST, the second MOST whose electrical characteristics are equal to or very similar to the first MOST, include at least an operational amplifier, and convert the drain current flowing through the first MOST into a voltage. A first I/V conversion circuit to be converted, which has the same configuration as the first I/V conversion circuit, and a second I/V conversion circuit.
a second I/V conversion circuit that converts the drain current flowing through the MOST into a voltage; subtraction to obtain the difference between the output signal of the first I/V conversion circuit and the output signal of the second I/V conversion circuit; comprising a circuit, the first MOST
the drain (or source) of the second MOST
The drain (or source) of the first I/V conversion circuit is connected to a first terminal, the non-inverting input of the first I/V conversion circuit and the non-inverting input of the second I/V conversion circuit are connected to a second terminal, and the first The source (or drain) of the MOST of the second I/V conversion circuit is connected to the inverting input of the first I/V conversion circuit.
The source (or drain) of MOST is connected to the inverting input of the second I/V conversion circuit, the output of the first I/V conversion circuit is connected to one input of the subtraction circuit, and the second I/V conversion circuit is connected to the second I/V conversion circuit. It is an object of the present invention to provide a four-quadrant analog multiplier circuit, in which the outputs of the circuit are respectively connected to the other inputs of the subtractor circuit, and the first MOST and the second MOST are of depletion type. Another object of the present invention is that the first MOST includes a second MOST whose electrical characteristics are equal to or very similar to those of the first MOST, and includes at least an operational amplifier, and the drain current flowing through the first MOST is set to a voltage. a first I/V conversion circuit that converts the first
The same configuration as the I/V conversion circuit, and the second
a second I/V conversion circuit that converts the drain current flowing through the MOST into a voltage; subtraction to obtain the difference between the output signal of the first I/V conversion circuit and the output signal of the second I/V conversion circuit; comprising a circuit, the first MOST
the drain (or source) of the second MOST
The drain (or source) of the first I/V conversion circuit is connected to a first terminal, the non-inverting input of the first I/V conversion circuit and the non-inverting input of the second I/V conversion circuit are connected to a second terminal, and the first The source (or drain) of the MOST of the second I/V conversion circuit is connected to the inverting input of the first I/V conversion circuit.
The source (or drain) of MOST is connected to the inverting input of the second I/V conversion circuit, the output of the first I/V conversion circuit is connected to one input of the subtraction circuit, and the second I/V conversion circuit is connected to the second I/V conversion circuit. In a four-quadrant analog signal multiplication circuit, the outputs of the circuits are respectively connected to the other inputs of the subtraction circuit, and the first MOST and the second MOST are of depletion type.
The first analog input signal vg to the gate of MOST,
a second analog input signal vd to the first terminal;
and provides an input method for grounding the gate of the second MOST and the second terminal, respectively. Further according to the invention, the first MOST,
a second MOST whose electrical characteristics are equal to or very similar to the first MOST; a first I/V conversion circuit that includes at least an operational amplifier and converts a drain current flowing through the first MOST into a voltage; The same configuration as the first I/V conversion circuit, and the second
a second I/V conversion circuit that converts the drain current flowing through the MOST into a voltage; subtraction to obtain the difference between the output signal of the first I/V conversion circuit and the output signal of the second I/V conversion circuit; comprising a circuit, the first MOST
the drain (or source) of the second MOST
The drain (or source) of the first I/V conversion circuit is connected to a first terminal, the non-inverting input of the first I/V conversion circuit and the non-inverting input of the second I/V conversion circuit are connected to a second terminal, and the first The source (or drain) of the MOST of the second I/V conversion circuit is connected to the inverting input of the first I/V conversion circuit.
The source (or drain) of MOST is connected to the inverting input of the second I/V conversion circuit, the output of the first I/V conversion circuit is connected to one input of the subtraction circuit, and the second I/V conversion circuit is connected to the second I/V conversion circuit. in a four-quadrant analog signal multiplication circuit, the outputs of the circuits are respectively connected to the other inputs of the subtraction circuit, and the first MOST and the second MOST are of depletion type;
A first analog input signal vg and a signal -vg complementary to vg are supplied to the gate of the MOST and the gate of the second MOST, respectively, and a second analog input signal is supplied to the first terminal.
An input method is provided in which an analog input signal vd is supplied and the second terminal is grounded. Further, the present invention provides the first MOST, the electrical characteristics of which are the first MOST.
a second MOST equal to or very close to,
the first MOST including at least an operational amplifier;
a first I/V conversion circuit that converts the drain current flowing through the MOST into a voltage; a second I/V conversion circuit that has the same configuration as the first I/V conversion circuit and converts the drain current flowing through the second MOST into a voltage; /V conversion circuit, the output signal of the first I/V conversion circuit and the second I/V conversion circuit.
The drain (or source) of the first MOST is provided with a subtraction circuit that obtains the difference between the output signal of the conversion circuit and the output signal of the conversion circuit.
and the drain (or source) of the second MOST
is connected to the first terminal, the non-inverting input of the first I/V conversion circuit and the non-inverting input of the second I/V conversion circuit are connected to the second terminal, and the source of the first MOST (or the source (or drain) of the second MOST is connected to the inverting input of the first I/V conversion circuit;
is an inverting input of the second I/V conversion circuit, the output of the first I/V conversion circuit is connected to one input of the subtraction circuit, and the output of the second I/V conversion circuit is connected to the subtraction circuit. are respectively connected to the other input of the first
In a four-quadrant analog signal multiplier circuit in which a MOST and the second MOST are depletion type, a first analog input signal is input to the gate of the first MOST.
vg, a second analog input signal vd and a signal -vd complementary to vd are supplied to the first terminal and the second terminal, respectively, and a gate of the second MOST is grounded. . Furthermore, according to the present invention, the electrical characteristics of the first MOST are the same as those of the first MOST.
a second equal to or very close to MOST
MOST, including at least an operational amplifier, the first
a first I/V conversion circuit that converts the drain current flowing through the MOST into a voltage, and a second I/V conversion circuit that has the same configuration as the first I/V conversion circuit and converts the drain current flowing through the second MOST into voltage. I/V conversion circuit, the output signal of the first I/V conversion circuit and the second I/V conversion circuit
a subtraction circuit for obtaining a difference between the output signal of the I/V conversion circuit of the first MOST and the drain (or source) of the second MOST to the first terminal; The non-inverting input of the first I/V conversion circuit and the non-inverting input of the second I/V conversion circuit are connected to the second terminal, and the source (or drain) of the first MOST is connected to the first I/V conversion circuit. The source (or drain) of the second MOST is connected to the inverting input of the V conversion circuit, and the output of the first I/V conversion circuit is connected to one side of the subtraction circuit. and the output of the second I/V conversion circuit is connected to the other input of the subtraction circuit, respectively, and the first MOST and the second MOST are depletion type. In the circuit, the gate of the first MOST and the gate of the second MOST
A first analog input signal vg and a signal -vg complementary to vg are supplied to the gate of the MOST, respectively, and a signal -vg complementary to the second analog input signal vd and vd is supplied to the first terminal and the second terminal, respectively. An input method is obtained that supplies vd.

This will be explained in detail below using the drawings. FIG. 1 shows, as an example, the configuration of a conventional four-quadrant analog signal multiplication circuit (hereinafter referred to as a multiplication circuit).

Reference numeral 10 denotes an enhancement type field effect transistor having a first MOS structure (hereinafter referred to as the first MOST). 20 is a second MOST whose electrical characteristics are exactly the same as or very similar to those of the first MOST 10.
30 and 40 are drain currents IP flowing through the first MOST 10 and the second MOST 20, respectively.
and the drain current IN flowing through the second MOST20
A first current provided for converting into voltage /
They are a voltage conversion circuit (hereinafter referred to as an I/V conversion circuit) and a second I/V conversion circuit. Here, as an example, operational amplifiers 31, 41 and resistance elements 32, 42
A first (second) I/V conversion circuit 3 consisting of
0,40 are shown. 50 is the output signal of the first I/V conversion circuit 30 and the second I/V conversion circuit 4
This is a subtraction circuit provided to obtain the difference between 0 output signals. Here, as an example, a subtracting circuit is shown that includes an operational amplifier 51 and resistive elements 52, 53, 54, and 55. 300 is a signal source of the first analog signal vg to be multiplied; 301 is a first level shifter provided for superimposing the DC voltage VG on the vg; This is a level shift circuit for shifting to VG level. Similarly, 100 is a signal source of the second analog signal vd to be multiplied, and 101 is a second level shifter provided to superimpose the DC voltage VD on the second analog signal vd. 102 and 30
2 are DC voltage sources with voltage values VD and VG, respectively. Therefore, VD+vd goes to terminal 1, and VD+vd goes to terminal 2.
VD to terminal 3, VG+vg to terminal 4, terminal 4 to terminal 4
VG is applied respectively. Note that these voltage values are within a range in which the first and second MOSTs operate in the triode region. Below, the first and second
The description will be made assuming that the enhancement type MOST is an n-channel device and that VD and VG are positive DC voltages. Note that vg and vd may have either positive or negative signs. Now when vd is positive, the drain current flowing to the first MOST10
The drain current IN flowing through IP and the second MOST 20 is IP=B(VG+vg-VD-vd/2-VT)・vd (1) IN=B(VG-VD-vd/2-VT)・vd (2 ) is given by Here, B and VT are both
are the unique characteristic constants and threshold voltage of MOST.
Note that when vd is positive, IP and IN flow in the directions of arrows 11 and 21, respectively. On the other hand, when vd is negative, IP and IN flow in the direction opposite to arrows 11 and 21, respectively, IP=B(VG+vg−VD−vd +vd/2−VT)・(−vd) (3) IN=B( It is given by VG−VD−vd +vd/2−VT)・(−vd) (4). IP and IN flow through the resistive elements 32 and 42, respectively, to terminals 33 and 3, respectively.
5 and generates a voltage drop between 43 and 45.
Therefore, the output terminal 3 of the first I/V conversion circuit 30
The voltage appearing at terminal 5 is the voltage drop (IP
It is the value obtained by subtracting the amount (proportional to). Similarly, the voltage appearing at the terminal 45 is the value obtained by subtracting the voltage drop (proportional to IN) occurring across the resistive element 42 from the DC voltage VD applied from the terminal 44. Therefore, the signal voltage at terminals 35 and 45, i.e., terminal 5
When the signal voltages 6 and 57 are subtracted by the subtraction circuit 50, a result proportional to the product of the first analog signal vg and the second analog signal vd is obtained from the terminal 58. The proportionality constant is given by the resistance values of B, VT, and resistance elements 32, 42, 52, 53, 54, and 55.

The operation of the conventional subtraction circuit has been described in detail above. A drawback of the conventional multiplication circuit is that the level shifter 301 and the DC power supply 302 are always required, which makes the circuit scale and configuration complicated. This is the first and second
This is due to the fact that since the MOSTs 10 and 20 are of the enhancement type, a bias voltage is necessarily required between the gate and source in order for these MOSTs to turn on. Furthermore, since VT is positive, the range of drain voltages that satisfy the conditions for MOST to operate in the triode region within a given gate voltage is limited and narrow. Therefore, there is a drawback that a large dynamic range cannot be obtained.

An object of the present invention is to eliminate the drawbacks of the conventional multiplier circuits described above, reduce the size of the circuit board, extremely reduce harmonic distortion, and provide a four-quadrant analog signal multiplier circuit with a wide dynamic range. .

FIG. 2 is an example of a specific circuit configuration of a four-quadrant analog signal multiplication circuit according to the present invention. 70 is the first MOST of depletion type, 80 is the first MOST
A second MOST whose electrical characteristics are exactly the same or very similar to the MOST. 30 is a first I/V conversion circuit, 40 is a second I/V conversion circuit,
50 is a subtraction circuit. 1 is the first MOST70
and a first terminal to which the drain (or source) of the second MOST 80 is connected, and 2 is a second terminal. 33, 43 and 34, 44 are an inverting input and a non-inverting input of the first (second) I/V conversion circuit, respectively. 58 is an output terminal for obtaining the multiplication result. In FIG. 2, components having the same functions as those in FIG. 1 are indicated using the same numbers. The following description assumes that the MOST is an n-channel device. Now terminal 3
A first analog signal vg that changes around the ground level is applied to the gate of MOST70,
MOST70 and MOST80 from the first terminal 1
Assume that a second analog signal vd, which changes around the ground level, is applied to the drain (or source) of . Further, the gate of the second MOST 80 is set to zero V by grounding the terminal 4. Furthermore, the first MOST70 and the second MOST8
The other source (or drain) of 0 is connected to the respective first I/I by grounding the second terminal 2.
It is set to zero V via a V conversion circuit and a second I/V conversion circuit. Note that the polarities of vd and vg can take either positive or negative sign. These values are now set within the range in which the MOSTs 70 and 80 operate in the three-pole region. Now when vd is positive,
Current flowing through the first MOST regardless of the polarity of vg
The drain current IN flowing through IP and the second MOST 80 is given by IP=B(vg-VT-vd/2)・vd (5) IN=B(-VT-vd/2)・vd (6), respectively. Flows in the directions of arrows 11 and 12, respectively. On the other hand, when vd is negative, regardless of the polarity of vg, IP and IN are IP=B(vg+vd-VT+vd/2-)・(-vd) (7) IN=B(-vd-VT+vd/2)・( −vd) is given by (8). In this case IP and IN are arrow 11
and 12 flow in the opposite direction. Since the IP flows through the resistive element 32, it is converted into a voltage by the first I/V conversion circuit 30 and outputted to the terminal 35 as a voltage number proportional to IP. Similarly applicable
IN is also output to the terminal 45 as a voltage signal proportional to IN. These voltage signals are subtracted from each other by a subtraction circuit 50, resulting in a first analog signal.
A voltage signal proportional to the product of vg and the second analog signal vd is output to terminal 58. In this case as well, the proportionality constant is B, and the resistance elements 32, 42, 52, 53, 5
It is given by a resistance value of 4.55. As is clear from the above results, the multiplication circuit of the present invention does not require an input signal level shifter or a DC power supply, which are required by conventional multiplication circuits, so the circuit configuration is extremely simple and the power consumption is low. Also, the threshold voltage is VT
is negative, so the given first analog signal
Under the condition of operating within the range of vg and in the triode region, the range of the second analog signal vd can be widened. As a result, the dynamic range is expanded. Furthermore, the analog signal mentioned above
The input method for vg and vd is hereinafter referred to as a first input method.

Next, another input method, that is, a second input method will be explained. In this method, as in the first input method, the first analog signal vg is applied to terminal 3, the second analog signal vd is applied to terminal 1, and terminal 2 is grounded. However, the first terminal to ground terminal 4
Unlike the input method, in this method, the first
A complementary signal of the analog signal vg, that is, -vg is applied. Although a detailed explanation will be omitted here, as a result, the output voltage obtained from the terminal 58 is proportional to the product of vg and vd. However, the value is twice that of the first input method. Furthermore, according to the second input method, it is possible to almost eliminate the second harmonic component of vg included in the multiplication result. Until now, we have assumed that this is constant, but
The characteristic constant B is actually a nonlinear function of the input signal vg
The influence of the first MOST70 and the second MOST8
This is because by applying complementary signals and -vg to the gates of 0, it is possible to cancel each other.

Next, another input method, ie, a third input method, will be explained. Similar to the first input method, this method also applies the first analog signal vg to the terminal 3, and
A second analog signal vd is applied to terminal 1 of , and terminal 4 is grounded. However, unlike the first input method in which the second terminal 2 is grounded, in the third method, a complementary signal of the second analog signal vd, that is, -vd is applied to the second terminal 2. It is. Although a detailed explanation of the operating system will be omitted here, it is clear that in this case as well, an analog signal proportional to the multiplication result of vg and vd can be obtained from the terminal 58.
In this case as well, the size of the multiplication result is twice that of the first method. This method also has the advantage of significantly reducing harmonic components compared to the first input method. That is, in the first input method, vd
When is positive, the backgate effect of the first and second MOST is maximum and constant, so VT
The absolute value of is small, and under the given conditions, 3
The range of vg and vd that satisfies the operation in the polar region is small. On the other hand, when vd is negative, the backgate effect is small, and therefore the absolute value of VT is large, so that the range of vg and vd that satisfies the operation of the triode region under given conditions is expanded. However, in the case of the third input method, the backgate effect is small regardless of the polarity of vd, so the absolute value of VT also becomes large, satisfying the operation in the triode region.
A wide range of VG and VD is available. Therefore, the third input method can extremely limit the harmonic components included in the multiplication result.

Next, another input method, ie, a fourth input method, will be explained. In this method, the first analog signal vg and its complementary signal -vg are sent to terminals 3 and 4, respectively.
and a second analog signal vd and its complementary signal -vd are applied to the first terminal 1 and the second terminal 2, respectively. These signals are the first MOST
If MOST 70 and second MOST 80 are set to operate in the triode region, an output signal proportional to the product of vg and vd will be obtained from terminal 58. However, in this case, the value of the output signal is 4 times that of the first input method.
twice that of the second or third input method. As is clear from the previous explanation, if this input method is used, distortion components are extremely small.
A four-quadrant analog signal multiplication with an extremely large dynamic range is achieved.

FIG. 3 shows another example of the specific circuit configuration of the four-quadrant analog signal multiplication circuit of the present invention. 70,80
, like 70 and 80 in FIG. 2, are depletion type MOSTs whose electrical characteristics are exactly equal to each other or whose electrical characteristics are very close to each other.
1, 2, 3, and 4 are terminals to which input signals are applied, and correspond to terminals 1, 2, 3, and 4 in FIG. 2, respectively.
Reference numeral 130 denotes a first I/V conversion circuit, which is essentially an integrating circuit composed of an operational amplifier 131, a capacitor 132, and an analog switch 133. 1
Reference numeral 40 denotes a second I/V conversion circuit, which is essentially an integrating circuit composed of an operational amplifier 141, a capacitor 142, and an analog switch 143. 15
0 is capacitor 151, analog switch 15
2,153,154,155, operational amplifier 15
6, capacitor 157, analog switch 158
This is a subtraction circuit consisting of. 134,14
4, 135, 145, 159, 160, and 161 are terminals, respectively. Also in this circuit, by using the first, second, third, and fourth input methods, two analog signals vg and
An output signal proportional to the product of vd is obtained, achieving four-quadrant analog signal multiplication. Below, the first
The operation of this circuit will be briefly explained using the following input method. A first analog signal vg is applied to terminal 3, a second analog signal vd is applied to first terminal 1, and the second
When terminals 2 and 4 are grounded, the first MOST
70, the drain current IP (Equation (5), Equation (7)) and drain current IN (Equation (6)) are applied to the second MOST 80, respectively.
Equation (8)) flows. The currents IP and IN are during the period when the analog switches 133 and 143 are open,
The signals are integrated into capacitors 132 and 142, respectively. Therefore, a voltage signal proportional to IP and IN appears at the output terminal of each I/V conversion circuit 130 and 140. Next, analog switch 1 of subtraction circuit 150
52, 153 close and then open, terminals 135,
145 voltage signals, i.e.
A signal proportional to the product of vg and vd is stored in the capacitor 151 in the form of electric charge. In addition, the switch 15
2,153 is closed analog switch 1
58 is also closed at the same time, and the signal charge accumulated in the capacitor 157 from the previous period is transferred to the analog switch 1.
58. Next, analog switch 1
54, 155 close and then open, capacitor 1
The signal charge accumulated in capacitor 51 is transferred to capacitor 157, and an output signal proportional to the product of vg and vd can be obtained from terminal 161.

The configuration and input method of the four-quadrant analog multiplier circuit of the present invention have been described above. In the above example, the first I/V conversion circuit, the second I/V conversion circuit, and the subtraction circuit each consist of an operational amplifier and a resistor element, or a circuit that consists of an operational amplifier, a capacitor, and an analog switch. However, the circuit configuration is not limited to the above circuit configuration as long as each circuit exhibits a desired function.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a conventional four-quadrant analog signal multiplication circuit, FIG. 2 is a specific configuration diagram of a four-quadrant analog signal multiplication circuit of the present invention, and FIG. 3 is a configuration diagram of a four-quadrant analog signal multiplication circuit of the present invention. It is another specific block diagram. In FIG. 1, 10 and 20 are enhancement type MOSTs, 30 and 40 are current/voltage conversion circuits,
50 is a subtraction circuit, 100, 300 is an analog signal source, 101, 301 is a level shifter, 102, 3
02 is a DC voltage source. In Figure 2, 70,
80 is depletion type MOST, 30, 40
5 is a current/voltage conversion circuit, and 50 is a subtraction circuit.
In FIG. 3, 70 and 80 are depletion type MOSTs, 130 and 140 are current/voltage conversion circuits using an integrating circuit, and 150 is a subtraction circuit.
1 and 2, 31, 41, 51 are operational amplifiers, 32, 42, 52, 53, 54, 55
is a resistive element. In Figure 3, 131,1
41, 156 is an operational amplifier, 132, 142, 1
51,157 is a capacitor, 133,143,1
52, 153, 154, 155, and 158 are analog switches.

Claims (1)

[Claims] 1. A first MOS type field effect transistor (hereinafter referred to as
a second MOST whose electrical characteristics are equal to or very similar to those of the first MOST; a second MOST that includes at least an operational amplifier; Voltage conversion circuit (hereinafter referred to as I/V conversion circuit)
and a second I/V conversion circuit that has the same configuration as the first I/V conversion circuit and converts the drain current flowing through the second MOST into a voltage, and an output of the first I/V conversion circuit. a subtraction circuit for obtaining a difference between the signal and the output signal of the second I/V conversion circuit;
the drain (or source) of MOST and the second
The drain (or source) of the MOST is connected to a first terminal, and the non-inverting input of the first I/V conversion circuit and the non-inverting input of the second I/V conversion circuit are connected to the second terminal. The source (or drain) of the first MOST is connected to the inverting input of the first I/V conversion circuit, and the source (or drain) of the second MOST is connected to the inverting input of the second I/V conversion circuit. the output of the first I/V conversion circuit is connected to one input of the subtraction circuit;
A four-quadrant analog signal multiplication circuit in which an output of an I/V conversion circuit is connected to the other input of the subtraction circuit, wherein the first MOST and the second MOST are of a depletion type. Quadrant analog signal multiplier circuit. 2 The first MOST, the electrical characteristics of which are the same as those of the first MOST.
A second value that is equal to or very close to MOST.
MOST, including at least an operational amplifier, the first
a first I/V conversion circuit that converts the drain current flowing through the MOST into a voltage, and a second I/V conversion circuit that has the same configuration as the first I/V conversion circuit and converts the drain current flowing through the second MOST into voltage. I/V conversion circuit, the output signal of the first I/V conversion circuit and the second I/V conversion circuit
A subtraction circuit is provided to obtain a difference between the output signal of the I/V conversion circuit and the drain (or source) of the first MOST and the drain (or source) of the second MOST are connected to the first terminal. , the first I/
A non-inverting input of the V conversion circuit and a non-inverting input of the second I/V conversion circuit are connected to a second terminal, and the first
The source (or drain) of MOST of is connected to the inverting input of the first I/V conversion circuit, and
The source (or drain) of MOST is connected to the inverting input of the second I/V conversion circuit, the output of the first I/V conversion circuit is connected to one input of the subtraction circuit, and the second The output of the I/V conversion circuit is connected to the other input of the subtraction circuit, and the output of the I/V conversion circuit is connected to the other input of the subtraction circuit.
In a four-quadrant analog signal multiplier circuit in which the MOST and the second MOST are depletion type, the first
The first analog input signal vg to the gate of MOST of
a second analog input signal vd to the first terminal, and a second analog input signal vd to the gate of the second MOST and the second
A four-image range analog signal multiplication circuit characterized in that each terminal of the circuit is grounded. 3. The first MOST, the electrical characteristics of which are the same as the first MOST.
a second equal to or very close to MOST
MOST, including at least an operational amplifier, the first
a first I/V conversion circuit that converts the drain current flowing through the MOST into a voltage, and a second I/V conversion circuit that has the same configuration as the first I/V conversion circuit and converts the drain current flowing through the second MOST into voltage. I/V conversion circuit, the output signal of the first I/V conversion circuit and the second I/V conversion circuit
A subtraction circuit is provided to obtain a difference between the output signal of the I/V conversion circuit and the drain (or source) of the first MOST and the drain (or source) of the second MOST are connected to the first terminal. , the first I/
A non-inverting input of the V conversion circuit and a non-inverting input of the second I/V conversion circuit are connected to a second terminal, and the first
The source (or drain) of MOST of is connected to the inverting input of the first I/V conversion circuit, and
The source (or drain) of MOST is connected to the inverting input of the second I/V conversion circuit, the output of the first I/V conversion circuit is connected to one input of the subtraction circuit, and the second The output of the I/V conversion circuit is connected to the other input of the subtraction circuit, and the output of the I/V conversion circuit is connected to the other input of the subtraction circuit.
In a four-quadrant analog signal multiplier circuit in which the MOST and the second MOS are depletion type, the first
A signal -vg complementary to the first analog input signal vg and vg is supplied to the gate of the MOST and the gate of the second MOST, respectively, a second analog input signal vd is supplied to the first terminal, and the second analog input signal vd is supplied to the gate of the second MOST. A four-image range analog signal multiplication circuit characterized in that a second terminal is grounded. 4 the first MOST, the electrical characteristics of which are
A second value that is equal to or very close to MOST.
MOST, including at least an operational amplifier, the first
a first I/V conversion circuit that converts the drain current flowing through the MOST into a voltage, and a second I/V conversion circuit that has the same configuration as the first I/V conversion circuit and converts the drain current flowing through the second MOST into voltage. I/V conversion circuit, the output signal of the first I/V conversion circuit and the second I/V conversion circuit
A subtraction circuit is provided to obtain a difference between the output signal of the I/V conversion circuit and the drain (or source) of the first MOST and the drain (or source) of the second MOST are connected to the first terminal. , the first I/
A non-inverting input of the V conversion circuit and a non-inverting input of the second I/V conversion circuit are connected to a second terminal, and the first
The source (or drain) of MOST of is connected to the inverting input of the first I/V conversion circuit, and
The source (or drain) of MOST is connected to the inverting input of the second I/V conversion circuit, the output of the first I/V conversion circuit is connected to one input of the subtraction circuit, and the second The output of the I/V conversion circuit is connected to the other input of the subtraction circuit, and the output of the I/V conversion circuit is connected to the other input of the subtraction circuit.
In a four-quadrant analog signal multiplier circuit in which a MOST and the second MOST are depletion type, a first analog input signal is input to the gate of the first MOST.
vg and second analog input signals vd and vd to the first terminal and the second terminal, respectively.
A four-image range analog signal multiplier circuit, characterized in that it supplies a signal -vd complementary to the second MOST, and grounds the gate of the second MOST. 5 The first MOST, the electrical characteristics of which are
A second value that is equal to or very close to MOST.
MOST, including at least an operational amplifier, the first
a first I/V conversion circuit that converts the drain current flowing through the MOST into a voltage, and a second I/V conversion circuit that has the same configuration as the first I/V conversion circuit and converts the drain current flowing through the second MOST into voltage. I/V conversion circuit, the output signal of the first I/V conversion circuit and the second I/V conversion circuit
A subtraction circuit is provided to obtain a difference between the output signal of the I/V conversion circuit and the drain (or source) of the first MOST and the drain (or source) of the second MOST are connected to the first terminal. , the first I/
A non-inverting input of the V conversion circuit and a non-inverting input of the second I/V conversion circuit are connected to a second terminal, and the first
The source (or drain) of MOST of is connected to the inverting input of the first I/V conversion circuit, and
The source (or drain) of MOST is connected to the inverting input of the second I/V conversion circuit, the output of the first I/V conversion circuit is connected to one input of the subtraction circuit, and the second The output of the I/V conversion circuit is connected to the other input of the subtraction circuit, and the output of the I/V conversion circuit is connected to the other input of the subtraction circuit.
In a four-quadrant analog signal multiplier circuit in which the MOST and the second MOST are depletion type, the first
A first analog input signal vg, a signal -vg complementary to vg is supplied to the gate of the MOST and a gate of the second MOST, respectively, and a second analog input signal is supplied to the first terminal and the second terminal, respectively. signal
A four-image range analog signal multiplier circuit characterized in that it supplies a signal -vd complementary to vd and vd.