JPS59188780A - Four quadrant analog signal multiplication circuit - Google Patents

Abstract

PURPOSE:To decrease harmonic distortion and to widen dynamic range by providing the 1st and 2nd D type MOSFETs, the 1st and 2nd current/voltage (I/V) converting circuit and a subtraction circuit. CONSTITUTION:An analog signal vg changed around a grounding level is impressed to a gate of an MOST70 from a terminal 3 and an analog signal vd changed around the grounding level is impressed to a drain of MOSTs 70 and 80 from a terminal 1 respectively. When the vd is positive, a current IP flowing to the MOST70 and a current IN flowing to the MOST80 are given respectively by IP=B(vg-VT-vd/2).vd and IN=B(-VT-vd/2).vd independently of the polarity of the vg, and when the vd is negative, the currents are given as IP=B(- vg-vd-VT+vd/2).(-vd) and IN=B(-vd-VT+vd/2).(-vd). Since the IP flows via a resistive element 32, the current is converted into a voltage by the I/V converting circuit 30 and outputted 35 as a voltage signal proportional to the IP. Similarly, the IN is outputted 45 as a signal proportional to the IN.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrated four-quadrant analog signal multiplier circuit for multiplying two analog electrical signals together.

Analog multiplication circuits, like delay lines, subtraction circuits, or addition circuits, are important basic circuits constituting analog integrated circuits such as analog signal processors. Compared to digital integrated circuits, analog integrated circuits have features such as extremely small circuit scale, extremely small power consumption, and extremely high processing speed, and are extremely advantageous in realizing high-speed, wide-bandwidth, and small-sized integrated circuits. However, analog integrated circuits have the disadvantage of deteriorating the characteristics of the integrated circuit because they generate harmonic distortion that is unique to analog systems.

SUMMARY OF THE INVENTION An object of the present invention is to provide a four-quadrant analog signal multiplication circuit characterized by a smaller circuit scale than conventional multiplication circuits. Another object of the present invention is to provide a multiplication circuit that can significantly improve harmonic distortion, which is a drawback of analog systems.

According to the present invention, the first MO8T and the second MO8T have electrical characteristics that are equal to or very similar to the first MO8T.
8'll'', including at least an operational amplifier, the first H
A first I/V conversion circuit that converts the drain current flowing through the O8T into voltage, having the same configuration as the first I/V conversion circuit,
and a second I/V conversion circuit that converts the drain current flowing through the second MO8T into a voltage, and an output signal between the output signal of the first I/V conversion circuit and the output signal of the second I/V conversion circuit. The drain of the first 810sT (
or source) and the drain (still source) of the second MO8T are connected to the first terminal, and the non-inverting input of the first I/V conversion circuit and the non-inverting input of the second I/V conversion circuit is the second
The source (or drain) of the first MO8T is connected to the inverting input of the first I/V conversion circuit, and the source (or drain) of the first MO8T is connected to the terminal of the second MO8T.
The source (or drain) of 8'l' is the inverting input of the second I/V conversion circuit, the output of the first I/V conversion circuit is one input of the subtraction circuit, and the second /V conversion circuit outputs are respectively connected to the other input of the subtraction circuit,
It is an object of the present invention to provide a four-quadrant analog multiplication circuit in which the first MO8'l' and the second MO8T are depletion type. Another object of the present invention is that the first MO8'l'
, a second MO8T whose electrical characteristics are equal to or very similar to the first MO8T; a first I/V conversion circuit that includes at least an operational amplifier and converts a drain current flowing through the first MO8T into a voltage; a second I/V conversion circuit that has the same configuration as the first I/V conversion circuit and converts the drain current flowing through the second MO8T into a voltage;
a subtraction circuit for obtaining a difference between the output signal of the V conversion circuit and the output signal of the second I/V conversion circuit;
The drain (or source) of l' and the drain (or source) of the second HO8T are connected to the first terminal, and the drain (or source) of the second HO8T is connected to the first terminal.
The non-inverting input of the /V conversion circuit and the non-inverting input of the second I/V conversion circuit are connected to the second terminal, and the source (or drain) of the first MO8'l' is connected to the first terminal /V. The source (or drain) of the second MO8T is connected to the inverting input of the conversion circuit.
is connected to the inverting input of the second I/V conversion circuit, and the first input/V
The output of the conversion circuit is connected to one input of the subtraction circuit, and the output of the second I/'V conversion circuit is connected to the other input of the subtraction circuit.
The first MO8'l' and the second H
In a four-quadrant analog signal multiplication circuit in which the O8T is a depletion type, a first analog input signal vg is supplied to the gate of the first HO8T, a second analog input signal vd is supplied to the first terminal, and An input method is provided in which the gate of the second MO8T and the second terminal are respectively grounded. Further, according to the invention, the first MO8T, a second HO8T whose electrical characteristics are equal to or very similar to the first MO8T, includes at least an operational amplifier, and has a drain flowing into the first NO ST. a first I/V conversion circuit that converts current into voltage; a second IA' conversion circuit that has the same configuration as the first I/V conversion circuit and converts the drain current flowing through the second MO8T into voltage; , the first I/V
a subtraction circuit that obtains a difference between the output signal of the conversion circuit and the output signal of the second I/V conversion circuit, and the first MO8'['
The drain (or source) of the second MO8T is connected to the first terminal, and the non-inverting input of the first I/V conversion circuit and the second I/V conversion circuit are connected to each other. The non-inverting input of the circuit is connected to the second terminal, the source (! or drain) of the first MO8T.
is the inverting input of the first I/V conversion circuit, and the second MO8
The source (or drain) of T is the inverting input of the second I/V conversion circuit, the output of the first I/V conversion circuit is one input of the subtraction circuit, and the second I/V conversion The outputs of the circuits are respectively connected to the other input of the subtraction circuit;
In a four-quadrant analog signal multiplier circuit in which the first MO8T and the second MO8T are depletion type, the first MO8T
supplying a first analog input signal vg and a signal -vg complementary to vg to the gate of 'l' and the gate of the second MO8T, respectively; supplying a second analog input signal vd to the first terminal; The present invention provides an input method for grounding the second terminal.Furthermore, the present invention provides an input method for grounding the second terminal.
of the first M08T, including at least an operational amplifier;
The second I converts the drain current flowing through O8T into voltage.
/V conversion circuit, having the same configuration as the first I/V conversion circuit,
and a second I/V conversion circuit that converts the drain current flowing through the second MO8T into a voltage, and an output signal between the output signal of the first I/V conversion circuit and the output signal of the second I/V conversion circuit. a subtraction circuit for obtaining a difference, the drain (or source) of the first MO8T and the drain (or source) of the second MO8T are connected to a first terminal, and a non-inverting circuit of the first I/V conversion circuit is provided. The input and the non-inverting input of the second I/V conversion circuit are connected to the second terminal, and the source (or drain) of the first MO8T
is applied to the inverting input of the first power/V conversion circuit, and the second Δ10
The source (or drain) of sT is connected to the inverting input of the second I/V conversion circuit, the output of the first I/V conversion circuit is connected to one input of the subtraction circuit, and the second I/V conversion In a four-quadrant analog signal multiplication circuit, the outputs of the circuits are respectively connected to the other inputs of the subtraction circuit, and the first MO8T and the second MO8'[' are depletion type;
the first analog input signal vg to the gate of HO8T,
An input method is provided in which a second analog input signal vd and a signal -vcl complementary to vd are supplied to the first terminal and the second terminal, respectively, and the gate of the second MO8T is grounded.

Further, according to the present invention, the first HOST includes a second MO8T whose electrical characteristics are equal to or very similar to those of the first MO8T, and includes at least an operational amplifier; 1i: A first I/V conversion circuit that converts the drain current flowing through the O8T into a voltage, and a first I/V conversion circuit that has the same configuration as the first I/V conversion circuit and converts the drain current flowing through the second MO8T into a voltage. a second I/V conversion circuit, a subtraction circuit that obtains the difference between the output signal of the first I/V conversion circuit and the output signal of the second I/V conversion circuit, and the drain of the first MO8T. (or source) and the drain (or source) of the second MO8T (
or source) to the first terminal, the non-inverting input of the first I/V conversion circuit and the non-inverting input of the second I/V conversion circuit to the second terminal, and the non-inverting input of the first I/V conversion circuit to the second terminal. The source (or drain) is connected to the inverting input of the first I/V conversion circuit, and the second
The source (or drain) of MO8T is connected to the second I/V
The output of the first I/V conversion circuit is connected to an inverting input of the conversion circuit, the output of the first I/V conversion circuit is connected to one input of the subtraction circuit, and the output of the second I/V conversion circuit is connected to the other input of the subtraction circuit. in a four-quadrant analog signal multiplier circuit in which the first MO8'l' and the second MO8'I' are depletion type, the gate of the first MO8T and the second MO8T
A signal -vg complementary to the first analog input signals yg and vg is supplied to the gates of the gates, respectively, and a signal -yd complementary to the second analog input signals vd and vd is supplied to the first terminal and the second terminal, respectively. An input method that supplies

This will be explained in detail below using the drawings. FIG. 1 shows, as an example, the configuration of a conventional four-quadrant analog signal multiplication circuit (hereinafter referred to as a multiplication circuit).

101aJ:1 MO8S enhancement type field effect transistor (hereinafter referred to as tube 1 MO8'll')
.

20 is a second MO8T whose electrical characteristics are exactly the same as or very similar to those of the first MO8TIO. 30 and 40 are the first HO8TIO and the second MO8T20, respectively
A first current/voltage conversion circuit (hereinafter referred to as an I/V conversion circuit) and a second I/V provided to convert the drain current IP flowing through the MO8T20 and the drain current IN flowing through the second MO8T20 into voltages. It is a conversion circuit. Here -
As an example, the operational amplifier 31 (41) and the resistor element 32 (42
) The first (second) I/V conversion circuit 30 (
40) is shown. 50 is the first I/V conversion circuit 3
This is a subtraction circuit provided to obtain the difference between the output signal of 0 and the output signal of the second I/V conversion circuit 40. Here - as an example, an operational amplifier 51, resistive elements 52, 53, 54, 55
A subtractor circuit is shown that is constructed from the following. 300 is a signal source of the first analog signal vg to be multiplied; 301 is a first level shifter provided to superimpose the DC voltage VG on the vg;
g17) Move the level to the level of the corresponding V G * Me (7)
This is a circuit for l/hell shift. Similarly, 100 is the signal source of the second analog signal vd to be multiplied, and 101 is the signal source of the second analog signal vd to be multiplied.
This is a second level shifter provided to superimpose DC voltage VD on voltage VD. 102 and 302 are DC voltage sources with voltage values VD and VG, respectively. Therefore, VD+vd is applied to terminal 1, VD is applied to terminal 2, and VD is applied to terminal 3.
G+vg and VG are applied to terminal 4, respectively. Note that these voltage values are within a range in which the first and second MO8Ts operate in the triode region. The following description will be made assuming that the first and second enhancement type MO8T are n-channel denoisseurs, and that VD and VG are positive DC voltages. Note that vg and vd may have either positive or negative signs. Now when vd is positive, the first M
The drain current IP flowing in O8'J'IO and the drain current IN flowing in second HO8T20 are respectively IP=B(VG+vg-VD-vd/2-VT) ・v
d (1) IN=B (VG=VD-v d/2-
VT ) ·v d (2). Here B and VT are the characteristic constants and threshold voltages of both MO8Ts, respectively.

If Naori d is positive, IP and IN are each arrow 1
1 and 21. On the other hand, when vd is negative, IP
and IN flow in the direction opposite to arrows 11 and 21;
Each IP=B(VG+vg-VD-vd+vd/2-VT)
・(-vd)
(3) IN=El(VG-VD-vd+vd/2-VT
) ・(-vd) (4) is given. IP and IN
flows through the resistive elements 32 and 42, respectively, producing voltage drops between terminals 33 and 35 and 43 and 45, respectively.

Therefore, the voltage appearing at the output terminal 35 of the first I/V conversion circuit 30 is the DC voltage VD applied from the terminal 34 minus the voltage drop (proportional to IP) occurring across the resistance element 32. . Similarly, the voltage appearing at the terminal 45 is derived from the DC voltage VD applied from the terminal 44 to the resistance element 42.
This is the value obtained by subtracting the voltage drop (proportional to IN) that occurs in . Therefore, if the signal voltages at terminals 35 and 45, that is, the signal voltages at terminals 56 and 57, are subtracted by the subtraction circuit 50, the first analog signal vg and the second analog signal v
A result proportional to the product of d is obtained at terminal 58. The proportionality constant is the above B, VT and resistance element 32°42.52,5
It is given by a resistance value of 3,54.55.

The operation of the conventional multiplication circuit has been described above in detail. A drawback of the conventional multiplication circuit is that the level shifter 301 and the DC power supply 302 are always required, which makes the circuit scale and configuration complicated. This is because the first and second MO8TI 0.20 are of the enhancement type, and therefore a bias voltage is necessarily required between the gate and source in order for these MO8Ts to turn on. Furthermore, since VT is positive, the range of drain voltage that satisfies the conditions for MO8T to operate in the triode region within a given gate voltage is limited and narrow. Therefore, there is a drawback that a large dynamic range cannot be obtained.The object of the present invention is to eliminate the drawbacks of the conventional multiplier circuit described above, to miniaturize the circuit board, and to greatly reduce harmonic distortion, thereby increasing the dynamic range. This provides a wide four-quadrant analog signal multiplication circuit.

FIG. 2 is an example of a specific circuit configuration of a four-quadrant analog signal multiplication circuit according to the present invention. 70 is a depletion type first Mos'r, 80 is a second MO8T whose electrical characteristics are exactly the same as or very similar to those of the first MO8T.
It is. 30 is a first terminal connected to the first I/V conversion (or source), and 2 is a second terminal. 33 (4
3) and 34 (44) are the first (second) i
These are the inverting input and non-inverting input of the /V conversion circuit. 58
is the output terminal that obtains the multiplication result. In FIG. 2, components having the same functions as those in FIG. 1 are indicated using the same numbers. In the following, the MO8T is n
The following explanation assumes that it is a channel device.

A first analog signal vg that changes around the ground level is applied from the coupling terminal 3 to the gate of the MO8T70, and a first analog signal vg that changes around the ground level is applied from the first terminal 1 to the drains (or sources) of the MO8T70 and MO8T80. It is assumed that the analog signal vd of 2 is applied. Further, the gate of the second MO8T80 is set to zero V by grounding the terminal 4. Furthermore, the other source (or drain) of the first MO8T70 and the second MO8T80
By grounding the second terminal 2, υ is set to zero through the first I/V conversion circuit and the second I/V conversion circuit, respectively. The polarity of naori d and vg is positive,
It can take either negative sign. These values are now set within a range in which the MO8T70.80 operates in the three-pole region. Now when vd is positive, the current IP flowing through the first MO8T and the second MO8T8 regardless of the polarity of vg.
The drain current IN flowing to 0 is IP=B(vg-VT-vd/2)-vd
(5) IN=B(-VT-vd/2)・vd
(6), given by arrows 11 and 12, respectively.
flows in the direction of On the other hand, if vd is negative, regardless of the polarity of vg, IP and IN are IP = B (vg - vd - VT + vd/2) · (-vd)
(7) IN=B(-yd-VT+vd/2)・(-vd
) is given by (8). In this case IP and IN
flows in the direction opposite to arrows 11 and 12. Since the IP flows through the resistance element 32, it is converted into a stain pressure by the first I/V conversion circuit 30, and outputted to the terminal 35 as a voltage number proportional to the IP. Similarly, IN is also output to the terminal 45 as a voltage signal proportional to IN. These voltage signals are subtracted from each other by a subtraction circuit 50, resulting in a first analog signal vg and a second analog signal vd.
A voltage signal proportional to the product of is output to terminal 58. In this case as well, the proportionality constant is B, and the resistance elements 32, 42, 52, 53
It is given by a resistance value of 54.55°. As is clear from the above results, the multiplication circuit of the present invention does not require an input signal level shifter or a DC power supply, which are required by conventional multiplication circuits, so the circuit configuration is extremely simple and the power consumption is low. Further, since the threshold voltage VT is negative, the range of the second analog signal vd can be widened under the conditions of operating within the range of the given first analog signal vg and in the triode region. As a result, the dynamic range is expanded. Furthermore, the analog signal 1v g mentioned above.

The input method of vd is hereinafter referred to as the first input method.

Next, another input method, that is, a second input method will be explained.

In this method, as well as the above-mentioned first input method, the first
A second analog signal vg is applied to terminal 1, and a second analog signal vd is applied to terminal 1, and terminal 2 is grounded. However, unlike the first input method in which the terminal 4 is grounded, in this method, a complementary signal of the first analog signal vg, that is, −
Apply vg. Although a detailed explanation will be omitted here, as a result, the output voltage obtained from the terminal 58 is proportional to the product of vg and vd. However, the value is twice that of the first input method. Furthermore, according to the second manual method, it is possible to almost eliminate the second harmonic component of vg included in the multiplication result. Until now, we have assumed that this is constant, but in reality, the influence of the characteristic constant B, which is a nonlinear function of the input signal vg, is
~(Complementary signals and oi' to the gates of O8T80, respectively)
This is because by applying -yg, it becomes possible to cancel each other out.

Next, another input method, ie, a third input method, will be explained. Similarly to the first input method, this method also applies the first analog signal vg to the terminal 3, the second analog signal vd to the first terminal 1, and the terminal 4 is grounded. However, the second
In the third input method, which is different from the first input method in which the terminal 2 of the terminal 2 is grounded, a complementary signal of the second analog signal vd, that is, -vd is applied to the second terminal 2. Although a detailed explanation of the operation method is omitted here, in this case also v
An analog signal proportional to the multiplication result of g and vd is sent to terminal 58.
The benefits are obvious.

In this case as well, the size of the multiplication result is twice that of the first method. This method also has the advantage of significantly reducing harmonic components compared to the first manual method. That is,
In the first input method, when vd is positive, the back gate effect of the first and second MO8Ts is maximum and constant, so the absolute value of VT is small, and under the given conditions, The range of vg and vd that satisfies operation in the triode region is small. On the other hand, when vd is negative, the backgate effect is small and therefore the absolute value of VT is large, so the range of vg and vd that satisfies the operation of the triode region under given conditions is expanded. However, in the case of the third input method, the back gate effect is small regardless of the polarity of vd, so the absolute value of VT is also small, and the range of vg and vd that satisfies the operation of the triode region is widened. be able to. Therefore, the third manual method can extremely limit the harmonic components included in the multiplication result.

Next, another manual input method, ie, a fourth input method, will be explained.

In this method, the first analog signal vg and its complementary signal -v
g is applied to terminals 3 and 4, respectively, and a second analog signal vd and its complementary signal -vd are applied to first terminal 1 and second terminal 2, respectively. If these signals are set in a range where the first MO8T70 and the second MO8T80 operate in the triode region, an output signal proportional to the product of g and vd can be obtained from the terminal 58. However, in this case, the output The value of the signal is four times that of the first manual input method and twice that of the second or third input method.

If this input method is used, it is possible to achieve four-quadrant analog signal multiplication with extremely small distortion components and an extremely large dynamic range, as is clear from the above description.

FIG. 3 shows another example of the specific circuit configuration of the four-quadrant analog signal multiplier circuit of the present invention. 70.80 is 7 in Figure 2
Like 0.80, these are depletion type MO8Ts whose electrical characteristics are exactly the same or very close to each other. 1.2.3.4 are terminals to which input signals are applied, and correspond to terminals 1, 2, and 3.4 in FIG. 2, respectively. 130 is a first I/V conversion circuit, which is essentially an operational amplifier 131. Capacitor 132. This is an integrating circuit composed of an analog switch 133. 140 is an integral circuit formed. 150 is a capacitor 151, analog switches 152, 153, 154° 155, and an operational amplifier 156. Capacitor 157° Analog switch 158
This is a subtraction circuit that is constructed as follows. 134, 144, 13
5, 145, 159°, 160, and 161 are terminals, respectively. In this circuit as well, the above-mentioned first. Second. Third. By using the fourth manual method, 92 analog signals vg, ! : An output signal proportional to the product of vd is obtained, and four-quadrant analog signal multiplication is achieved.

The operation of this circuit will be briefly explained below using the first input method. The first analog signal vg is connected to the terminal 3.
A second analog signal vd is applied to the terminal 1 of the second terminal 2. When terminal 4 is grounded, the first MO8T70. Second
drain current IP (5th
), Equation (7)), drain current IN (Equation (6),
Equation (8)) flows. The current IP.

IN is integrated into capacitors 132 and 142 while analog switches 133 and 143 are open, respectively. Therefore, a voltage signal proportional to IP and IN appears at the output terminal of each I/V conversion circuit 130 and 140. Next, when the analog switches 152 and 153 of the subtraction circuit 150 are closed and then opened, a signal proportional to the difference between the voltage signals at the terminals 135 and 145, that is, a signal proportional to the product of vg and vd is generated in the form of an electric charge. Accumulated in capacitor 151. Note that while the switches 152 and 153 are closed, the analog switch 158 is also closed at the same time, and the signal charge accumulated in the capacitor 157 in the previous period is discharged via the analog switch 158. When analog switches 154 and 155 are then closed and then opened, the signal charge stored in capacitor 151 is transferred to capacitor 157, and an output signal proportional to the product of vg and vd can be obtained from terminal 161.

The configuration and input method of the four-quadrant analog multiplier circuit of the present invention have been described above. In the above, the first I/V conversion circuit, the second I/V conversion circuit
/V conversion circuit and subtraction circuit are each composed of an operational amplifier and a resistor element, or a circuit composed of an operational amplifier, a capacitor, and an analog switch. if,
The circuit configuration is not limited to the above circuit configuration.

[Brief explanation of the drawing]

Figure 1 is a configuration diagram of a conventional four-quadrant analog signal multiplication circuit.
FIG. 2 is a specific configuration diagram of the four-quadrant analog signal multiplication circuit of the present invention, and FIG. 3 is another specific configuration diagram of the four-quadrant analog signal multiplication circuit of the present invention. In Figure 1, 10.20 is M of the ennouncment type.
O8T, 30.40 is a current/voltage conversion circuit, 50 is a subtraction circuit, 100, 300 is an analog signal source, 101, 30
1 is a level shifter, and 102 and 302 are DC voltage sources. In Figure 2, 70.80 is the depletion type MO8
T130.40 is a current/voltage conversion circuit, and 50 is a subtraction circuit. In Figure 3, 70.80 is a depletion type MO
8T, 130, and 140 are current/voltage conversion circuits using integration circuits, and 150 is a subtraction circuit. In FIGS. 1 and 2, 31, 41.51 are operational amplifiers, and 32, 42, 52, 53, 54.55 are resistance elements. In Fig. 3, 131.141°156 is an operational amplifier, 132,142,151°157 is a capacitor, 133,143,152,153°154.155,
158 is an analog switch. 532

Claims (1)

[Claims] First MO8 field effect transistor (hereinafter referred to as MO8)
a second HO8T whose electrical characteristics are equal to or very similar to those of the first MO8'L'', which includes at least an operational amplifier and converts the drain current flowing through the first MO8'I' into a voltage; A first current/voltage conversion circuit (hereinafter referred to as an I/V conversion circuit) that has the same configuration as the first I/V conversion circuit and converts the drain current flowing through the second MO8'l' into a voltage. a second I/V conversion circuit that
a subtraction circuit for obtaining a difference between the output signal of the I/V conversion circuit and the output signal of the second I/V conversion circuit,
The drain (or source) of O8'l' and the second MO
The input (or source) of 8'I' is connected to the first terminal, and the first I/V conversion circuit or non-inverting input and the second
The non-inverting input of the I/V conversion circuit is connected to the second terminal, and the source (or drain) of the first MO8T is connected to the first
connected to the inverting input of the I/V conversion circuit of the second MO
The source (or drain) of 8T is connected to the inverting input of the second I/V conversion circuit, the output of the first I/V conversion circuit is connected to one input of the subtraction circuit, and the second I/
In a four-quadrant analog signal multiplication circuit in which the output of the V conversion circuit is connected to the other input of the subtraction circuit, the first MO
A four-quadrant analog signal multiplication circuit characterized in that the 8T and the second MO8T are depletion type. λ The first Δ(O8T, the electrical characteristics are those of the first MO8'
[a second MO8T that is equal to or very close to ', a first voltage/V conversion circuit that includes at least an operational amplifier and converts the drain current flowing through the first MO8T into a voltage;
The second I/V conversion circuit has the same configuration as the first I/V conversion circuit, and
A second circuit that converts the drain current flowing through O8'[' into voltage.
I/V conversion circuit, the output signal of the first I/V conversion circuit and the second I/V conversion circuit. a subtraction circuit for obtaining the difference between the output signal of the conversion circuit, the drain (or source) of the first MO8T and the drain (or source) of the second MO8T are connected to the first terminal, and the drain (or source) of the first MO8T is connected to the first terminal; The non-inverting input of the I/V conversion circuit and the non-inverting input of the second I/V conversion circuit are connected to the second terminal, and the source (still drain) of the first MO8T is connected to the first I/V conversion circuit. /V conversion circuit, the source (or drain) of the second MO8'I'' is connected to the inversion input of the second I/V conversion circuit, and the first I/V conversion circuit The output of the second I/V conversion circuit is connected to one input of the subtraction circuit, the output of the second I/V conversion circuit is connected to the other input of the subtraction circuit, and the first MO8T and the second MO8T
In a four-quadrant analog signal multiplication circuit in which MO8T is a depletion type, a first analog input signal vg is supplied to the gate of the first MO8T, a second analog input signal vd is supplied to the first terminal, and A four-quadrant analog signal multiplication circuit characterized in that the gate of MO8T of No. 2 and the second terminal are respectively grounded. 3. The first MO8T has electrical characteristics similar to that of the first MO8'l.
a second MO8T that is equal to or very close to "l", a first I/V conversion circuit that includes at least an operational amplifier and converts the drain current flowing through the first MO8T into a voltage;
The same configuration as the first I/V conversion circuit, and a second MO
a second I/V conversion circuit that converts the drain current flowing through 8'[' into a voltage; the difference between the output signal of the first I/V conversion circuit and the output signal of the second I/V conversion circuit; The drain (or source) of the first MO8T and the drain (or source) of the second MO8'I'' are provided.
is connected to the first terminal, and the non-inverting input of the first I/V conversion circuit and the non-inverting input of the second I/V conversion circuit are connected to the second terminal.
The source (or drain) of the first MO8T is connected to the inverting input of the first I/V conversion circuit, and the source (or drain) of the second MO8T is connected to the second I/V converter. connected to the inverting input of the V conversion circuit, and the first I
The output of the /V conversion circuit is connected to one input of the subtraction circuit, the output of the second I/V conversion circuit is connected to the other input of the subtraction circuit, and the first MO8T and the second MO8 of
In a four-quadrant analog signal multiplication circuit where 'l' is a depletion type, a signal -vg complementary to the first analog input signal vg+vg is applied to the gate of the first MO8'I' and the gate of the second MO8T, respectively. supply the first
A second τ analog input signal vd is supplied to the terminal of the second
A four-quadrant analog signal multiplier circuit characterized in that a terminal of the circuit is grounded. 4. The first HO8T has electrical characteristics similar to that of the first MO8'l.
a second MO8T that is equal to or very close to ', a first I/V conversion circuit that includes at least an operational amplifier and converts the drain current flowing through the first MO8T into a voltage; the first I/V conversion circuit; with the same configuration as, and the second MO8
$2 I/V that converts the drain current flowing through T into voltage
a conversion circuit, the output signal of the first I/V conversion circuit and the second I/V conversion circuit;
A subtraction circuit is provided to obtain a difference between the output signal of the I/V conversion circuit and the drain (or source) of the first MO8T and the drain (or source) of the second HO8T are connected to the first terminal. , the non-inverting input of the first I/V conversion circuit and the non-inverting input of the second I/V conversion circuit are connected to a second terminal, and the source (! is connected to the inverting input of the first I/V conversion circuit, and the source (or drain) of the second MO8T is connected to the second I/V conversion circuit.
/V conversion circuit, the output of the first I/V conversion circuit is connected to one input of the subtraction circuit, and the output of the second I/V conversion circuit is connected to the inverting input of the subtraction circuit. connected to the other input of the first MO8T and the second MO8'l''
In a four-quadrant analog signal multiplier circuit in which is a depletion type, a first analog input signal vg is supplied to the gate of the first MO8'I', and the first terminal and the second
second analog input signals vd and v respectively to the terminals of
A four-quadrant analog signal multiplier circuit characterized in that a signal -vd complementary to d is supplied and a gate of the second MO8T is grounded. 5. The first MO8T has electrical characteristics similar to that of the first MO8'I.
the second MO8'll' that is equal to or very close to '
, a first I/V conversion circuit that includes at least an operational amplifier and converts the drain current flowing through the first MO8T into a voltage; a drain current flowing through the second MO8T that has the same configuration as the tenth I/V conversion circuit; A/V conversion circuit for converting current into voltage, and a subtraction circuit for obtaining the difference between the output signal of the first I/V conversion circuit and the output signal of the second I/V conversion circuit. , the drain (or source) of the first MO8'I' and the drain (or source) of the second MO8T
is connected to the first terminal, and the non-inverting input of the first I/V conversion circuit and the non-inverting input of the second I/V conversion circuit are connected to the second terminal.
The source (or drain) of the first MO8T is connected to the inverting input of the first I/V conversion circuit, and the source (or drain) of the second ΔfO8T is connected to the second I/V converter. The output of the first I/V conversion circuit is connected to one input of the subtraction circuit, and the output of the second I/V conversion circuit is connected to the other input of the subtraction circuit. connected to the inputs of the first MO8T and the second MO8T.
In a four-quadrant analog signal multiplication circuit in which 8T is a depletion type, the gate of the first MO8T and the second
A signal -vg complementary to the first analog input signal vg+vg is supplied to the gates of MO8T of MO8T, and a second analog signal vd is supplied to the first terminal and the second terminal, respectively.
, vd and a complementary signal -vd.