JPH03145145A - Electronic component mounting board - Google Patents
Electronic component mounting boardInfo
- Publication number
- JPH03145145A JPH03145145A JP1283664A JP28366489A JPH03145145A JP H03145145 A JPH03145145 A JP H03145145A JP 1283664 A JP1283664 A JP 1283664A JP 28366489 A JP28366489 A JP 28366489A JP H03145145 A JPH03145145 A JP H03145145A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- component mounting
- base material
- conductor circuit
- inner end
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004020 conductor Substances 0.000 claims abstract description 53
- 239000000463 material Substances 0.000 claims abstract description 38
- 239000000758 substrate Substances 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 2
- 206010067482 No adverse event Diseases 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、電子部品搭載用基板に関し、特に基材上の導
体回路と電子部品搭載部の電子部品とを、ボンディング
ワイヤによって電気的に接続するようにした電子部品搭
載用基板に関するものである。Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a substrate for mounting electronic components, and in particular, a method for electrically connecting a conductive circuit on a base material and an electronic component on an electronic component mounting part using a bonding wire. The present invention relates to a board for mounting electronic components.
（従来の技術）
近年の電子部品それ自体は、半導体素子を代表としてそ
の高密度かつ小型化が図られてきており、これが機能す
るようにするためには電子部品搭載用基板に実装して装
置化しなければならない。そして、そのための電子部品
搭載用基板としては、これに外部接続端子となる部分を
予め形成しておき、これを利用して電子部品搭載装置を
他の装置等との電気的接続が行なえるようにしなければ
ならないものである。(Prior art) In recent years, electronic components themselves, typically semiconductor devices, have become more dense and smaller.In order to make them function, they must be mounted on electronic component mounting boards and mounted on devices. must be transformed into As a substrate for mounting electronic components for this purpose, a portion that will become an external connection terminal is formed in advance on this board, and this can be used to electrically connect the electronic component mounting device with other devices, etc. It is something that must be done.
このような電子部品搭載用基板の従来の例としては、第
６図及び第７図に示したようなものがあり、この従来の
電子部品搭載用基板（３０）においては、その導体回路
（１２）の口を基材（１１）上に直接形威して、この導
体回路（１２）の内端部（１３）と電子部品搭載部（１
２ａ）上の電子部品（２０）とをボンディングワイヤ（
１７）により電気的に接続するようにしたものである。Conventional examples of such electronic component mounting boards include those shown in FIGS. 6 and 7. In this conventional electronic component mounting board (30), the conductor circuit (12 ) is formed directly on the base material (11), and the inner end (13) of this conductor circuit (12) and the electronic component mounting part (1) are formed directly on the base material (11).
2a) Connect the electronic component (20) on the top with the bonding wire (
17) for electrical connection.
ところで、各ボンディングワイヤ（１７）はある高温で
各導体回路（１２）と接続しなければならないものであ
るため、上記のような電子部品搭載用基板（３０）にお
いては、その導体回路（１２）の内端部（１３）がボン
ディングの時の高温に十分耐えられるように基材（１１
）に確実に密着したものと構成する必要がある。しかし
ながら、各導体回路（１２）は基材（１１）に対して接
着剤によって一体化されることが多いため、特に近年の
電子部品搭載用基板のようにこれに形成すべき導体回路
（１２〉の幅が狭くなってきている現状においては、ボ
ンディング時の高温に十分耐え得るような導体回路（１
２）における内端部（１３）の基材（１１）に対する強
固な一体化は殆んど不可能に近いものとなってきている
のである。By the way, since each bonding wire (17) must be connected to each conductor circuit (12) at a certain high temperature, in the electronic component mounting board (30) as described above, the conductor circuit (12) The inner end portion (13) of the base material (11) can withstand high temperatures during bonding.
). However, since each conductor circuit (12) is often integrated with the base material (11) using an adhesive, the conductor circuit (12) to be formed on the base material (11) is particularly In the current situation where the width of conductor circuits (1
In 2), it has become almost impossible to firmly integrate the inner end (13) with the base material (11).
そこで、第８図及び第９図に示すような電子部品搭載用
基板（４０）が提案されてきている（例えば特開昭５５
−５６６３９号公報）。この電子部品搭載用基板（４０
〉は、各導体回路（１２）の内端部（１３）を基材（１
１）に形成した穴から個々に露出するように構成して、
この基材（１１）の穴から各ボンディングワイヤ（１７
）を通すようにしてポインディングするものであるが、
この構成を採用すると各式の周囲に位置する基材（１１
）が邪魔になるから、各導体回路（１２）間の間隔をあ
る一定以上のものにしなければならないため、各導体回
路（１２）の間隔を狭くする、すなわちファインパター
ン化をすることは困難なものである。具体的には、ボン
ディングワイヤ（１７）を打つための装置の先端は現在
最小でも直径０．３ｍｍ（以下ｍｍ直径のことを端にφ
と示す）であるため、基材（１１）側の穴は０．３φ以
上である必要があり、この穴をふさぐ各導体回路（１２
）は０．５φ以上のもの巳ならざるを得ない。従って、
各導体回路（１２）間のピッチは最小でも１．１ｍｍと
なり、これではファインパターン化は望めないのである
。Therefore, a substrate (40) for mounting electronic components as shown in FIGS.
-56639). This electronic component mounting board (40
> connects the inner end (13) of each conductor circuit (12) to the base material (1
1) so that they are individually exposed through the holes formed in
Each bonding wire (17
), but
If this configuration is adopted, the base material (11
) get in the way, so the spacing between each conductor circuit (12) must be at least a certain level, which makes it difficult to narrow the spacing between each conductor circuit (12), that is, to create a fine pattern. It is something. Specifically, the tip of the device for striking the bonding wire (17) currently has a minimum diameter of 0.3 mm (hereinafter referred to as mm diameter).
), the hole on the base material (11) side must be 0.3φ or more, and each conductor circuit (12
) must have a diameter of 0.5φ or more. Therefore,
The pitch between each conductor circuit (12) is at least 1.1 mm, and with this, fine patterning cannot be expected.
（発明が解決しようとする課題）
本発明は、以上のような実状に檻みてなされたもので、
その解決しようとする課題は、電子部品搭載用基板にお
ける導体回路のさらなるファイン化である。(Problem to be solved by the invention) The present invention has been made in view of the above-mentioned actual situation.
The problem to be solved is to further refine the conductor circuits on electronic component mounting boards.
そして、本発明の目的とするところは、ボンディングワ
イヤ（１７）による接続を確実に行うことができて、し
かも各導体回路（１２）のファイン化を図ることのでき
る電子部品搭載用基板（ｌＯ）を簡単な構成によって提
供することにある。The object of the present invention is to provide a substrate (lO) for mounting electronic components, which can securely connect with bonding wires (17) and further improve the fineness of each conductor circuit (12). The goal is to provide this through a simple configuration.
（課題を解決するための手段）
以上の課題を解決するために、本発明の採った手段は、
実施例において使用する符号を付して説明すると、
「多数の導体回路（１２）の内端を、各導体回路（１２
）を支持している基材（１１）の電子部品搭載部（１２
ａ）に向かうように形成するとともに、各導体回路（１
ｚ）の外端部（１４）を外部接続端子とすべく露出させ
るための第一の開口（１５）を基材（１１）に有する電
子部品搭載用基板（１０）において、第一の開口（１５
）と電子部品搭載部（１２ａ）との間に位置する基材（
１１）に、各導体回路（１２）の内端部（１３）を複数
まとめて露出させる第二の開口（１６）を形成して、
この第二の開口（１６）を通して、各導体回路（１２）
の内端部（１３）と電子部品搭載部（１２ａ）上の電子
部品（２０）とのボンディングワイヤ（１７）による電
気的接続を図れるようにしたことを特徴とする電子部品
搭載用基板（１０）Ｊ
である。(Means for Solving the Problems) In order to solve the above problems, the means taken by the present invention are as follows:
To explain with the reference numerals used in the examples, "the inner end of a large number of conductor circuits (12) is connected to each conductor circuit (12).
) of the base material (11) supporting the electronic component mounting portion (12
a), and each conductor circuit (1
In an electronic component mounting board (10) having a first opening (15) in the base material (11) for exposing the outer end (14) of the z) as an external connection terminal, the first opening ( 15
) and the electronic component mounting portion (12a).
11), a second opening (16) is formed in which a plurality of inner ends (13) of each conductor circuit (12) are exposed together, and each conductor circuit (12) is inserted through this second opening (16). )
An electronic component mounting board (10) characterized in that an electrical connection can be made between the inner end (13) of the electronic component (20) on the electronic component mounting portion (12a) using a bonding wire (17). ) J.
（発明の作用）
以上のように構成した本発明にかかる電子部品搭載用基
板（ｌＯ）の作用を、以下に図面を参照して説明する。(Function of the Invention) The function of the electronic component mounting board (lO) according to the present invention configured as above will be explained below with reference to the drawings.
まず、本発明に係る電子部品搭載用基板（１０）におい
ては、各導体回路（１２）の内端部（１３）を基材（１
１）に形成した第二開口（１６）によって複数同時に露
出させるようにしたから、各導体回路（１２）の内端部
（１３）に対するボンディングワイヤ（１７）の接続を
容易にしているのである。すなわち、ボンディングワイ
ヤ（１７）を打つための装置の先端が大きなものであっ
たとしても、これが基材（１１）によって邪魔されるこ
となく接続作業を行なうことが可能なのである。従って
、第二開口（１６）にて露出する各導体回路（１２）の
間隔を小さくすることが可能となっているのである。First, in the electronic component mounting board (10) according to the present invention, the inner end (13) of each conductor circuit (12) is connected to the base material (10).
Since a plurality of wires are exposed simultaneously through the second opening (16) formed in 1), the bonding wire (17) can be easily connected to the inner end (13) of each conductor circuit (12). That is, even if the tip of the device for driving the bonding wire (17) is large, it is possible to perform the connection work without the device being obstructed by the base material (11). Therefore, it is possible to reduce the distance between the conductor circuits (12) exposed through the second opening (16).
また、各導体回路（１２〉の内端部（１３）は、その両
側を基材（１１）側に固着してあり、しかもその露出す
る部分にボンディングワイヤ（１７）を接続するのであ
るから、ボンディングワイヤ（１７）のボンディング時
に加えられる熱が直接導体回路（１２）の基材（１４）
との固着部に悪影響を与えるものではなくなっており、
ファイン化した各導体回路（１２）に対するボンディン
グが十分可能となっているのである。Further, the inner end (13) of each conductor circuit (12>) is fixed on both sides to the base material (11), and the bonding wire (17) is connected to the exposed part. The heat applied during bonding of the bonding wire (17) is directly applied to the base material (14) of the conductor circuit (12).
It no longer has a negative effect on the parts that are attached to the
This makes it possible to fully bond each fine conductor circuit (12).
さらに、本発明に係る電子部品搭載用基板（１０）にお
いては、従来から形成されている第一開口（１５）の内
側に位置する基材（１１）に第二開口（１６）を形成す
ればよいのであるから、その製造は従来の方法をそのま
ま採用することにより行えるものとなっており、例えば
第一開口（１５）と第二開口（１６）とを基材（Ｉｔ）
に同時に形成することにより、当該電子部品搭載用基板
（１０）の製造は非常に簡単に行なえるのである。Furthermore, in the electronic component mounting board (10) according to the present invention, if the second opening (16) is formed in the base material (11) located inside the conventionally formed first opening (15). Since it is a good material, it can be manufactured by directly adopting the conventional method. For example, the first opening (15) and the second opening (16) are formed using the base material (It).
By forming both at the same time, the electronic component mounting board (10) can be manufactured very easily.
なお、第３図に示した実施例におけるように、第二開口
（１６）から露出する導体回路（１２）の内端部（１３
）に膨出部（１８）を積極的に形成するようにすれば、
この膨出部（１８）を利用してボンディングを確実かつ
容易に行なえるようにすることが可能となるだけでなく
、各導体回路（１２）のファイン化をも満足することが
可能となるものである。Note that, as in the embodiment shown in FIG. 3, the inner end (13) of the conductor circuit (12) exposed from the second opening (16)
), if the bulge (18) is actively formed,
Using this bulge (18), it is not only possible to perform bonding reliably and easily, but also it is possible to satisfy the requirement for finer design of each conductor circuit (12). It is.
（実施例）
次に本発明に係る電子部品搭載用基板（１０）を、図面
に示した各実施例に従って詳細に説明する。(Example) Next, the electronic component mounting board (10) according to the present invention will be described in detail according to each example shown in the drawings.
実」Ｌ例」２
第１図及び第２図は、本発明の第一実施例に係る電子部
品搭載用基板（ｌＯ）を示すものであり、基材（１１）
の図示裏面側に多数の導体回路（１２）を形成したもの
である。Actual "L Example" 2 FIGS. 1 and 2 show an electronic component mounting board (lO) according to the first embodiment of the present invention, in which the base material (11)
A large number of conductor circuits (12) are formed on the back side of the figure.
また、この電子部品搭載用基板（１０）には、その略中
心部に電子部品（２０）を搭載するための電子部品搭載
部（１２ａ）が形成してあり、各導体回路（１２）の内
端部（１３）はこの電子部品搭載部（１２ａ）に向けて
突出している。Further, this electronic component mounting board (10) has an electronic component mounting portion (12a) formed approximately in the center thereof for mounting an electronic component (20), and includes an electronic component mounting portion (12a) for mounting an electronic component (20). The end portion (13) protrudes toward the electronic component mounting portion (12a).
そして、この電子部品搭載用基板（ｌＯ）を構成してい
る基材（１１）には、第１図に示したように、電子部品
搭載部（１２ａ）の近傍に第二開口（１６）が形成して
あり、この第二開口（１６）の外側に第一開口（１５）
がそれぞれ形成しである。各第二開口（１６）は、各導
体回路（１２）の内端部（１３）をまとめて（図示した
実施例においては４本分）露出させるものであり、この
内端部（１３）の両側に位置する基材（１１）に対して
各内端部（１３）の両側が接着固定しである。As shown in FIG. 1, the base material (11) constituting the electronic component mounting board (lO) has a second opening (16) near the electronic component mounting portion (12a). A first opening (15) is formed on the outside of the second opening (16).
are formed respectively. Each second opening (16) exposes the inner end (13) of each conductor circuit (12) all at once (four in the illustrated embodiment), and exposes the inner end (13) of each conductor circuit (12). Both sides of each inner end (13) are adhesively fixed to base materials (11) located on both sides.
また、各第一開口（１５）は内端部（１３）の外端部（
１４）を露出させるものであり、この露出した外端部（
１４）は所謂アウターリードとなって、当該電子部品搭
載用基板（，１０）を使用して電子部品搭載装置を形成
したとき、外部接続端子となるものである。Moreover, each first opening (15) has an outer end (
14), and this exposed outer end (
14) serves as a so-called outer lead and becomes an external connection terminal when an electronic component mounting device is formed using the electronic component mounting board (, 10).
以上のように構成した電子部品搭載用基板（１０）に対
しては、第２図にて示したように、その電子部品搭載部
（１２ａ）上に電子部品（２０）が実装されるのであり
、この電子部品（２０）と各導体回路（１２）の内端部
（１３）とはボンディングワイヤ（１７）によって電気
的に接続されるのである。As shown in FIG. 2, the electronic component (20) is mounted on the electronic component mounting portion (12a) of the electronic component mounting board (10) configured as described above. The electronic component (20) and the inner end (13) of each conductor circuit (12) are electrically connected by a bonding wire (17).
笈血史１
第３図には、本発明の第二実施例に係る電子部品搭載用
基板（ｌＯ）の平面図が示してあり、この実施例におい
ては、各第二開口（１６）から露出する導体回路（１２
）の内端部（１３〉に膨出部（１８）がチドリ状に形成
したものである。その他の構成は、上記第一実施例と同
様であるので、同一部材に同一符号を伏してその説明を
省略する。Figure 3 shows a plan view of an electronic component mounting board (lO) according to a second embodiment of the present invention. conductor circuit (12
) has a bulge (18) formed in a staggered shape at the inner end (13).The rest of the structure is the same as that of the first embodiment, so the same members are denoted by the same reference numerals. The explanation will be omitted.
各膨出部（１８）は、各導体回路（１２）の内端部（１
３〉に対するボンディングワイヤ（１７）の接続を行な
い易いようにするものであり、また各導体回路（１２）
の間隔を大きくしないようにチドリ状、すなわち形成位
置を交互にしたものである。Each bulge (18) is connected to the inner end (1) of each conductor circuit (12).
3) to facilitate connection of the bonding wire (17) to each conductor circuit (12).
They are formed in a staggered pattern, that is, their formation positions are alternated so as not to increase the spacing between them.
笈眞班１
第４図及び第５図には、本発明の第三実施例が示してあ
り、この実施例の第一実施例と異なる点は、基材（１１
）の表側にも導体回路（１２）が形成しであることであ
る。その他の構成は第一実施例と同様である。A third embodiment of the present invention is shown in FIGS. 4 and 5, and the difference between this embodiment and the first embodiment is that the base material (11
) is also formed on the front side of the conductor circuit (12). The other configurations are the same as in the first embodiment.
すなわち、この第三実施例に係る電子部品搭載用基板（
ｌＯ）においては、基材（１１）の裏面側に形成した各
導体回路（１２）に対して、平面的にみた場合干渉しな
い位置であってかつ基材（１１）の表側に形成した別の
第二導体回路（１９）を有するものであり、これらの表
面側の第二導体回路（１９）の内端部（１３）は基材（
１１）上に位置したものである。That is, the electronic component mounting board (
1O), for each conductor circuit (12) formed on the back side of the base material (11), another conductor circuit (12) formed on the front side of the base material (11) is located at a position that does not interfere when viewed from above and is formed on the front side of the base material (11). It has a second conductor circuit (19), and the inner end (13) of the second conductor circuit (19) on the surface side is connected to the base material (
11) It is located above.
従って、この電子部品搭載用基板（１０）においては、
基材（１１）の両側に位置する導体回路（１２）及び第
二導体回路（１９）によってファイン化が遺戒すること
ができることは勿論のこと、基材（１１）の表面側の第
二導体回路（１９）の間隔を広くとること及び幅広く形
成することができて、これを基材（１１）上に強固に接
着できるのである。これにより、この基材（１１）上の
第二導体回路（１９）の先端に対して、ボンディングワ
イヤ（１７）を直接接続しても、これによる悪影響は発
生しないのである。Therefore, in this electronic component mounting board (10),
It goes without saying that refinement can be achieved by the conductor circuit (12) and the second conductor circuit (19) located on both sides of the base material (11), as well as by the second conductor circuit on the surface side of the base material (11). The circuits (19) can be spaced widely and formed widely, and can be firmly adhered to the base material (11). Thereby, even if the bonding wire (17) is directly connected to the tip of the second conductor circuit (19) on the base material (11), no adverse effects will occur.
（発明の効果）
以上詳述した通り、本発明においては、上記各実施例に
て例示した如く、第一開口（１５）と電子部品搭載部（
Ｌｅａ）との間に位置する基材（１１）に、各導体回路
（１２）の内端部（１３）を複数まとめて露出させる第
二開口（１６）を形成したことにその構成上の特徴があ
り、これにより、ボンディングワイヤ（１７）による接
続を確実に行うことができて、しかも各導体回路（１２
）のファイン化を図ることのできる電子部品搭載用基板
（１０）を簡単な構成によって提供することができるの
！ある。(Effects of the Invention) As detailed above, in the present invention, as illustrated in each of the above embodiments, the first opening (15) and the electronic component mounting portion (
The structural feature lies in the fact that a second opening (16) is formed in the base material (11) located between the conductor circuits (12) and the inner ends (13) of each conductor circuit (12). As a result, the connection using the bonding wire (17) can be made reliably, and each conductor circuit (12
) can be provided with a simple structure! be.
第１図は本発明の第一実施例に係る電子部品搭載用基板
の部分平面図、第２図は第１図の、■−■線に沿ってみ
た拡大断面図、第３図は本発明の第二実施例に係る電子
部品搭載用基板の部分平面図、第４図は同第三実施例に
係る電子部品搭載用基板の部分平面図、第５図は第４図
のＶ−Ｖ線に沿ってみた拡大断面図、第６図は従来の電
子部品搭載用基板の部分平面図、第７図は第６図の■−
■線に沿ってみた拡大断面図、第８図は別の従来の電子
部品搭載用基板を示す部分平面図、第９図は第８図のＩ
Ｘ−ＩＸ線に沿ってみた拡大断面図である。
符 号 の 説 明
１０・・・電子部品搭載用基板、１１・・・基材、１２
・・・導体回路、１２ａ・・・電子部品搭載部、１３・
・・内端部、１４・・・外端部、１５・・・第一開口、
１６・・・第二開口、１７・・・ボンディングワイヤ、
２Ｇ・・・電子部品。
以上FIG. 1 is a partial plan view of an electronic component mounting board according to a first embodiment of the present invention, FIG. 2 is an enlarged sectional view taken along the line ■-■ of FIG. 1, and FIG. FIG. 4 is a partial plan view of the electronic component mounting board according to the second embodiment, FIG. 5 is a partial plan view of the electronic component mounting board according to the third embodiment, and FIG. Fig. 6 is a partial plan view of a conventional electronic component mounting board, and Fig. 7 is an enlarged cross-sectional view taken along the -
■An enlarged sectional view taken along the line, Figure 8 is a partial plan view showing another conventional board for mounting electronic components, Figure 9 is I of Figure 8.
FIG. 3 is an enlarged sectional view taken along the line X-IX. Explanation of symbols 10...Substrate for mounting electronic components, 11...Base material, 12
...Conductor circuit, 12a...Electronic component mounting section, 13.
...inner end, 14...outer end, 15...first opening,
16... second opening, 17... bonding wire,
2G...Electronic parts. that's all
Claims (1)
基材の電子部品搭載部に向かうように形成するとともに
、各導体回路の外端部を外部接続端子とすべく露出させ
るための第一の開口を前記基材に有する電子部品搭載用
基板において、 前記第一の開口と電子部品搭載部との間に位置する前記
基材に、前記各導体回路の内端部を複数まとめて露出さ
せる第二の開口を形成して、この第二の開口を通して、
前記各導体回路の内端部と電子部品搭載部上の電子部品
とのボンディングワイヤによる電気的接続を図れるよう
にしたことを特徴とする電子部品搭載用基板。[Claims] The inner ends of a large number of conductor circuits are formed to face the electronic component mounting portion of the base material supporting each conductor circuit, and the outer ends of each conductor circuit are formed as external connection terminals. In the substrate for mounting an electronic component, the substrate has a first opening in the base material for exposing the electronic component as much as possible. forming a second opening that exposes a plurality of end portions together, and passing through the second opening;
A board for mounting an electronic component, characterized in that the inner end of each of the conductive circuits and the electronic component on the electronic component mounting portion can be electrically connected by bonding wires.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1283664A JP2777664B2 (en) | 1989-10-30 | 1989-10-30 | Substrate for mounting electronic components |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1283664A JP2777664B2 (en) | 1989-10-30 | 1989-10-30 | Substrate for mounting electronic components |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03145145A true JPH03145145A (en) | 1991-06-20 |
| JP2777664B2 JP2777664B2 (en) | 1998-07-23 |
Family
ID=17668463
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1283664A Expired - Lifetime JP2777664B2 (en) | 1989-10-30 | 1989-10-30 | Substrate for mounting electronic components |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2777664B2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02205352A (en) * | 1989-02-03 | 1990-08-15 | Hitachi Ltd | Lead frame and semiconductor device using the same lead frame |
-
1989
- 1989-10-30 JP JP1283664A patent/JP2777664B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02205352A (en) * | 1989-02-03 | 1990-08-15 | Hitachi Ltd | Lead frame and semiconductor device using the same lead frame |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2777664B2 (en) | 1998-07-23 |
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