JPH03142957A - Thick film hybrid integrated circuit device - Google Patents
Thick film hybrid integrated circuit deviceInfo
- Publication number
- JPH03142957A JPH03142957A JP28334089A JP28334089A JPH03142957A JP H03142957 A JPH03142957 A JP H03142957A JP 28334089 A JP28334089 A JP 28334089A JP 28334089 A JP28334089 A JP 28334089A JP H03142957 A JPH03142957 A JP H03142957A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- thick film
- heat sink
- hybrid integrated
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 239000011347 resin Substances 0.000 abstract description 5
- 229920005989 resin Polymers 0.000 abstract description 5
- 230000000694 effects Effects 0.000 abstract description 4
- 239000000919 ceramic Substances 0.000 abstract description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は厚膜混成集積回路装置の構造に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] This invention relates to the structure of a thick film hybrid integrated circuit device.
第５図、第６図は従来の厚膜混成集積回路装置の構造を
示す斜視図および断面図で、図において、（１）は放熱
板、（２）は封止用の樹脂製キャップ、（３）は外部電
極リード、（４）はラインナツプを回路構成されたセラ
ミッタ基板である。5 and 6 are perspective views and cross-sectional views showing the structure of a conventional thick film hybrid integrated circuit device. In the figures, (1) is a heat sink, (2) is a resin cap for sealing, ( 3) is an external electrode lead, and (4) is a ceramitter board on which a line-up circuit is configured.
このように、半導体や回路部品を塔載したセラミッタ基
板（４）を放熱板（１）に半田で接着し、樹脂性キャッ
プ（２）により封止した構造の厚膜混成集積回路となっ
ている。In this way, the thick film hybrid integrated circuit has a structure in which the ceramitter substrate (4) on which semiconductors and circuit components are mounted is bonded to the heat sink (1) with solder and sealed with a resin cap (2). .
従来の厚膜混成集積回路装置は以上のように構成されて
いたので、大出力の特性を得るためトランジスタ等のラ
インナツプを増す場合、外形を大きくしなければならず
、また同一出力特性において、外形の小型化要求に対応
が出来ない等の問題点があった。Conventional thick film hybrid integrated circuit devices have been configured as described above, so when increasing the lineup of transistors etc. to obtain high output characteristics, the external size must be increased. There were problems such as the inability to meet the demand for miniaturization.
この発明は上記のような問題点を解消するためになされ
たもので、小型でかつ大出力の特性を持つ厚膜混成集積
回路装置を得ることを目的とする。The present invention was made to solve the above-mentioned problems, and an object of the present invention is to obtain a thick film hybrid integrated circuit device that is small in size and has high output characteristics.
この発明に係る厚膜混成集積回路装置は、放熱板の断面
に角度を持たせ、相対する二辺に対向するようにライン
ナツプ回路を構成したセラミッタ基板を半田付けし、キ
ャップで封止したものである。The thick film hybrid integrated circuit device according to the present invention is made by soldering a ceramitter substrate with a line-up circuit configured such that the cross section of the heat sink is angled and facing two opposing sides, and then sealed with a cap. be.
この発明における半導体集積回路装置は、２つのライン
ナツプ回路が１つのパッケージ内で構成されることによ
り、２つの回路の合成された特性が得られる。In the semiconductor integrated circuit device according to the present invention, two line-up circuits are configured in one package, so that the combined characteristics of the two circuits can be obtained.
以下、この発明の一実施例を図について説明する。第１
図、第２図において、前記従来のものと同一符号は同一
のものを示す。図中、（５）は断面に角度を持たせた放
熱板である。An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figures and FIG. 2, the same reference numerals as those in the conventional device indicate the same components. In the figure, (5) is a heat sink with an angled cross section.
このように、放熱板（５）の断面に図示の如く角度を持
たせ、相対する二辺に対向するようにラインナツプ回路
を構成したセラミッタ基板（４）を半田付けし、樹脂製
キャップ（２）で封止したものである。In this way, the cross section of the heat sink (5) is made to have an angle as shown in the figure, and the ceramitter board (4) with the line-up circuit configured so as to face the two opposing sides is soldered, and the resin cap (2) is attached. It is sealed with.
なお、上記実施例では放熱板（５）を山形とした場合に
ついて説明したが、第３図、第４図のように、放熱板（
６）を谷形に構成しても上記実施例と同様の効果を奏す
る。In addition, in the above embodiment, the case where the heat sink (5) is formed into a chevron shape was explained, but as shown in FIGS. 3 and 4, the heat sink (5) is
Even if 6) is configured in a valley shape, the same effect as in the above embodiment can be obtained.
以上のようにこの発明によれば、放熱板の断面に角度を
持たせ、相対する二辺に対向するように２つのラインナ
ツプ回路で構成することによって、トランジスタ等の段
数が増え、２つのラインナツプで合成された大出力の特
性が、従来１ラインナツプ構成の外形で得られる。As described above, according to the present invention, by making the cross section of the heat sink angular and configuring it with two line-up circuits facing each other on two opposite sides, the number of stages of transistors, etc. is increased, and the number of stages of transistors, etc. is increased. The combined high output characteristics can be obtained with the conventional one-line configuration.
また、従来の１ラインナツプセラミツク基板を２分割、
小形化し、この発明の放熱板に半田付けし構成すること
で、従来と同一の特性で小形化が可能となる。In addition, the conventional one-line nap ceramic board is divided into two,
By making it smaller and configuring it by soldering it to the heat sink of the present invention, it is possible to make it smaller with the same characteristics as the conventional one.
掲１図、第２図はこの発明の一実施例である厚膜混成集
積回路装置の斜視図および断面図、第３図、第４図はこ
の発明の他の実施例を示す厚膜混成集積回路装置の斜視
図および断面図、第５図。
第６図は従来の厚膜混成集積回路装置の斜視図および断
面図である。
図において、（２）は樹脂性キャップ、（３）は外部電
極リード、（４）はラインナツプ構成されたセラミッタ
基板、（５）、（６）は放熱板である。
なお、図中、同一符号は同一 または相当部分を示す。1 and 2 are perspective views and cross-sectional views of a thick film hybrid integrated circuit device which is one embodiment of the present invention, and FIGS. 3 and 4 are thick film hybrid integrated circuit devices showing other embodiments of the present invention. FIG. 5 is a perspective view and a sectional view of the circuit device. FIG. 6 is a perspective view and a sectional view of a conventional thick film hybrid integrated circuit device. In the figure, (2) is a resin cap, (3) is an external electrode lead, (4) is a ceramitter substrate with a line-up configuration, and (5) and (6) are heat sinks. In addition, the same symbols in the figures indicate the same or equivalent parts.
Claims (1)
るようにラインナップ回路構成したセラミッタ基板を半
田付けし、キャップで封止、構成したことを特徴とする
厚膜混成集積回路装置。A thick film hybrid integrated circuit device characterized in that a heat sink has an angled cross section, a ceramitter substrate with a line-up circuit configured so as to face each other on two opposing sides is soldered and sealed with a cap.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28334089A JPH03142957A (en) | 1989-10-30 | 1989-10-30 | Thick film hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28334089A JPH03142957A (en) | 1989-10-30 | 1989-10-30 | Thick film hybrid integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03142957A true JPH03142957A (en) | 1991-06-18 |
Family
ID=17664217
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28334089A Pending JPH03142957A (en) | 1989-10-30 | 1989-10-30 | Thick film hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03142957A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0582262A1 (en) * | 1992-08-06 | 1994-02-09 | TEMIC TELEFUNKEN microelectronic GmbH | Contacting and packaging of integrated circuit modules |
-
1989
- 1989-10-30 JP JP28334089A patent/JPH03142957A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0582262A1 (en) * | 1992-08-06 | 1994-02-09 | TEMIC TELEFUNKEN microelectronic GmbH | Contacting and packaging of integrated circuit modules |
| US5453638A (en) * | 1992-08-06 | 1995-09-26 | Daimler-Benz Aerospace Ag | Bonding and encapsulated three dimensional hybrid integrated circuit modules |
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