JPH0314152A - Input/output controller with data/address tracer function - Google Patents

Abstract

PURPOSE:To directly monitor a fault at the time of a data transfer of a common bus by taking the matching of an address and data by a control signal from an MPU of an input/output controller, and confirming an operating state of an address, data and a control signal of the common bus by a command from the device connected to a serial input/output port part. CONSTITUTION:When a maintenance person inputs a key by designating an address and data to be brought to matching by a console in order to monitor a fault of an input/output controller 10, a control part 84 is actuated by a write/ read-out signal from an MPU 3 of the input/output controller 10, and a latch signal of an address line, a data line and a signal control line brought to matching is outputted to the console. The maintenance person looks at the console and confirms the address and the data brought to matching, and inputs a command of a trace start. In such a way, data matched to a designated condition and information of the control line are outputted to the console, and the maintenance person can monitor fault information at the time of a data transfer of a designated common bus by a display, etc.

Description

[Detailed Description of the Invention] (Summary) The purpose of the present invention is to directly monitor failures during common lotus data transfer using a display, etc., regarding an input/output control device that operates with a main unit via a common lotus interface using a storage program method. The human output control device includes a C-Bus signal monitoring section and a serial input/output port section, and the C-BUS signal monitoring section includes a control signal latch section that captures the common bus control signal line, and a control signal latch section that captures the common bus control signal line. It consists of a data latch section that captures data, an address launch section that captures the address line of the common bus, and a control section that gate controls each of the latch sections. , addresses and data are matched, and the operation status of the address, data, and control signals of the common bus is confirmed by commands from devices connected to the serial input/output port section.

[Industrial application field]

The present invention relates to a data/address tracer function of an input/output control device that operates in a stored program manner with a main unit via a common bus interface.

Electronic exchanges have conventionally adopted a common control system using a plurality of processors, in which an input/output control device that controls communications for each line is connected in parallel to a channel control device via a common bus.

A connection configuration diagram of the input/output control device is shown in FIG.

In the figure, 11.21 is a main memory, 12.22 is a processor, 13.23 is a channel control device, and 14.24 is an input/output control device.

The input/output control device 14 is connected to the channel control device 13, the human output control device 24 is connected to the channel control device f23, and the input/output control device is connected in parallel to the channel control device by a common lot. Main Memo January 1, Processor 12. Series of channel control device 13, main memory 21, processor 2
2. The series of channel control devices 23 are dual-connected to each other. The input/output control devices 14 and 24 are connected to the line via an interface, and check the flow of signals and data exchange from the protocol control section.

[Conventional technology]

A block diagram of a conventional input/output control device is shown in FIG. In the figure, 1 is the C-BUS control unit, 2 is the ROM
, 3 is an MPU, 4 is an HDLC control section, 5 is an interface section, 6 is a DMAC 17 is a memory, and 20 is an input/output control device.

The C-BUS control unit 1 is an interface that is connected to the address line, data line, and control line of the common bus and performs input/output control with the common bus (C-BUS), and the interface unit 5 is a connection interface with the line. , connects between exchanges using protocol control. The HDLC control unit 4 is connected to the interface unit 5 and performs physical control on the line side.

DMAC6 is a dynamic memory access control unit that controls the dynamic RAM/static RAM of memory 7.
Controls writing and reading to. Further, ROM2 is a memory, and MPU3 is a microprocessor, which accumulates and controls processing operations of the input/output control device.

[Problem to be solved by the invention]

In the above-mentioned conventional input/output control device 20 under the common bus, the only way to prevent a failure during C-BUS data transmission is to connect all the CBUS signals to a measuring device (such as a logic analyzer) and directly observe the signals. But high speed D'MA
(Dynamic memory access) C-B that performs the operation
During US transfer, when a failure occurs in any of the transferred data (bit missing, one out of focus, etc.), or an interrupt signal that should naturally occur does not occur, the measuring device It was impossible to see the signal directly.

In the present invention, in order to solve the above problem, the input/output control device 2
A monitoring unit that monitors C-Bus signals and a connection interface with the system console are installed in the 0, and data/
The purpose is to provide an address tracer function to the input/output control device and operate it according to instructions from maintenance personnel to monitor failures.

[Means to solve the problem]

FIG. 1 shows a basic configuration diagram of the input/output control device of the present invention.

In the figure, l is a C-BUS control unit, 2 is a ROM, 3 is an MPU, 4 is an HDLC control unit, 5 is an interface unit,
Reference numeral 6 indicates a DMAC 17, a memory, 8 a C-BUS signal monitoring section, 9 a serial input/output port section, and 10 an input/output control device.

In the present invention, the parts loaded on the conventional input/output control device configuration are a C-BUS signal monitoring section 8 having a data/address tracer function and a serial input/output port section 9 as a connection interface with an external system console. The serial input/output port section 9 consists of an R3-232C interface, and is a protocol interface that simply converts the TTL level to the R3-232C level. C-
The B US signal monitoring unit 8 includes a control signal latch unit 81 that captures the control signal line of the common bus, a data latch unit 82 that captures the data line of the common bus, and an address latch unit 83 that captures the address line of the common bus. , and a control section 84 that gate-controls these latch sections.

Addresses and data are matched by a write/read control signal from the MPU 3 of the input/output control device 10, and a common lot address, data,
The control signal is configured to check the operation status of the control signal. Furthermore, R
The OM2 has a program for implementing the trace function, and controls the data/address trace function of the input/output control device 10.

[Effect]

■ To monitor failures in the input/output control device, a maintenance person enters the key from the system console connected to the serial input/output board section 9.

■ The C-BUS signal monitoring unit 8 is activated, the address latch unit 83 captures the address line of the common bus, the Dekura/Sochi unit 82 captures the data line of the common bus, and the control signal launch unit 81 captures the common bus address line. Capture the control signal line.

■ The maintenance person specifies the address and data to be matched using the console and inputs the key.

(2) The control unit 84 is activated by a write/read signal from the MPU 3 of the input/output control device 10, and latch signals of the matched address line, data line, and signal control line are output to the console.

■ The maintenance person looks at the console, confirms the matched address and data, and inputs a command to start tracing.

- Information on data and control lines that meet the specified conditions is output to the console, and maintenance personnel can monitor failure information during data transfer on the specified common bus on the display or the like.

〔Example〕

FIG. 2 shows a circuit configuration diagram of the -BUS signal monitoring unit of the embodiment of the present invention. In the figure, 3 is an MPU, 31 is an address register, 32 is a data register, 33 is a control signal register, and 34 is an address Conveyor register, 35 is a data conveyor register, 36 is a meta 1-register, 37
indicates an address selector.

Address register 31 and address conveyor register 34
constitutes an address latch section, data register 32 and data conveyor register 35 constitute a data latch section, and control signal register 33 constitutes a control signal launch section. Other circuit components constitute a control section that gate-controls write/read signals from the MPU 3.

The start register 36 starts a comparison operation between the address conveyor register 34 and the data conveyor register 35 in response to an access signal from the MPU 3, and compares the address register 31 with the data conveyor register 35.
The data register 32 latches the address and data setting signals from the MPU 3, inputs the address signal and data signal to the address conveyor register 34 and data conveyor register 35, and inputs the address and data signals from the address register 31 and data register 32. Match with the signal. The address and data matching signal is sent to M P tJ 3, and the C-Bus control signal is latched by control signal register 33 and the latched signal is sent to MPU 3.

Note that the address selector 37 sends out an address select signal to gate control the matching signals from the address conveyor register 34 and the data conveyor register 35.

By the above circuit operation, the -BUS address line and data line are matched to the specified line, and the matched address, data, and control signal are latched.The launched address, data, and control signal are processed by the system console. Operation status can be monitored.

FIG. 3 shows a processing flowchart of the MPU program of the above embodiment. The MPU program is in the ROM of the input/output device
Built-in.

It is normally in a state of waiting for the start command key 0 to be input from the console (41). It checks whether a start command has been input (42), and if a command has been input, it checks whether it is an address match command (43). If it is an address match command, it also has a match address input, and (44) checks whether the address setting key has been input (45).
. If a key is input, the set address is written to the address match register (46). Next, in (43), if it is not an address match command, it is checked whether it is a data match command (47). If it is a data match command, wait for match data input l'J (48)
, checks whether the data setting key has been input (49). If a key is input, setting data is written to the data match register (50). Next, in step (47), if the command is not a data match command, the process waits for command input again (step 51).

When the writing to the address match register and data match register is completed, the state is set to wait for a trace start command (52). Check whether the trace start command key has been input (53). If the trace start command key is pressed, tracing is started (54).

Confirm that the input and set IS response, data setting conditions and conditions match (55), and by outputting the condition OK from the console, match data and control line information are sent from the serial input/output port section to the console display and displayed. (56). Once the sending of the trace information is finished, the process returns to the state of waiting for input of a start command (41).

〔Effect of the invention〕

(2) With the input/output control device of the present invention, information during data transfer of the common lotus is sequentially displayed on the display by console control, so a failure during data transfer can be detected early and the failure situation can be analyzed.

[Brief explanation of drawings]

Fig. 1 is a principle block diagram of the present invention, Part 2 is a circuit block diagram of an embodiment, Fig. 3 is a processing flowchart of the embodiment, and Fig. 4 is a connection block diagram of an input/output control device. 1 shows a block diagram of a conventional example. In the figure, ■ is a C-BUS control unit, 2 is a ROM, 3 is an MP tJ, 4 is an HDJ, C control unit, 5 is an interface unit, 6 is a DMAC, 7 is a memory, and 8 is a C-B
US signal monitoring section, 9 serial input/output boat section, 10,
20, 14. 24 is an input/output control device; 11. 2
1 is the main memory; 12. 22 is a processor; 13. 2
3 is a channel control device, 31 is an address register, 32
8 is a data register, 33 is a signal control register, 34 is an address conveyor register, 35 is a data conveyor register, 36 is a start register, 37 is an address selector, 81 is a control signal latch section, 82 is a data latch section, 8
3 is an address latch section, and 84 is a control section. Furthermore (4
1) to (56) indicate step numbers of the flowchart. ■ 3 2 卜

Claims (1)

[Claims] In an input/output control device that operates with a main unit via a common bus interface using a storage program method, the input/output control device (10) is provided with a C-BUS signal monitoring unit (
8) and a serial input/output port section (9).
The US signal monitoring unit (8) includes a control signal latch unit (81) that captures the common bus control signal line, a data latch unit (82) that captures the data line of the common bus, and an address latch unit that captures the address line of the common bus. Consisting of a latch section (83) and a control section (84) that gate-controls each of the latch sections, addresses and data are controlled by write/read control signals from the MPU (3) of the input/output control device (10). This device is equipped with a data/address tracer function, and is capable of checking the operating status of addresses, data, and control signals on the common bus based on commands from the device connected to the serial input/output port section (9). Output control device.