JPH03141191A - Production of compound semiconductor crystal substrate - Google Patents
Production of compound semiconductor crystal substrateInfo
- Publication number
- JPH03141191A JPH03141191A JP27904689A JP27904689A JPH03141191A JP H03141191 A JPH03141191 A JP H03141191A JP 27904689 A JP27904689 A JP 27904689A JP 27904689 A JP27904689 A JP 27904689A JP H03141191 A JPH03141191 A JP H03141191A
- Authority
- JP
- Japan
- Prior art keywords
- mixed crystal
- substrate
- epitaxial
- layer
- grown
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000013078 crystal Substances 0.000 title claims abstract description 59
- 239000000758 substrate Substances 0.000 title claims abstract description 44
- 239000004065 semiconductor Substances 0.000 title claims description 5
- 150000001875 compounds Chemical class 0.000 title claims description 4
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- 238000000034 method Methods 0.000 claims abstract description 21
- 239000007791 liquid phase Substances 0.000 claims abstract description 5
- 239000012808 vapor phase Substances 0.000 claims description 5
- 230000007547 defect Effects 0.000 abstract description 19
- 239000007792 gaseous phase Substances 0.000 abstract 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 4
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 4
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野コ
本発明は化合物半導体基板の製造方法に関し、例えばI
[[−V族混晶エピタキシャル基板上に気相エピタキシ
ャル法で混晶層を成長させる場合に利用して効果のある
技術に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a compound semiconductor substrate, for example, I
[[-Relates to a technique that is effective when growing a mixed crystal layer on a V group mixed crystal epitaxial substrate by vapor phase epitaxial method.
[従来の技術]
従来、発光ダイオード用半導体基板として、GaAsや
GaPのような■−V族化合物半導体基板上に、G a
A s PあるいはQa I nPのような混晶エピ
タキシャル層を成長させ、さらにこの混晶基板上に混晶
層をエピタキシャル成長させたものが提案されている。[Prior Art] Conventionally, as a semiconductor substrate for a light emitting diode, Ga
It has been proposed to grow a mixed crystal epitaxial layer such as As P or Qa I nP, and further epitaxially grow the mixed crystal layer on this mixed crystal substrate.
従来、混晶エピタキシャル基板の表面の欠陥を減らすた
め、エピタキシャル成長前に反応管内で混晶基板にベー
キング処理を行なうことで、表面の不純物を除去し、清
浄化してからエピタキシャル成長を行なう方法も実施さ
れていた。Conventionally, in order to reduce defects on the surface of a mixed crystal epitaxial substrate, a method has been implemented in which the mixed crystal substrate is baked in a reaction tube before epitaxial growth to remove impurities on the surface and clean it before epitaxial growth. Ta.
しかしながら、ベーキング処理を行なってから混晶エピ
タキシャル成長を行なうと、基板表面のピラミッド状の
点欠陥を減らせるものの、線状欠陥が多くなるという問
題点があった。このような欠陥が出現すると、この混晶
基板を用いて作成した発光ダイオードの発光効率が低下
してしまう。However, if mixed crystal epitaxial growth is performed after baking, pyramid-shaped point defects on the substrate surface can be reduced, but there is a problem in that the number of linear defects increases. When such defects appear, the light emitting efficiency of a light emitting diode fabricated using this mixed crystal substrate decreases.
本発明は上記問題点に着目してなされたもので、その目
的とするところは、混晶基板上に成長されるエピタキシ
ャル層表面の欠陥を低減することにある。The present invention has been made in view of the above problems, and its purpose is to reduce defects on the surface of an epitaxial layer grown on a mixed crystal substrate.
[課題を解決するための手段]
本発明者は、混晶基板上へのエピタキシャル成長やその
前のベーキング処理により線状欠陥が増大する原因は、
混晶基板に内在していた熱歪がエピタキシャル成長やベ
ーキングの際に一気に開放されて結晶内にスリップが生
じ、混晶基板表面に線状欠陥が現われ、このままエピタ
キシャル層を成長させると、線状欠陥がエピタキシャル
層に伝播するためではないかと考え、種々の温度条件の
下に混晶層やその上のエピタキシャル層の成長およびベ
ーキングを行なった。[Means for Solving the Problems] The present inventors believe that the cause of increase in linear defects due to epitaxial growth on a mixed crystal substrate and baking treatment prior to the epitaxial growth is as follows.
Thermal strain inherent in the mixed crystal substrate is released all at once during epitaxial growth and baking, causing slip within the crystal, and linear defects appear on the surface of the mixed crystal substrate.If the epitaxial layer is grown in this state, linear defects will occur. We thought that this might be due to the propagation of the mixed crystal layer to the epitaxial layer, so we grew and baked the mixed crystal layer and the epitaxial layer thereon under various temperature conditions.
その結果、エピタキシャル成長は混晶層の成長時の温度
よりも低い温度で、またベーキングはエピタキシャル成
長時の温度よりも低い温度で行なった方が線状欠陥を減
らせることを見出した。As a result, it has been found that linear defects can be reduced by epitaxial growth at a temperature lower than that during growth of the mixed crystal layer, and by performing baking at a lower temperature than the temperature during epitaxial growth.
本発明は上記知見に基づいてなされたもので、気相エピ
タキシャル法もしくは液相エピタキシャル法により混晶
層を成長させてなる混晶基板上に、エピタキシャル層を
成長させるにあたり、上記混晶層の成長温度(Ta)よ
りも低い成長温度(TC)でエピタキシャル層を成長さ
せる。さらに、好ましくは上記エピタキシャル層の成長
の開始前に、混晶基板を成長装置内におき、上記エピタ
キシャル層の成長温度(Tc)よりも高く混晶層の成長
温度(Ta)よりも低い温度(Tb)でベーキング処理
を施すことを提案するものである。また、ベーキング処
理温度Tbは高い方が清浄効果が良いので、混晶成長温
度Taはできるだけ高く設定しておくとよい。The present invention has been made based on the above knowledge, and when growing an epitaxial layer on a mixed crystal substrate formed by growing a mixed crystal layer by a vapor phase epitaxial method or a liquid phase epitaxial method, The epitaxial layer is grown at a growth temperature (TC) lower than the temperature (Ta). Furthermore, preferably, before starting the growth of the epitaxial layer, the mixed crystal substrate is placed in a growth apparatus at a temperature (Tc) higher than the growth temperature (Tc) of the epitaxial layer and lower than the growth temperature (Ta) of the mixed crystal layer It is proposed to perform baking treatment with Tb). Further, since the higher the baking treatment temperature Tb is, the better the cleaning effect is, the mixed crystal growth temperature Ta is preferably set as high as possible.
[作用コ
上記した手段によれば、混晶層の成長温度をTa1その
上のエピタキシャル層の成長温度をTcとすると、T
c (T aなる温度条件でエピタキシャル層を成長さ
せるので、混晶基板に内在する熱歪が閉じ込められたま
まエピタキシャル層が成長されるようになり、基板内の
スリップに起因する線状欠陥を低減することができる。[Function] According to the above-described means, if the growth temperature of the mixed crystal layer is Ta1 and the growth temperature of the epitaxial layer thereon is Tc, then T
c (Since the epitaxial layer is grown under the temperature condition T a, the epitaxial layer is grown while the thermal strain inherent in the mixed crystal substrate is confined, reducing linear defects caused by slip within the substrate. can do.
また、ベーキング処理温度をTbとすると、上記エピタ
キシャル層成長前にT c < T b < T aな
る温度条件の下でベーキングを施すようにしたので、基
板内にスリップを生じさせることなく表面を洗浄でき、
これによって線状欠陥のみならず不純物に起因する点欠
陥も減らすことができる。Furthermore, assuming that the baking temperature is Tb, baking is performed under the temperature condition T c < T b < Ta before growing the epitaxial layer, so the surface can be cleaned without causing any slip within the substrate. I can do it,
This makes it possible to reduce not only linear defects but also point defects caused by impurities.
[実施例1コ
GaAs基板上に、気相エピタキシャル成長法の一つで
あるクロライドCVD法で成長温度T aを740℃と
してG a A S 、、@l P*0me混晶層を1
00μm成長させてなる混晶基板と、同じくクロライド
CVD法でTa=790℃としてGaAs*+@@ P
11+44混晶層を100μm成長させてなる混晶基
板を用意した。[Example 1] On a GaAs substrate, one GaAs, ,@lP*0me mixed crystal layer was grown using the chloride CVD method, which is one of the vapor phase epitaxial growth methods, at a growth temperature Ta of 740°C.
A mixed crystal substrate grown to a thickness of 00 μm and GaAs*+@@P grown at Ta=790°C using the same chloride CVD method.
A mixed crystal substrate was prepared by growing an 11+44 mixed crystal layer to a thickness of 100 μm.
そして、これらの混晶基板上にこれと格子整合するGa
InP混晶エピタキシャル層を、成長温度Tcを各々7
60℃としてMOCVD法により2μm成長させた。そ
の結果を表1に示す。Then, on these mixed crystal substrates, Ga is lattice-matched to the mixed crystal substrates.
The InP mixed crystal epitaxial layer was grown at a growth temperature Tc of 7.
The film was grown to 2 μm at 60° C. by MOCVD. The results are shown in Table 1.
表1
これより温度条件をTb(Taとした場合には、線状欠
陥が減り、転位を少なくできることが分かる。Table 1 From this, it can be seen that when the temperature condition is Tb (Ta), the number of linear defects is reduced and the number of dislocations can be reduced.
[実施例2コ
GaAs基板上にQaAso、。Poo、混晶を塩化物
CVD法を用いて育成し、混晶基板とした。[Example 2] QaAso on a GaAs substrate. A mixed crystal was grown using a chloride CVD method to prepare a mixed crystal substrate.
GaAsP混晶の成長温度Taは790℃である。The growth temperature Ta of the GaAsP mixed crystal is 790°C.
このG a A s P混晶基板を、温度Tb=700
℃。This Ga A s P mixed crystal substrate was heated to a temperature Tb=700
℃.
750℃、800℃で7分間それぞれベーキングした後
、GaAsP混晶基板上にMOCVD法を用いてGaI
nP層を2μm成長させた。GaInPの成長温度Tc
は700℃とした。その結果を表2に示す。After baking at 750°C and 800°C for 7 minutes, GaI was deposited on the GaAsP mixed crystal substrate using MOCVD.
An nP layer was grown to a thickness of 2 μm. GaInP growth temperature Tc
The temperature was 700°C. The results are shown in Table 2.
表2
表3
この表よりT c < T b (T aを満足する温
度条件で欠陥が少なくなることが分かる。Table 2 Table 3 From this table, it can be seen that defects are reduced under temperature conditions that satisfy T c < T b (T a ).
[実施例3]
Ga、、、I n、、、P混晶をGaP基板上にステッ
プグーリング法によるL P E法(液相エピタキシャ
ル法)で成長させた基板を用意した。混晶成長温度は7
50℃である。このQ a I n P混晶基板を、ベ
ーキング温度Tb=680℃、730’C。[Example 3] A substrate was prepared in which a Ga,..., In,..., P mixed crystal was grown on a GaP substrate by an LPE method (liquid phase epitaxial method) using a step Guhring method. The mixed crystal growth temperature is 7
The temperature is 50°C. This Q a I n P mixed crystal substrate was baked at a temperature Tb of 680°C and 730'C.
780℃で15分間それぞれベーキングし、このGa
I nP混晶基板上にMOCVD法で同種の混晶G a
、、、 I n、、、 P層を成長させた。MOCVD
成長温度Tcは680℃である。結果を表3に示す。Baked at 780°C for 15 minutes, this Ga
The same type of mixed crystal Ga is deposited on the I nP mixed crystal substrate using the MOCVD method.
,,, I n, , P layer was grown. MOCVD
The growth temperature Tc is 680°C. The results are shown in Table 3.
[発明の効果]
以上説明したようにこの発明は、気相エピタキシャル法
もしくは液相エピタキシャル法により混晶層を成長させ
てなる混晶基板上に、エピタキシャル層を成長させるに
あたり、上記混晶相の成長温度(Ta)よりも低い成長
温度(Tc)でエピタキシャル層を成長させるようにし
たので、混晶基板に内在する熱歪が閉じ込められたまま
エピタキシャル層が成長されるようになり、これによっ
て基板内のスリップを防止し、これに起因する線状欠陥
を低減することができる。[Effects of the Invention] As explained above, the present invention provides a method for growing an epitaxial layer on a mixed crystal substrate formed by growing a mixed crystal layer by a vapor phase epitaxial method or a liquid phase epitaxial method. Since the epitaxial layer is grown at a growth temperature (Tc) lower than the growth temperature (Ta), the epitaxial layer is grown while the thermal strain inherent in the mixed crystal substrate is confined. It is possible to prevent slippage within the wafer and reduce linear defects caused by this.
また、エピタキシャル層の成長開始前に、混晶基板を成
長装置内におき、上記エピタキシャル層の成長温度(T
c)よりも高く混晶層の成長温度(Ta)よりも低い温
度(Tb)でベーキング処理を施すようにしたので、基
板内にスリップを生じさせることなく表面を清浄化でき
、これによって線状欠陥のみならず不純物に起因する点
欠陥も減らすことができるという効果がある。Furthermore, before starting the growth of the epitaxial layer, the mixed crystal substrate is placed in the growth apparatus, and the epitaxial layer growth temperature (T
Since the baking treatment is performed at a temperature (Tb) which is higher than c) and lower than the growth temperature (Ta) of the mixed crystal layer, the surface can be cleaned without causing any slip within the substrate, and as a result, the linear This has the effect of reducing not only defects but also point defects caused by impurities.
平成 2年 3月30日March 30, 1990
Claims (2)
ル法により混晶層を成長させてなる混晶基板上に、エピ
タキシャル層を成長させるにあたり、上記混晶層の成長
温度(Ta)よりも低い成長温度(Tc)でエピタキシ
ャル層を成長させるようにしたことを特徴とする化合物
半導体結晶基板の製造方法。(1) When growing an epitaxial layer on a mixed crystal substrate formed by growing a mixed crystal layer by a vapor phase epitaxial method or a liquid phase epitaxial method, the growth temperature (Ta) is lower than the growth temperature (Ta) of the above mixed crystal layer. 1. A method for manufacturing a compound semiconductor crystal substrate, characterized in that an epitaxial layer is grown using Tc).
板を成長装置内におき、上記エピタキシャル層の成長温
度(Tc)よりも高く混晶層の成長温度(Ta)よりも
低い温度(Tb)でベーキング処理を施すようにしたこ
とを特徴とする請求項1記載の化合物半導体結晶基板の
製造方法。(2) Before starting the growth of the epitaxial layer, place the mixed crystal substrate in a growth apparatus at a temperature (Tb) higher than the growth temperature (Tc) of the epitaxial layer and lower than the growth temperature (Ta) of the mixed crystal layer. 2. The method for manufacturing a compound semiconductor crystal substrate according to claim 1, wherein the baking treatment is carried out in step 2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27904689A JPH03141191A (en) | 1989-10-26 | 1989-10-26 | Production of compound semiconductor crystal substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27904689A JPH03141191A (en) | 1989-10-26 | 1989-10-26 | Production of compound semiconductor crystal substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03141191A true JPH03141191A (en) | 1991-06-17 |
Family
ID=17605647
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP27904689A Pending JPH03141191A (en) | 1989-10-26 | 1989-10-26 | Production of compound semiconductor crystal substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03141191A (en) |
-
1989
- 1989-10-26 JP JP27904689A patent/JPH03141191A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10174439B2 (en) | Nucleation of aluminum nitride on a silicon substrate using an ammonia preflow | |
JP3875821B2 (en) | GaN film manufacturing method | |
US20140159112A1 (en) | Method for forming group iii/v conformal layers on silicon substrates | |
JPH07235692A (en) | Compound semiconductor device and forming method thereof | |
TWI725418B (en) | Structure of epitaxial on heterogeneous substrate and preparation method | |
CN116590687A (en) | AlN thin film epitaxial wafer, preparation method and application of AlN thin film | |
JPS6230692B2 (en) | ||
JPH03141191A (en) | Production of compound semiconductor crystal substrate | |
JP2797425B2 (en) | Semiconductor crystal growth method | |
WO2019225112A1 (en) | Group iii nitride semiconductor substrate and method of producing same | |
JP4084539B2 (en) | Method for producing crystal growth substrate of group III nitride compound semiconductor | |
WO2024057698A1 (en) | Single crystal silicon substrate equipped with nitride semiconductor layer, and method for manufacturing single crystal silicon substrate equipped with nitride semiconductor layer | |
JP2002075873A (en) | Semiconducor device | |
JP3078927B2 (en) | Method for growing compound semiconductor thin film | |
JPH0760790B2 (en) | Compound semiconductor substrate | |
JP2503255B2 (en) | Method for manufacturing compound semiconductor substrate | |
JPH01179788A (en) | Method for growing iii-v compound semiconductor on si substrate | |
JPS6012775B2 (en) | Method for forming a single crystal semiconductor layer on a foreign substrate | |
JPH01120011A (en) | Inp semiconductor thin film | |
JPS6211221A (en) | Molecular-beam epitaxial growth method | |
JPH03103390A (en) | Production of algaas epitaxial wafer for red led | |
JPH0573335B2 (en) | ||
JP2005032766A (en) | GaN SEMICONDUCTOR AND ITS MANUFACTURING METHOD | |
JPH03203316A (en) | Epitaxial wafer and manufacture thereof | |
JPH0383327A (en) | Manufacture of compound semiconductor substrate |