JPH03138927A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to recover the damage caused by ion implantation and to prevent residual defects by implanting the ions of an element in the same group of an element constituting a semiconductor substrate into a diffused- layer forming region before impurity ions are implanted, and performing the introduction of F ions in another step other than the impurity ion implantation. CONSTITUTION:The ions of an element 2 in the same group of an element constituting a semiconductor substrate 1 such as Si, Ge, Sn and Pb are implanted into the suitable depth in a diffused-layer forming region in the single-crystal Si substrate 1. The single crystal Si substrate is made to be an amorphous state, and an amorphous layer 3 is formed. Then, F ions for controlling the diffusing depth (for suppressing the spread of the diffused layer due to annealing) are implanted with suitable energy. Furthermore, P-type impurity ions 7 are implanted. Then, annealing is performed for a short time at a temperature of, e.g. 500 deg.C or more. Then, a shallow diffused layer 9 is formed, and a semiconductor device is obtained. In this way, the damage caused by the ion implantation can be recovered, and the manufacturing method of the semiconductor devices wherein residual defects can be prevented is obtained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a technique that is effective when applied to a method of manufacturing semiconductor devices, and particularly relates to a technique that is effective when applied to a method of manufacturing a semiconductor device, and particularly relates to a technique that is shallow, defect-free, and has an improved activation rate. The present invention relates to a technique that is effective when forming a diffusion layer.

[Prior Art] Conventionally, the formation of a diffusion layer in a semiconductor substrate has generally been carried out by ion implantation of impurities, F
This is done by introducing ions and performing annealing. For example, when forming a P-type diffusion layer, for example, impurity (B) ions and F ions are implanted at the same time. After that, annealing was performed.

Here, with the recent increase in the degree of integration of semiconductor devices, the diffusion layer tends to be formed shallowly.
In DRAM (0.5 μm to 0.3 μm process) and the like, a shallow diffusion layer of 0.1 μm to 0.2 μm is required. In order to obtain such a shallow diffusion layer, it is necessary to suppress the spread of the diffusion layer as much as possible, and therefore, the above-mentioned annealing has been performed at a low temperature and for a short time.

[Problems to be Solved by the Invention] However, the semiconductor device including the above diffusion layer has the following problems.

That is, as mentioned above, when annealing is performed at a low temperature and for a short time, it becomes difficult to sufficiently recover the damage caused by ion implantation, and there is a risk that defects may remain. There is a problem that the activation rate decreases.

In particular, as mentioned above, when a large amount (twice as much) of F ions is implanted at the same time as impurity ions, defects may increase due to the excessive implantation of F ions, and the recovery of activation of impurity ions may decrease. The above problems become more and more prominent.

The present invention has been made in view of the above problems, and is
It is an object of the present invention to provide a method for manufacturing a semiconductor device having a diffusion layer which is defect-free and has an improved activation rate.

[Means for Solving the Problems] Representative inventions disclosed in this application will be summarized as follows.

That is, in a method for manufacturing a semiconductor device in which a diffusion layer is formed in a semiconductor substrate by ion implantation of impurities, introduction of F ions, and annealing, the semiconductor substrate is formed before ion implantation of impurities. An element of the same group as the element is ion-implanted into the diffusion layer formation region, and F
The ion introduction is performed in a separate process from the impurity ion implantation.

[Operation] According to the above-mentioned means, since an element of the same group as the element constituting the semiconductor substrate is ion-implanted into the diffusion layer formation region before impurity ion implantation, the inside of the diffusion layer formation region is amorphous. The amorphous layer can be sufficiently solid-phase epitaxially grown even if it is annealed at a low temperature for a short time, making it possible to recover from damage caused by ion implantation (implantation damage) and achieving the above objective of eliminating residual defects. It turns out.

In addition, the inside of the diffusion layer formation region is made amorphous, and the impurity ions in the amorphous layer have a high activation rate even when annealed at a low temperature and for a short time, so that the implanted impurities are activated. The above objective of increasing the rate will be achieved.

Further, the interior of the diffusion layer formation region is made amorphous, and the amorphous layer prevents channeling of impurity ions, thereby achieving the above-mentioned purpose of forming a shallow diffusion layer.

Further, according to the above-mentioned means, since the introduction of F ions is performed in a separate process from the ion implantation of impurities, excessive introduction of F ions can suppress the diffusion of impurities as much as possible during low-temperature, short-time annealing. The above-mentioned objective of forming a shallow, defect-free diffusion layer with an improved activation rate can be achieved due to the effects of preventing this and making it possible to introduce an appropriate amount.

[Embodiment 1] Hereinafter, embodiments of the method for manufacturing a semiconductor device according to the present invention will be described with reference to the drawings.

FIG. 2 shows a semiconductor device obtained by applying an embodiment of the method for manufacturing a semiconductor device according to the present invention.

The semiconductor device in the figure has, for example, an M of 16M to 64M.
The semiconductor device of this embodiment, which constitutes an OS DRAM (0.5 μm to 0.3 μm process), has no residual defects, has a very high activation rate, and has a very high activation rate. A very shallow diffusion layer 9 with a diameter of 0.1 μm to 0.2 μm is formed.

An example of a method for manufacturing a semiconductor device configured as described above will be described below.

First, for example, when using a single crystal St substrate as a semiconductor substrate, in the diffusion layer formation region of the single crystal St substrate 1,
An element 2 of the same group as the element constituting the substrate 1 (Si in this example), such as Si, Ge, Sn, or Pb, is ion-implanted to an appropriate depth, and the single crystal Si substrate 1 is ion-implanted to the above depth. It is made amorphous to form an amorphous layer 3, as shown in Fig. 1 (
Set the state shown in a). Here, the reference numeral 4 indicates the interface between the amorphous layer 3 and the single crystal S [substrate 1 (the ion implantation depth of the element 2 of the same group as the substrate element).

Next, F ions 5 for diffusion depth control (to suppress the spread of the diffusion layer due to annealing) are heated at an appropriate (optimal without excessive) energy, for example, 10゛4~to''/cm.
The ion implantation depth 6 is as shown in FIG.
The ion implantation depth 4 is shallower than the ion implantation depth 4 of the element 2, which is the same group as the substrate element.

As described above, in this embodiment, unlike the conventional method, the introduction of F ions 5 is performed in a separate process from the ion implantation of impurity ions 7, which will be described later. (F ions 5 and impurity ions 7 were introduced simultaneously), it is possible to prevent excessive introduction of F ions 5, and it is possible to introduce an appropriate amount of F ions 5.

Next, when forming a P-type diffusion layer, for example, P-type impurity ions 7 such as B are ion-implanted, and the fifth! r(
The state shown in c) is established. Here, reference numeral 8 indicates the ion implantation depth of the impurity ions 7, and the ion implantation depth 8 of the impurity ions 7 is shallower than the ion implantation depth 6 of the F ions 5.

In this way, in this example, the impurity ion 7
Since the impurity ions 7 are ion-implanted into the amorphous layer 3, channeling of the impurity ions 7 can be prevented, and it is possible to form a shallow junction of the diffusion layer 9, which will be described later.

In addition, when forming an N-type diffusion layer, for example, P, As
N-type impurity ions such as ion implantation may be performed in place of the P-type impurity ions 7.

Next, by performing short-time annealing at a low temperature of, for example, 500° C. or higher, a shallow diffusion layer (P type in this example) 9 can be formed, and the semiconductor device shown in FIG. 2 can be obtained. Here, the symbol IO indicates the bonding interface between the diffusion layer 9 and the single-crystal Si substrate 1, and this bonding interface IO is the interface between the amorphous layer 3 and the single-crystal Si substrate 1 due to annealing. It is slightly deeper than 4.

In this way, in this example, ions are implanted into the amorphous layer 3 in which solid-phase epitaxial growth is possible even if the annealing is performed at a low temperature and for a short time, so damage caused by ion implantation (implantation damage) is avoided. recovery is possible.

Similarly, since ions are implanted into the amorphous layer 3 where a high activation rate can be obtained even when annealing is performed at a low temperature and for a short time, the implanted impurity 7
It is possible to improve the activation rate of

As a result, according to the method of manufacturing a semiconductor device of the above embodiment, the following effects can be obtained.

That is, before ion-implanting the impurity 7, the element 2, which is the same group as the element constituting the semiconductor substrate 1, is ion-implanted into the diffusion layer formation region, so that the inside of the diffusion layer formation region is made amorphous, and the amorphous Layer 3 is annealed at a low temperature and for a short time, so that the layer 3) is also sufficiently grown by solid-phase epitaxial growth, making it possible to recover from damage caused by ion implantation (implantation damage) and eliminate residual defects.

In addition, the inside of the diffusion layer forming region is made amorphous, and the impurity ions 7 in the amorphous layer 3 have a high activation rate even when annealing is performed at a low temperature and for a short time. It becomes possible to improve the activation rate of.

Further, the inside of the diffusion layer formation region is made amorphous, and the amorphous layer 3 prevents channeling of the impurity ions 7, so that the diffusion layer 9 can be made shallow.

In addition, since the introduction of F ions 5 is performed in a separate process from the ion implantation of impurity 7, diffusion of impurity 7 during low-temperature, short-time annealing can be suppressed as much as possible.
By preventing excessive introduction of ions 5 and making it possible to introduce an appropriate amount of ions, it becomes possible to form a shallow, defect-free diffusion layer 9 with an improved activation rate.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor.

For example, in the above embodiment, the step shown in FIG. 1(a) (the step of ion-implanting an element 2 of the same group as the element constituting the substrate 1) and the step shown in FIG. 1(b) (the step of implanting F ions 5) is performed separately, but as shown in FIG.
It is also possible to use a step of implanting ions 11 (a step of implanting an element 2 of the same group as the element constituting the substrate 1 and F ions 5 at the same time).

Also, instead of SiF ions or GeF ions 11, Si
It is also possible to implant compounds such as F, GeF, etc.

Furthermore, the F ions 5 may be implanted before the ion implantation of the element 2 of the same group as the element constituting the substrate 1, or after the ion implantation of the impurity ions 7.

Furthermore, the ion implantation of F ions 5 is stopped and annealing is performed in an atmosphere containing F, such as NF.
Ions 5 may also be introduced.

In this way, the introduction of the F ions 5 may be carried out at any time as long as it is performed in a separate process from the ion implantation of the impurity ions 7 so as to prevent excessive introduction of the F ions 5.

Further, in the above embodiment, the semiconductor substrate l is a single crystal S
Although a t substrate is used, it is also possible to use a semiconductor substrate made of other elements.

Note that the present invention is not only applicable to MOS DRAMs, but can also be applied to SRAMs, bipolar LSIs, etc. In short, the present invention is applicable to semiconductor devices having shallow junction diffusion layers. It is applicable to

[Effects of the Invention] The effects obtained by typical inventions disclosed in this application are briefly explained below.

That is, in a method for manufacturing a semiconductor device in which a diffusion layer is formed in a semiconductor substrate by ion implantation of impurities, introduction of F ions, and annealing, the semiconductor substrate is formed before ion implantation of impurities. Since an element of the same group as the element is ion-implanted into the diffusion layer formation region, the inside of the diffusion layer formation region is made amorphous, and the amorphous layer can be sufficiently solid-phase epitaxially grown even if annealed at a low temperature and for a short time. Become. As a result, it becomes possible to recover from damage caused by ion implantation (implantation damage), and it becomes possible to eliminate residual defects.

Further, the inside of the diffusion layer forming region is made amorphous, and the impurity ions in the amorphous layer can have a high activation rate even when annealing is performed at a low temperature and for a short time. As a result, it becomes possible to improve the activation rate of ion-implanted impurities.

Further, the inside of the diffusion layer formation region is made amorphous, and the amorphous layer can prevent channeling of impurity ions. As a result, it becomes possible to make the diffusion layer shallow.

In addition, the introduction of F ions is carried out in a separate process from the impurity ion implantation process, and the diffusion of impurities can be suppressed as much as possible during low-temperature, short-time annealing, which prevents excessive introduction of F ions. It becomes possible to introduce it. As a result, it becomes possible to form a shallow, defect-free diffusion layer with an improved activation rate.

[Brief explanation of the drawing]

1(a) to 1(c) are process diagrams of an embodiment of the method for manufacturing a semiconductor device according to the present invention, and FIG. 2 is a diagram showing an embodiment of the method for manufacturing a semiconductor device according to the present invention. FIG. 3 is a vertical cross-sectional view showing one step of another embodiment of the method for manufacturing a semiconductor device according to the present invention. 1... Semiconductor substrate, 2... Element ion of the same group as the element constituting the substrate. 5...F ion, 7... Impurity ion, 9... Diffusion layer. Figure 2 Figure C)

Claims (1)

[Claims] 1. In a method for manufacturing a semiconductor device in which a diffusion layer is formed in a semiconductor substrate by ion implantation of impurities, introduction of F ions, and annealing, before ion implantation of impurities, A method for manufacturing a semiconductor device, characterized in that an element of the same group as the element constituting the semiconductor substrate is ion-implanted into a diffusion layer forming region, and F ions are introduced in a separate process from the ion-implantation of the impurity. . 2. The method of manufacturing a semiconductor device according to claim 1, wherein the annealing is performed at a low temperature and for a short time. 3. The amount of F ions introduced can be adjusted to an appropriate amount.
A method for manufacturing a semiconductor device according to section 1.