JPH10189470A - Fabrication of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress lowering of implantation efficiency by introducing fluorine into a polycrystalline semiconductor layer or an amorphous semiconductor layer on a semiconductor substrate in order to remove native oxide through heat treatment and increasing the grain size of semiconductor thereby removing native oxide uniformly from the silicon-polysilicon interface at low temperature. SOLUTION: A base region 11 is formed by implanting ions into a specified part of the surface layer on a silicon substrate (semiconductor substrate) 10. An insulator 12 is then deposited on the entire surface of the silicon substrate 10 and an emitter forming window 13 is made by opening the base region 11 partially. Subsequently, a polysilicon layer (polycrystalline semiconductor layer) 14 is formed by CVD and implanted with fluorine ions. It is then heat treated and a native oxide 15 is removed from the interface of the silicon substrate 10 and the polysilicon layer 14. Thereafter, Si ions are implanted into the polysilicon layer 14 in order to make the polysilicon layer amorphous and the grain size of amorphous polysilicon crystal composing the polysilicon layer 14 is increased by heat treatment.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device which is particularly suitable for manufacturing a highly reliable and high performance bipolar transistor.

[0002]

2. Description of the Related Art In recent years, with the demand for larger scale and higher performance of LSIs, higher performance of bipolar transistors is also required. By the way, in manufacturing a bipolar transistor, a polysilicon emitter technology has been conventionally used. This polysilicon emitter technique is a technique of forming an emitter region 4 by diffusing impurities in a polysilicon layer 3 formed over a base region 2 of a silicon substrate 1 into the base region 2 as shown in FIG. The reason is that the base current can be suppressed by the thin oxide film (natural oxide film) 5 formed at the interface between the silicon substrate 1 (base region 2) and the polysilicon layer 3, and the injection efficiency can be improved. This is an effective means.

[0003]

However, in the above-mentioned technology, hot carriers are generated by a reverse bias applied between the emitter region and the base region in the obtained bipolar transistor, whereby a trap is generated in the oxide film 5. As a result, the base current increases and the injection efficiency decreases.

This is because RTA is performed at the time of forming the emitter.
For example, during the high-temperature short-time treatment, the bond of Si—O is partially cut, and the oxide film 5 becomes in an uneven state. Here, it is effective to perform high-temperature and short-time treatment such as RTA at the time of forming the emitter because it is effective to make the emitter shallow junction in order to reduce the accumulated charge in the emitter. This is because time processing is advantageous.
In addition, the introduction of a high-temperature and short-time processing technique is necessary in order to prevent the base profile having a shallow junction from being expanded by the heat treatment at the time of forming the emitter. Thus, in order to heat treatment during emitter formation also serves as a removal of the oxide film 5 is becomes necessary high temperature long-time heat treatment, in which case, for example, a base region formed Si _X Ge _(1-X) When such a material is used, the heat treatment for a long time at a high temperature reduces the lattice distortion and causes a disadvantage such as loss of heterogeneity.

The present invention has been made in view of the above circumstances, and an object of the present invention is to remove a natural oxide film at a silicon-polysilicon interface stably and uniformly at a low temperature by using, for example, a polysilicon emitter technique. It is an object of the present invention to provide a method of manufacturing a semiconductor device capable of manufacturing a highly reliable and high performance bipolar transistor while suppressing a decrease in injection efficiency due to an increase in base current.

[0006]

According to a method of manufacturing a semiconductor device of the present invention, a step of forming a polycrystalline semiconductor layer or an amorphous semiconductor layer on a semiconductor substrate, and a step of forming a polycrystalline semiconductor layer or an amorphous semiconductor layer in the polycrystalline semiconductor layer or the amorphous semiconductor layer are performed. A step of introducing fluorine, a step of removing a natural oxide film formed on the semiconductor substrate immediately below the polycrystalline semiconductor layer or the amorphous semiconductor layer by a heat treatment, and a step of removing the polycrystalline semiconductor layer or the amorphous semiconductor layer. And a step of increasing the particle size of the semiconductor.

According to this manufacturing method, fluorine is introduced into the interface between the semiconductor substrate and the polycrystalline semiconductor layer or the amorphous semiconductor layer by introducing fluorine into the polycrystalline semiconductor layer or the amorphous semiconductor layer. Then, when the semiconductor substrate is a silicon-based material, the natural oxide film at the interface between the polycrystalline semiconductor layer or the amorphous semiconductor layer and the semiconductor substrate is broken by the heat treatment so that the Si—O bond is cut off by the previously introduced fluorine. O (oxygen) diffuses into the polycrystalline semiconductor layer, the amorphous semiconductor layer, or the like, whereby the oxide film is removed.

Conventionally, for example, a natural oxide film is removed by using fluorine to remove the natural oxide film and utilizing the action of promoting the breaking of Si—O bonds in the natural oxide film by the fluorine. For this reason, a high-temperature treatment at about 1000 ° C. for about 30 seconds is required, but the temperature can be reduced to about 950 ° C. for about 30 seconds. Furthermore, if the grain size of the polysilicon film is increased after removing the natural oxide film, the activation rate can be increased when impurities are diffused from the polysilicon film. It is possible to improve injection efficiency.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for manufacturing a semiconductor device according to the present invention will be described based on an embodiment in which the method is applied to a method for manufacturing a bipolar transistor. First, FIG.
As shown in FIG. 1A, a base region 11 is formed by ion-implanting a predetermined portion of a surface portion of a silicon substrate (semiconductor substrate) 10. Here, regarding the formation of the base region 11,
Instead of the ion implantation method, for example, an epitaxial growth technique can be adopted. Next, an insulating film 12 made of SiO ₂ is formed on the entire surface of the silicon substrate 10 by a thermal oxidation method or the like, and then a part of the opening is formed on the base region 11 by a known lithography technique and etching technique.
To form

Next, as shown in FIG.
Polysilicon is deposited by a CVD method at a temperature of about 650 ° C. to form a polysilicon layer (polycrystalline semiconductor layer) 14 having a thickness of 100 to 200 nm. Here, in the formed polysilicon layer 14, the grain size of the polysilicon is 0.1 mm.
It becomes about 0.5 to 0.2 μm. The emitter forming window 1
On the surface of the base region 11 in 3, a natural oxide film 15 made of a thin SiO ₂ is formed by being exposed to the air between processes.

Subsequently, fluorine (F) is ion-implanted into the polysilicon layer 14 under the conditions of an acceleration energy of 20 to 60 keV and a dose of 1 × 10 ¹⁵ to 1 × 10 ¹⁶ / cm ² . In this way, fluorine is added to the polysilicon layer 14.
When the ions are implanted, a part of the ions is transferred to the interface between the polysilicon layer 14 and the silicon substrate 10 on the base region 11 by diffusion or the like.

Next, for example, at 900 ° C. to 1050 ° C.,
Heat treatment is performed for 0 to 60 seconds. When the heat treatment is performed in this manner, as shown in FIG.
The natural oxide film 15 on the surface of the base region 11 in the surface 3, that is, the natural oxide film 15 at the interface between the silicon substrate 10 and the polysilicon layer 14 is removed. That is, the natural oxide film 15 is first ion-implanted and
By the action of fluorine which has migrated to the interface between the silicon substrate 10 and the polysilicon layer 14, the Si—O bond is broken, and O (oxygen) diffuses into the polysilicon layer 14 and the like. It is removed from the interface with.

Here, in removing the native oxide film 15 as described above, the action of the previously ion-implanted fluorine,
That is, since the action of accelerating the breaking of the Si—O bond in the natural oxide film 15 is used, conventionally, for example, a high-temperature treatment of about 1000 ° C. for about 30 seconds was required to remove the natural oxide film. From 900 ° C. to 1050 as described above.
C., in the range of 10 to 60 seconds, for example, at 950.degree. C. for about 30 seconds.

Next, Si is added to the polysilicon layer 14,
Acceleration energy 40-80 keV, dose 1 × 1
Ions are implanted under the condition of 0 ¹⁵ to 1 × 10 ¹⁶ / cm ² to make the polysilicon constituting the polysilicon layer 14 amorphous. Subsequently, a heat treatment is performed at 600 ° C. to 1000 ° C. for about 30 minutes to 10 hours to increase the crystal grain size of the amorphized polysilicon constituting the polysilicon layer 14. By making the polysilicon amorphous by such ion implantation and by heat treatment, the grain size of the polysilicon constituting the polysilicon layer 14 can be increased to about 1 μm.

Next, impurities are introduced into the polysilicon layer 14 by ion implantation or the like, and thereafter, heat treatment is performed to diffuse the impurities in the polysilicon layer 14 into the base region 11 to form an emitter region 16. The components of the bipolar transistor, which are not described above, are formed in the same manner as in the prior art, and the description is omitted.

In such a manufacturing method, by introducing fluorine first, the natural oxide film 15 can be removed more stably and uniformly at a lower temperature than before by the action of the fluorine. A reliable and high-performance bipolar transistor can be manufactured. If the grain size of the polysilicon (polysilicon layer 14) is as large as about 1 μm before the removal of the native oxide film 15, the fluorine concentration at the interface between the polysilicon layer 14 and the native oxide film 15 decreases, and Si— Before the removal of the native oxide film 15, it is preferable to reduce the grain size of polysilicon since the effect of accelerating the O-bond cutting is reduced. Thus, in the present embodiment, the natural oxide film 15
Before the removal, the grain size of the polysilicon is set to about 0.05 to 0.2 μm, and after the removal of the native oxide film 15, the grain size of the polysilicon is increased to about 1 μm.
The removal of the polysilicon layer 1 does not hinder the removal.
In forming the emitter region 16 by diffusing an impurity from the substrate 4, the activation rate of the impurity can be increased to achieve high injection efficiency.

Further, the base region is formed by Si _x Ge.
When formed from a material such as _(1-X), the removal process of the natural oxide film 15 is performed prior to the formation of the emitter region. This can be performed by ordinary high-temperature and short-time processing, thus not only preventing the base profile from fluctuating, but also preventing the loss of heterogeneity due to relaxation of lattice distortion due to high-temperature and long-time heat treatment. You can also.

In the above embodiment, the introduction of fluorine into the polysilicon layer 14 and the introduction of impurities into the polysilicon layer 14 for forming the emitter region 16 are performed independently of each other. The present invention is not limited to this, and it is also possible to combine these processes with one process. For example, in the case of forming a PNP transistor, if the introduction of fluorine into the polysilicon layer 14 is performed by ion implantation of BF ₂ ⁺ , this ion implantation is carried out as it is to remove impurities into the polysilicon layer 14 for forming the emitter region 16. It can also be used for introduction.

Similarly, ion implantation for amorphizing the polysilicon to increase the grain size of the polysilicon in the polysilicon layer 14 and impurity implantation into the polysilicon layer 14 for forming the emitter region 16 are performed. Although the introduction and the introduction were performed independently, it is also possible to combine these with one process. For example, when forming an NPN transistor, As (arsenic) is selected as an impurity for introducing the impurity into the polysilicon layer 14 for forming the emitter region 16, the acceleration energy is set to 60 to 80 keV, and
By setting the dose amount to about 5 × 10 ^{15 to} 2 × 10 ¹⁶ / cm ² , this processing can be used as it is as the ion implantation processing for making the polysilicon amorphous.

Further, in the above-described embodiment, an example in which the present invention is applied to the manufacture of a bipolar transistor having a normal Washed Poly Emitter structure has been described. However, the manufacture of a bipolar transistor having a Double Poly structure using a base extraction electrode made of polysilicon has been described. Is also applicable. Also,
In the above embodiment, after the formation of the base region 11, the natural oxide film 1 is formed.
However, the present invention is not limited to this, and the interface treatment between the silicon substrate 10 and the polysilicon layer 14, that is, the removal treatment of the native oxide film 15 is first performed at the portion where the base region is to be formed. After that, an impurity may be introduced and diffused into a portion where the base is to be formed by ion implantation or the like to form a base region. If the base region is formed after the removal process of the native oxide film 15, the impurities in the base region can be prevented from being re-diffused by the high-temperature treatment in the removal process.

[0021]

As described above, in the method of manufacturing a semiconductor device according to the present invention, a heat treatment is performed after fluorine is introduced into a polycrystalline semiconductor layer or an amorphous semiconductor layer, and the semiconductor substrate and the polycrystalline semiconductor layer or the amorphous Since the natural oxide film at the interface with the semiconductor layer is removed, the natural oxide film can be more stably and uniformly removed at a lower temperature than the conventional one by the action of the introduced fluorine, and therefore high reliability can be achieved. , And a high-performance bipolar transistor can be manufactured.

[Brief description of the drawings]

FIGS. 1A to 1C are cross-sectional views of a principal part for explaining an embodiment in which the present invention is applied to the manufacture of a bipolar transistor in the order of steps.

FIG. 2 is a side sectional view of a main part of a bipolar transistor for describing a conventional problem.

[Explanation of symbols]

Reference Signs List 10 silicon substrate (semiconductor substrate) 14 polysilicon layer (polycrystalline semiconductor layer) 15 natural oxide film

Claims (6)

[Claims] A step of forming a polycrystalline semiconductor layer or an amorphous semiconductor layer on a semiconductor substrate; a step of introducing fluorine into the polycrystalline semiconductor layer or the amorphous semiconductor layer; Just below the crystalline semiconductor layer,
A semiconductor device comprising: a step of removing a natural oxide film formed on the semiconductor substrate by heat treatment; and a step of increasing a grain size of a semiconductor in the polycrystalline semiconductor layer or the amorphous semiconductor layer. Production method. 2. The step of increasing the particle size of the semiconductor,
2. The method according to claim 1, comprising an ion implantation process and a heat treatment. 3. A step of introducing an impurity into the polycrystalline semiconductor layer or the amorphous semiconductor layer, and a step of performing a heat treatment to diffuse the impurity in the polycrystalline semiconductor layer or the amorphous semiconductor layer into the semiconductor substrate. 2. The method according to claim 1, further comprising the steps of: 4. The step of increasing the particle size of the semiconductor,
4. The method for manufacturing a semiconductor device according to claim 3, comprising an ion implantation process and a heat treatment. 5. The step of introducing fluorine into the polycrystalline semiconductor layer or the amorphous semiconductor layer and the step of introducing impurities into the polycrystalline semiconductor layer or the amorphous semiconductor layer are performed by the same ion implantation process. The method according to claim 3, wherein the method is performed. 6. An ion implantation process for increasing a grain size of a semiconductor of the polycrystalline semiconductor layer or the amorphous semiconductor layer, and a step of introducing an impurity into the polycrystalline semiconductor layer or the amorphous semiconductor layer, 5. The method according to claim 4, wherein the same ion implantation is performed.