JPH03133138A - Manufacture of bump of package for integrated circuit - Google Patents

Abstract

PURPOSE:To contrive the improvement of a workability for forming a bump by a method wherein the workability is improved in such a way that the is formed on the surface of an insulating substrate by a plating method. CONSTITUTION:A photoresist 4 is applied on the surface of a base film 2 and after a pattern exposure is performed, the photoresist 4, which is located at a part only to be formed with a plated bump 5, is removed by a developing. Then, the plated bump 5 is formed of Cu by an electrolytic plating method and after an unnecessary photoresist 4 is removed, an unnecessary film 2 is removed by an ethcing treatment. Whereupon, a bump 6 consisting of the film 2 and the bump 5 is formed. Thereby, a workability for forming the bump 6 is improved.

Description

[Detailed Description of the Invention] [Industrial Field of Application] [Prior Art] It is known that bumps are used to connect an integrated circuit and a package, or to connect a motherboard and a package.

Bumps are generally formed on the surface of an insulating substrate.

Then, when the integrated circuit is mounted on the insulating substrate or the package is mounted on the motherboard, the bumps on the insulating substrate are bonded to electrodes formed on the integrated circuit or the motherboard. Then, an electrical connection is made between the package and the integrated circuit or between the package and the motherboard.

There are two known methods for manufacturing bumps: a printing lamination method and a brazing filler metal mounting method.

As shown in FIG. 6, in the printing lamination method, 1102 such as tungsten or molybdenum is printed multiple times in layers on the portion of the surface of the insulating substrate 101 where bumps are to be formed using a screen printing method. In this method, a laminated bump 103 is formed with a thickness of B102.

In the brazing material tower 1 method, as shown in FIG.
A base layer 106 made of tungsten or molybdenum 104 and a Ni layer 105 is formed on a portion of the surface where bumps are to be formed. Next, a small ball of brazing material (for example, silver solder) is placed on the surface of the base 1fi 106, and the brazing bump 107 is formed by the brazing material.

Note that the formed laminated bumps 103 and solder bumps 107
Ni plating 108 and Au plating 109 are applied to the surface of the electrode 108 for the purpose of preventing oxidation and reducing connection resistance.

[Problems to be Solved by the Invention] The bump manufacturing method described above had the following problems.

b) Workability is poor and manufacturing costs are high.

In conventional manufacturing methods, it was difficult to reduce the diameter of the bumps, and the distance between the bumps became long, making it difficult to miniaturize integrated circuit packages.

The object of the present invention is to be able to easily form a bump,
Another object of the present invention is to provide a method for manufacturing a bump for an integrated circuit package, which allows the diameter of the bump to be reduced.

[Means for Solving the Problems] In order to achieve the above object, the present invention employs the following technical means.

The manufacturing method of bumps for integrated circuit packages is as follows;
[It consists of a combination of degrees.

A first step of forming a conductive base film on the surface of the insulating substrate,
a second step of forming an insulating film on a portion of the surface of the base film excluding a portion where bumps are to be formed;

A third step of forming plating bumps with a thickness of 50 μm or more on the surface of the base film on which the insulating film is not formed, by a plating method. a fourth step of removing unnecessary base films and the insulating film;

[Operations and Effects of the Invention] Since the bumps are formed on the surface of the insulating substrate by the plating method, the bumps can be formed more easily than in the past. This improves workability and reduces the manufacturing cost of integrated circuit packages.

Furthermore, since the bumps are formed on the surface of the insulating substrate by a plating method, the diameter of the bumps can be made smaller than in the past. This shortens the distance between the bumps, making it possible to downsize the S product circuit package.

[Example] Next, a method for manufacturing a bump for an integrated circuit package according to the present invention will be described based on an example shown in the drawings.

The manufacturing process of the bump will be explained using the explanatory diagrams of FIGS. 1 to 5. Note that the bumps shown in this example are connected to electrodes of the motherboard.

(See Figure 1) First, on the surface of a ceramic insulating substrate 1 made of sintered alumina, aluminum nitride, etc.
Form a conductive base H2 that will be the base for electrolytic plating (
(first culm), an example of this base film 2 is shown. The base film 2 is
Ti and M are deposited on the surface of the insulating substrate 1 by well-known thin film forming techniques such as sputtering and vapor deposition.
o and Cu were formed in this order. Although the base film 2 is formed using thin film technology, it may be formed using thick film technology.

Note that the reference numeral 3 shown in the figure indicates a conductive column electrically connected to internal wiring (not shown) laminated within the insulating substrate 1.

(See Figure 2) A photoresist 4 (
After coating the insulation wA of the present invention and performing pattern exposure, the photoresist 4 is removed (second
process).

(See FIG. 3) Plating bumps 5 are formed of Cu by electrolytic plating. The thickness of the plating bump 5 is at least 50 μm, preferably 10 μm or more.
It is formed to have a thickness of 0 μm or more (third step). In this way, the thickness of the plating bump 5 is set to 50 μm or more, preferably 100 μm or more.
The reason why the thickness is larger than μm is that when the integrated circuit package is mounted on the motherboard and the bumps 6 and the electrodes of the motherboard are joined by soldering, the width of the cleaning liquid flowing (the width between the insulating substrate 1 and the This is to ensure the distance between the bumps 6 and the motherboard, or to confirm the connection between the bumps 6 and the electrodes of the motherboard.

(See Figure 4) After removing unnecessary photoresist 4,
Remove unnecessary base film 2 by etching process (
4th step).

Through the above steps, bumps 6 consisting of base IEI 2 and plating bumps 5 are formed.

(See FIG. 5) After forming the Ni layer 7 on the surface of the bump 6 formed by the above method by electrolytic plating,
An Au layer 8 is formed on the surface to complete the process. In addition, Au
Layer 8 is for the purpose of preventing oxidation and reducing connection resistance.
It is something that is formed.

(Effects of Example) The method of forming plated bumps 5 on the surface of the insulating substrate 1 by a plating method and manufacturing bumps 6 with the thickness of the plated bumps 5 is to form a laminated bump, This method is easier than the conventional method of forming solder bumps. This improves the workability of forming the bumps 6, so that the manufacturing cost of the integrated circuit package can be kept low.

Furthermore, the diameter of the plated bump 5 can be reduced to less than half that of conventional laminated bumps and solder bumps. This makes it possible to shorten the distance between the centers of adjacent bumps 6 and the centers of the bumps 6, making it possible to downsize the integrated circuit package.

Furthermore, since the plating bumps 5 can be formed at a low temperature (a temperature that allows electrolytic plating), the bumps 6 can be formed on the insulating substrate 1 made of glass ceramic with a low melting point.

(Modification) After forming N1Jl on the surface of the base film, the plating pan 2° may be formed.

Although an example is shown in which the present invention is applied to a bump that is bonded to an electrode of a motherboard, the present invention may also be applied to a bump that is bonded to an electrode of an integrated circuit.

Although an example has been shown in which the plating bumps are formed by electrolytic plating, the plating bumps may also be formed by electroless plating.

In the diagram 1...Insulating substrate 2... Base film 4... Photoresist (insulation 1M) 5... Plated bump 6...Bump

Claims (1)

[Claims] 1) A method for manufacturing a bump for an integrated circuit package, which comprises combining the following steps. A first step of forming a conductive base film on the surface of the insulating substrate. a second step of forming an insulating film on a portion of the surface of the base film excluding a portion where bumps are to be formed; A third step of forming plating bumps with a thickness of 50 μm or more on the surface of the base film on which the insulating film is not formed, by a plating method. a fourth step of removing unnecessary base films and the insulating film;