JPH0312941A - Superconductive device - Google Patents
Superconductive deviceInfo
- Publication number
- JPH0312941A JPH0312941A JP1150086A JP15008689A JPH0312941A JP H0312941 A JPH0312941 A JP H0312941A JP 1150086 A JP1150086 A JP 1150086A JP 15008689 A JP15008689 A JP 15008689A JP H0312941 A JPH0312941 A JP H0312941A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- pad
- superconducting
- wire
- super
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000463 material Substances 0.000 claims abstract description 19
- 239000010409 thin film Substances 0.000 abstract description 8
- 238000004544 sputter deposition Methods 0.000 abstract description 2
- 238000000151 deposition Methods 0.000 abstract 1
- 238000003475 lamination Methods 0.000 abstract 1
- 239000010408 film Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 4
- 239000000956 alloy Substances 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 230000007704 transition Effects 0.000 description 2
- 239000010953 base metal Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000007712 rapid solidification Methods 0.000 description 1
- 238000004064 recycling Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 238000005491 wire drawing Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01041—Niobium [Nb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は超電導装置、詳しくは超電導素子ど外部リード
とを超電導性を有する接続材料で接続μしめる超電導装
置に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a superconducting device, and more particularly to a superconducting device in which a superconducting element is connected to an external lead using a connecting material having superconducting properties.
（関連技術とその課題）
超電導素子の電極および配線をＮｂ層で形成Ｊることは
、回路形成プロセスが容易であること、超電導性を確保
して超電導装置の信頼性を高め得ることで有利である。(Related technology and its issues) Forming the electrodes and wiring of a superconducting element using a Nb layer is advantageous because the circuit formation process is easy and the reliability of the superconducting device can be improved by ensuring superconductivity. be.
又、本発明者は超電導素子の動作温度（液体ヘリウム温
度４．２１０において超電導状態へ転移ザる接続材料を
開発したく特願昭６２−３３５１１３号）。The present inventor also wishes to develop a connecting material that transitions to a superconducting state at the operating temperature of a superconducting element (liquid helium temperature of 4.210 °C).
しかるに上記先願明細用においては、超電導素子の電極
旧）層と接続材料の具体的な接続構造どして、前記Ｎｂ
層上に接続材料と同質（例えばＰｂ ＩｎＡｕ合金）の
下地金属（パッド）を形成し、このパッド上に接続材料
を接続ゼしめる構造を例示した。However, in the specification of the above-mentioned prior application, the specific connection structure between the electrode layer of the superconducting element and the connection material, etc.
A structure is exemplified in which a base metal (pad) of the same quality as the connection material (for example, Pb InAu alloy) is formed on the layer, and the connection material is connected onto this pad.
しかしながら上記パッドはＮｂ層との密着度が必ずしも
高くなく、接続材料と超電導素子の電極との接合強度を
所定値以上に確保し得ないことを発見した。However, it has been discovered that the adhesion of the pad to the Nb layer is not necessarily high, and it is not possible to ensure the bonding strength between the connecting material and the electrode of the superconducting element to exceed a predetermined value.
而して本発明は斯る事情に鑑み、超電導素子及び外部リ
ードど接続）ｒＡ ｉｉｌどの接合強度を高めるととも
に超電導コンタクトを確保し得る高信頼性の超電導装置
を提供せんどづ−るムのである。In view of these circumstances, the present invention aims to provide a highly reliable superconducting device that can secure superconducting contact while increasing the bonding strength of superconducting elements and external leads. .
（課題を解決覆るだめの技術的手段）
断る本発明の超電導装置は、超電導素子の電極をＮｂ層
で形成し、該Ｎｂ層と外部リードとを超電導性を有する
接続材料で接続せしめる超電導装置において、前記Ｎｂ
層上にＡｕ極薄膜からなるパッドを形成して該パッドに
接続材料を接続せしめ、前記パッドの厚さが５〜２００
ｎｍであることを特徴とする。(Technical means to solve the problem) The superconducting device of the present invention is a superconducting device in which the electrode of a superconducting element is formed of an Nb layer, and the Nb layer and an external lead are connected with a connecting material having superconductivity. , the Nb
A pad made of an ultra-thin Au film is formed on the layer, a connecting material is connected to the pad, and the thickness of the pad is 5 to 200 mm.
It is characterized by being nm.
（作用）
本発明によれば、上記パッドがＡｕ極薄膜であり、その
膜厚が５ａｍ以」−であることからＮｂ層、接続材料と
の密着性がよく接合強度が改善されるとともに膜厚が２
００ｎｍ以下であることから超電導コンタクトが確保さ
れる。(Function) According to the present invention, since the pad is an ultra-thin Au film with a thickness of 5 am or more, it has good adhesion with the Nb layer and the connecting material, improving the bonding strength and increasing the film thickness. is 2
Since the thickness is 00 nm or less, superconducting contact is ensured.
（実施例）
本発明の実施例を図面により説明すれば、第１図は接続
＋Ａ Ｉ＋として超電導ワイＡ７を用いた１ノイＡ７ボ
ンデイング型の超電導装置を示す部分拡大図である。(Embodiment) An embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a partially enlarged view showing a 1-neutral A7 bonding type superconducting device using a superconducting wire A7 as a connection +A I+.
第１図において、（１）はプラスデック又はセラミック
製の基板、（２）は超電導素子、（３）は外部リード、
（４）は超電導ワイヤである。In Figure 1, (1) is a plus deck or ceramic substrate, (2) is a superconducting element, (3) is an external lead,
(4) is a superconducting wire.
超電導素子（２）はＳ５層と電極（２ａ）を形成するＮ
ｂ層との積層描造であり、そのＮｂ層上に酊の極薄膜か
らなるパッド（５）を形成する。 外部リード（３）は
超電導性を確保するためにＮｂ層でもって形成し、その
Ｎｂ層上にＡＬＩの極薄膜からなるパッド（６）を形成
する。The superconducting element (2) is made of N which forms the S5 layer and the electrode (2a).
This is a laminated drawing with the Nb layer, and a pad (5) made of an extremely thin film of Nb is formed on the Nb layer. The external lead (3) is formed of a Nb layer to ensure superconductivity, and a pad (6) made of an extremely thin film of ALI is formed on the Nb layer.
超電導ワイヤ（４）は超電導性を有する拐料、例えば円
を主要元素とし、それに添加元素を配合した合金を急冷
凝固法により製造し、かつ伸線加工によって細いイワイ
ヤ状に作製したものであり、その径は２５〜５０μｍφ
である。The superconducting wire (4) is made from a material having superconductivity, such as an alloy in which a circle is the main element and additional elements are mixed therein, by a rapid solidification method, and made into a thin wire shape by wire drawing. Its diameter is 25~50μmφ
It is.
ワイＸ？（４）の具体的組成を例示すれば、Ｐｂ１ｎＡ
ｕ、 ＰｂｌｎＡｇ、 ＰｂＩｎＣＡ、 ＰｂＢ１．
Ｐｂ５ｂなどの合金ワイヤである。YX? To illustrate the specific composition of (4), Pb1nA
u, PblnAg, PbInCA, PbB1.
It is an alloy wire such as Pb5b.
上記ワイヤく４）はウェッジボンディング法によって素
子（２）のパッド（５）と外部リード（３）のパッド（
６）とに渉ってループを形成した状態で接続される。尚
、図中（７）は絶縁材からなる保′Ｉ！を層である上記
パッド（５）（６）は高純度（９９，９９％以十）のＡ
ｕを蒸着法又はスパッタ法によってＮｂｌ上に形成し、
その厚さを５ ｎｍ （５Ｘ１０−３μｍ）−２００ｎ
ｍ （０，２μｍ）とした極薄膜である。The above wire 4) is connected to the pad (5) of the element (2) and the pad (3) of the external lead (3) by wedge bonding.
6) and are connected to form a loop. Note that (7) in the figure is an insulation material made of insulating material. The above pads (5) and (6) are made of high purity (99.99% or more) A
u is formed on Nbl by a vapor deposition method or a sputtering method,
Its thickness is 5 nm (5X10-3μm)-200n
It is an extremely thin film with a thickness of m (0.2 μm).
パッド（５）（６）の厚さが５ｎｍ未＋６１ ’ｐは所
望の接合強度が得られず２００ｎｍを越えた場合にはワ
イヤ（４）とＮｂ層との間で超電導コンタクトできない
。If the thickness of the pads (5) and (6) is less than 5 nm+61'p, the desired bonding strength cannot be obtained, and if the thickness exceeds 200 nm, superconducting contact cannot be made between the wire (4) and the Nb layer.
実験例によれば、ワイヤ（４）に４７μｍφのＰｂｑｂ
Ｉｎ２ｏ Ａｕ、、 （ａｔ％）線を用い０．４μ
ｍ厚さのＮｂ層上に３０ｎｍ厚さのＡｕスパッタ膜から
なるパッド（５）（６）を形成して該パッド（５）（６
）に前記ワイヤ（４）をボンディングした結果、ワイヤ
（４）の引張強度は４．５５ｘ１０−２〜８．７５ｘ１
０−２（Ｎ）の範囲内にあり、平均値が７．４Ｘ１０−
２（Ｎ＞であるとともに接合強度の低下は１５回の熱リ
イクル試験（４２へ・２７３にの湿度域）後においても
認められなかった。According to the experimental example, the wire (4) was made of Pbqb with a diameter of 47 μm.
In2o Au, 0.4μ using (at%) wire
Pads (5) and (6) made of a 30 nm thick Au sputtered film are formed on the m thick Nb layer.
), the tensile strength of the wire (4) was 4.55x10-2 to 8.75x1.
It is within the range of 0-2(N), and the average value is 7.4X10-
2 (N>) and no decrease in bonding strength was observed even after 15 thermal recycling tests (humidity ranges from 42 to 273).
又、熱サイクル試験前後において、接合部を含む配線で
超電導転移（４，２Ｋ＞を示した。Also, before and after the thermal cycle test, the wiring including the junction showed superconducting transition (4.2K>).
第２図は接続材料として超電導バンプを用いたフリップ
デツプボンディング型の超電導装置を示す部分拡大図で
ある。FIG. 2 is a partially enlarged view showing a flip-deep bonding type superconducting device using superconducting bumps as a connecting material.
第２図において、（１′）は基板、（２′）は超電導素
子、（３゛）は外部リード、（４′）はバンプであり、
超電導素子（２′）には先の実施例と同様にＮｂ層から
なる電極（２’ ａ）が形成され、該電極（２’ ａ）
のＮｂ層上に５ａｍ 〜２００ｎｍのへＵ極薄膜からな
るパッド（５′）を形成してなる。In Fig. 2, (1') is the substrate, (2') is the superconducting element, (3') is the external lead, (4') is the bump,
In the superconducting element (2'), an electrode (2'a) made of an Nb layer is formed as in the previous embodiment, and the electrode (2'a)
A pad (5') made of an extremely thin film of 5 am to 200 nm is formed on the Nb layer.
基板（１′）上にはＮｂ層からなる外部リード（３′）
が形成され、そのＮｂ層上に５１１１１〜２００ｎｍの
Ａｕ極薄膜からなるパッド（６′）が形成される。On the substrate (1') is an external lead (3') made of Nb layer.
is formed, and a pad (6') made of an extremely thin Au film of 51111 to 200 nm is formed on the Nb layer.
バンプ（７１’）は先の実施例で説明した超電導ワイヤ
（４）をポールボンディング法ににす、すなわちライ１
フボンダのキャピラリ（図示しず）に挿通された前記ワ
イヤ（４）の先端を電気トーチで加熱することによりボ
ール状とし、その後キヤピラリ−によりワイ＼７を引上
げてボールをワイヤ根本部から切断して外部リード（３
′）のパッド（６′）上に供給する方法にＪζり作製さ
れる。The bump (71') is made by pole bonding the superconducting wire (4) described in the previous embodiment, that is, by bonding the superconducting wire (4) to the wire 1.
The tip of the wire (4) inserted into the capillary (not shown) of the fubonder is heated with an electric torch to form a ball, and then the wire 7 is pulled up by the capillary and the ball is cut from the base of the wire. External lead (3
') is manufactured by the method of supplying it on the pad (6').
バンプ（４’ ）」−には、その後素子（２′）のパッ
ド（５′）を押圧して接着することにＪζっで、素子（
２′）の電極（２’ ａ）と外部リード（３′）とがバ
ンプ（４′ ）を介して接続される。Afterwards, the pad (5') of the element (2') is pressed and bonded to the bump (4').
The electrode (2'a) of 2') and the external lead (3') are connected via a bump (4').
この第２図実施例においてもバンプ（４′）と素子（２
′）の電極（２’ ａ）および外部リード（３′）どの
接合強度が確保され、また超電導コンタクトできること
を確認した。In this embodiment of FIG. 2 as well, the bump (4') and the element (2)
It was confirmed that the bonding strength between the electrode (2'a) and the external lead (3') was ensured, and that superconducting contact could be made.
尚、第２図においてはノリツブチップボンディング型を
示したが、テープキャリアボンディング型の超電導装置
においても本発明を適用し得ることは容易に理解される
ところである。Although FIG. 2 shows a Noribu chip bonding type superconducting device, it is easily understood that the present invention can also be applied to a tape carrier bonding type superconducting device.
以上の第１図及び第２図実施例においては、外部リード
（３）（３’ ）をＮｂ層で形成した場合を示しＩＣが
、それら外部リード（３）（３’ ）を超電導ｔ［材料
、例えばＰｂｌｎ層で形成することもに＜、その場合に
はパッド（６）（６’ ）を介在さける必要がなく、ワ
イｊ７（４） 、バンプ（４′）を外部リード（３）（
３’ ）に直接に接続づることができる。In the embodiments of FIGS. 1 and 2 above, the external leads (3) (3') are formed of a Nb layer, and the IC uses superconducting t[material] to form these external leads (3) (3'). For example, the pads (6) (6') may be formed using a Pbln layer.
3') can be directly connected.
（効果）
本発明によれば、超電導素子及び外部リードのＮｂ層上
にＡｕ極薄膜からなるパッドを形成したので、ワイヤ、
バンプなど接続材料とＮｂ層との密着度が高く両者の接
合強度が増大し、またパッドの膜厚が２００ｎｍ以下で
あることから配線の超電導コンタクトが確保され、した
がって信頼性の高い超電導装置を提供し得る。(Effects) According to the present invention, since the pad made of an ultra-thin Au film is formed on the Nb layer of the superconducting element and the external lead, the wire,
The high degree of adhesion between the connecting material such as the bump and the Nb layer increases the bonding strength between the two, and the pad thickness is 200 nm or less, ensuring superconducting contact for wiring, thus providing a highly reliable superconducting device. It is possible.
第１図はワイヤボンディング型の超電導装置を示１部分
拡大図、第２図はノリップチップボンアイング型の超電
導装置を示す部分拡大図である。
図中、（２）（２’ ）は超電導素子、（２ａ〉（２’
ａ）は電極、（３）（３’ ）は外部リード、（４）
はワイヤ、（／′Ｉ’）はバンプ、（５）（５’ ＞（
６）（６’ ）はパッドである。FIG. 1 is a partially enlarged view of a wire bonding type superconducting device, and FIG. 2 is a partially enlarged view of a Norip chip bonding type superconducting device. In the figure, (2) (2') are superconducting elements, (2a>(2'
a) is the electrode, (3) (3') is the external lead, (4)
is a wire, (/'I') is a bump, (5) (5'> (
6) (6') is a pad.
Claims (3)
外部リードとを超電導性を有する接続材料で接続せしめ
る超電導装置において、前記Ｎｂ層上にＡｕ極薄膜から
なるパッドを形成して該パッドに接続材料を接続せしめ
、前記パッドの厚さが５〜２００ｎｍである超電導装置
。(1) In a superconducting device in which the electrode of a superelectric element is formed of a Nb layer and the Nb layer and an external lead are connected using a connecting material having superconductivity, a pad made of an ultra-thin Au film is formed on the Nb layer. A superconducting device in which a connecting material is connected to the pad by means of a wire, and the pad has a thickness of 5 to 200 nm.
に５〜２００ｎｍのＡｕ極薄膜からなるパッドを形成し
た請求項第１項記載の超電導装置。(2) The superconducting device according to claim 1, wherein the external lead is formed of a Nb layer, and a pad made of an ultra-thin Au film of 5 to 200 nm is formed on the Nb layer.
ードに接続材料を直接接続せしめた請求項第１項記載の
超電導装置。(3) The superconducting device according to claim 1, wherein the external lead is made of a superconducting material, and a connecting material is directly connected to the external lead.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1150086A JPH0656860B2 (en) | 1989-06-12 | 1989-06-12 | Superconducting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1150086A JPH0656860B2 (en) | 1989-06-12 | 1989-06-12 | Superconducting device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0312941A true JPH0312941A (en) | 1991-01-21 |
| JPH0656860B2 JPH0656860B2 (en) | 1994-07-27 |
Family
ID=15489209
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1150086A Expired - Lifetime JPH0656860B2 (en) | 1989-06-12 | 1989-06-12 | Superconducting device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0656860B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019063112A1 (en) * | 2017-09-29 | 2019-04-04 | International Business Machines Corporation | Under-bump metallization structure comprising superconducting material |
| US10727391B2 (en) | 2017-09-29 | 2020-07-28 | International Business Machines Corporation | Bump bonded cryogenic chip carrier |
-
1989
- 1989-06-12 JP JP1150086A patent/JPH0656860B2/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019063112A1 (en) * | 2017-09-29 | 2019-04-04 | International Business Machines Corporation | Under-bump metallization structure comprising superconducting material |
| US10608158B2 (en) | 2017-09-29 | 2020-03-31 | International Business Machines Corporation | Two-component bump metallization |
| US10629797B2 (en) | 2017-09-29 | 2020-04-21 | International Business Machines Corporation | Two-component bump metallization |
| US10727391B2 (en) | 2017-09-29 | 2020-07-28 | International Business Machines Corporation | Bump bonded cryogenic chip carrier |
| US10734567B2 (en) | 2017-09-29 | 2020-08-04 | International Business Machines Corporation | Bump bonded cryogenic chip carrier |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0656860B2 (en) | 1994-07-27 |
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