JPH0312741B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a mask memory method, and in particular to a method for using any memory module in a memory system consisting of a plurality of memory modules without providing a dedicated mask memory on hardware. This invention relates to a method in which a module is allocated as a mask memory at any time, and the remaining memory modules are designated as processing memories to perform mask processing.

[Technology background]

Conventionally, for example, in image processing systems, mask processing has been used to specify and process areas on the screen, such as extracting or updating a specific part of the screen. Processing is performed by providing a dedicated mask memory in addition to the processing memory for screen data, accessing both memories simultaneously, reading the screen data and mask data at the corresponding address, and taking the AND of them. I was doing it.

Furthermore, in general image processing, processing such as overlapping and compositing multiple images or hiding a rear image with a front image is often performed. Therefore, in addition to functions to perform logical and arithmetic operations such as AND, OR, and EOR between image data, multiple processing memories are provided to enable high-speed execution of such image processing. FIG. 4 shows an example in which such calculations between a plurality of image data and mask processing are combined.

The example in Figure 4 shows image data A and image data B.
The OR logic is performed and the result is masked according to the mask data.

Figure 1 shows one of the conventional mask processing mechanisms described above.
This is an example. In the figure, 1-1 to 1-3
2 is a memory module for storing process data, for example screen data; 2 is a memory module for storing mask data; 3-1 and 3-2 are output sections; 4 is a mask data output section; 5 is an AND operation section; 6 is a write data bus, 7 is an address and control bus, 8-1 and 8-2 are processing data lines, and 9 is a masked processing data line.

The capacity of the mask memory 2 is the same as the capacity of each processing data memory module 1-1 to 1-3, and the mask data set in the mask data memory module 2 allows the memory module 1-1 to
Any one of processing data 1 to 3 can be masked. In addition, memory module 1-1
The processing data 1 to 3 may be, for example, different screen data of a full-size screen, or may be data of partial screens obtained by dividing one full-size screen. In the latter case, the screen area maskable by the mask data memory module 2 corresponds to the respective partial screen of each memory module. Further, the number of memory modules and the number of output units are merely examples, and can be configured with any necessary number as appropriate.

Processing data memory modules 1-1 to 1-3
Data is written to the mask data memory module 2 from the write data bus 6 based on signals from the address and control bus 7, and the memory modules 1-1 to 1-3
The read data is sent to the output section 3-1 or 3-2.
and read out to the processing data lines 8-1 and 8-2.

The output unit 3-1 or 3-2 selects one of the memory modules 1-1 to 1-3,
The arithmetic unit 5 performs a logical AND operation on this data and the data read from the mask data memory module 2, and outputs the masked data to the masked data line 9.

In the conventional mask processing mechanism described above, mask data can be set only in the mask data memory module 2, the memory modules 1-1 to 1-3 are dedicated to storing processing data, and the memory module 2 is used for mask data. Since the memory is fixed only for data storage, there is a problem in that the usability of the memory is low and the processing efficiency cannot be improved when performing various mask processing.

[Object and structure of the invention]

An object of the present invention is to provide a data processing system in which a memory for storing mask data is not fixed in hardware, and any one of a plurality of memory modules can be used as a mask memory at any time. The goal is to increase efficiency and improve mask processing capabilities.

The configuration of the present invention includes a memory system including a plurality of memory modules, at least one data output section and one mask data output section connected to each of the plurality of memory modules,
The data output section and the mask data output section each set one memory module to be accessed as a processing memory among the plurality of memory modules and one memory module to be accessed as a mask memory during mask processing. The data output section selects read data from one memory module that is set to be accessed as processing memory and outputs it as processing data, and the mask data output section selects read data from one memory module that is set to be accessed as processing memory and outputs it as processing data. The feature is that read data of one memory module is selected and output as mask data.

[Embodiments of the invention]

The details of the present invention will be explained below with reference to Examples.

FIG. 2 shows the configuration of one embodiment of the present invention. In the figure, 10-1 to 10-n are general-purpose memory modules, 11-1 and 11-2 are output sections, 12 is a mask data output section, 13 is an AND operation section, and 14
15 is a write data bus, 15 is an address and control bus, 16-1 to 16-2 are processing data selection lines, 17 is a mask data selection line, 18-1
18-2 is a processing data line, 19 is a mask data line, and 20 is a masked data line. Note that the memory module is a two-dimensional memory or a three-dimensional memory.
Any dimensional memory may be used.

In this embodiment, the memory modules 10-1 to 10-n can all be equally used as memories for storing processing data and mask data on a module basis, and are fixed in hardware for mask data. Only the mask data output section 12 is. Therefore, as long as a certain memory module is completely empty, whether it is designated for storing processing data or mask data can be arbitrarily determined depending on the processing situation. The allocation management of processing data and mask data to each memory module is performed by software using, for example, a table.

The output units 11-1, 11-2 and the mask data output unit 12 are each connected to a memory module 10.
Select read data from -1 to 10-n. The selection signal is the processing data selection line 16-1.
to 16-2, and mask data selection line 17.

As described above, in the present invention, all of the plurality of memory modules are equal and can each serve as processing memory or mask memory. For example, when performing a masked operation on two images, in order to read the two processing memories and the mask memory at once, set the same upper address in the registers in the memory module, and also set the processing memory's address in one output section. 1
a select signal is set to select image data from one of the processing memories, a select signal is similarly set to select image data from another one of the processing memories to one other output, and a select signal is set to select image data from another one of the processing memories; A select signal is set so that the output section selects image data from the mask memory. By doing so, processing data and mask data can be obtained from each output section at the same time.

The processing data and mask data selected in this manner are subjected to arithmetic processing in the AND operation section 13 and output to the masked processing data line 20.

In addition, in the embodiment shown in FIG. 2, two output sections for processing data are provided.
This is because calculations are assumed to be performed between two images, and at least two output units are required to calculate data from two processing memories for each pixel.

Also, only one OR gate and one AND gate are shown in the block of the AND operation unit 4 in FIG. 2, but this is only an example and is necessary for general inter-image operations. Any logical function can be provided.

FIG. 3 shows one of the embodiment systems shown in FIG.
An operation example will be shown in which memory modules 10-2 and 10-3 are used for storing mask data, and the remaining memory modules are used for storing processed data. In the figure, the output section 11-1 selects the processing data of the memory module 10-1, the mask data output section 12 selects the mask data of the memory module 10-2, and the calculation section 13 selects the processing data of the memory module 10-2. Mask processing is performed by calculating logical product.

〔Effect of the invention〕

As mentioned above, mask data can be set in any free memory module, and when it is no longer needed, it can be released and changed to store screen data, and memory modules can be allocated dynamically. Compared to conventional methods, the mask processing efficiency of the system is improved and the memory utilization efficiency is also improved.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram of a conventional mask memory processing mechanism, FIG. 2 is a configuration diagram of an embodiment of the present invention, FIG. 3 is an explanatory diagram showing an example of operation, and FIG. 4 is an explanatory diagram of a specific example of mask processing. be. In the figure, 10-1 to 10-n are memory modules, 11-1 and 11-2 are read data output units, 12 is a mask data output unit, 13 is an AND operation unit, 14 is a write data bus, and 15 denotes an address and control bus, and 20 denotes a data line to be masked.

Claims (1)

[Claims] 1. A memory system comprising a plurality of memory modules, and at least one data output section and one mask data output section connected to each of the plurality of memory modules, the data output section and the mask data output section being connected to each of the plurality of memory modules. This means that one memory module to be accessed as processing memory and one memory module to be accessed as mask memory are set among the plurality of memory modules mentioned above during mask processing, and the data output section is set as processing memory. The read data of one memory module set to be accessed is selected and output as processed data, and the mask data output section outputs the read data of one memory module set to be accessed as mask memory. A mask memory method characterized by selecting and outputting it as mask data.