JPH03127203A - Communication method for programmable controller - Google Patents

Abstract

PURPOSE:To decrease the number of signal lines by transmitting the message signals and other control signals with use of the same code and in an optional timing. CONSTITUTION:An input/output interface 61 is separately provided with a transmitting specified control data register 41 and a receiving specified control data register 42 and designates the storing position of an information signal to discriminate the general data signal from the message signal. Thus no problem is produced even if the same bit code is used to both general data and message signals. Then the different types of signals can be transmitted with use of the same code and furthermore the transmission timings of these signals are never limited. Thus it is possible to decrease the number of signals required for exchange of messages and transmission of the general information signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a communication method for a programmable controller, and more particularly to a communication method for communicating with a 10-programmable controller by exchanging messages.

[Conventional technology]

FIG. 4 shows a connection configuration between a conventional programmable controller and peripheral devices.

In FIG. 4, ten set module pieces that execute sequence programs in the programmable controller and a message module (input/output interface module) that transfers contact information communicated from the processor module edge to the controlled device are connected to the input/output interface 54, The external address bus 71 is connected to a bus t5c'' via a bus 619, for example, an external address bus 71, an M section data bus 72, and an external control bus (not shown). The external data bus 72 transfers a signal specifying the storage location (address) on the input/output interface 61 of information transmitted through the external data bus 72.The external data bus 72 transfers the information signal (contact The control bus transfers control signals that instruct operation (messages are transmitted) to the message module mark.The control bus transfers instruction signals related to transmission and reception, such as read/write signals and synchronization signals.The processor module side mark The input/output interface functions as a bus switch, and connects the internal bus of the 70 setsa and the external bus according to instructions from the central processing unit ft (CPU) 5x.

The input/output interface 61 of the message module 1Fli 160 has a plurality of registers Zoo as shown in FIG.
.

101 and a decoder, the information signal on the data bus 72 is written into a predetermined register or read from a predetermined register and output to the data bus 72 in response to a read/write signal from the control bus. At this time, the decoder 102 identifies the address signal and sets the register to be read/written (accessed) to an operable state. The above register includes multiple general information registers 100.
and one control signal storage register 101 are provided.

The procedure for transmitting an information signal from the processor module side mark to the message module mark in such a configuration will be described below.

In FIG. 4, the CPU 51 instructs the input/output interface to connect the bus. Next, an address signal specifying the control register 101 is output to the internal address bus, and at the same time a message signal indicating that transmission is to be performed is output to the internal data bus group. It also outputs a write signal to the internal control bus. As a result, the message signal is stored in the control data register 101 in the message module ω.

In response to this write, the communication control circuit 63 reads the message signal from this register, determines whether or not it can be received, and writes the determination result into the control register 101. After a certain period of time, the CPU 51 generates a read signal and an address signal, and reads a message signal (ACK signal) indicating whether the reception state is possible from the control data register 101.

When reception is possible, the CPU 51 writes a plurality of information signals into the corresponding registers 100 by generating an information signal, an address signal, and a write signal in an updating manner.

The communication control circuit 63 waits for the transmission of the information signal to end, and then
- Send the information signal read from the numerical information register 100 to the controlled device via the input/output interface 62. The input/output interface 62 performs level conversion of the information signal. It should be noted that an input/output interface 62 that converts the signal into another signal transmission method and outputs the signal is also known. The message signals transmitted between the processor module mark and the message module mark include multiple messages such as a reception confirmation signal, a signal to check whether there is an abnormality in the data and signal line, and a transmission end instruction signal. signals are used. The content of these message signals is expressed by using a specific pictocode, so that they can be distinguished from other control signals and general information signals that share the control data register 101.

[Invention tries to solve! 4! [Problem] However, in the conventional communication method of this type of 10-gram pull controller, multiple message signals and other control signals are transferred using a data bus, so two types of control are required to identify the type of information. It is not possible to use the same code for signals. As a result, there was a problem in that the more Class A message signals were provided, the more the number of other signals had to be reduced.

In order to solve this problem, a communication method has been proposed in which the superstition order of the message signals is fixed and the message signals are indicated by placing the message signals vertically. However, with this communication method, it is not possible to change the transmission order of message signals or to transmit only message signals. As a result, this communication method has the disadvantage that, for example, when it is desired to check for an abnormality in a signal line, meaningless information signals must also be created at the same time, which increases the transmission processing time.

In view of the above-mentioned points, an object of the present invention is to enable message signals and other control signals to be transmitted using the same code,
Another object of the present invention is to provide a method for borrowing a programmable controller that can transmit data at any timing.

[Means to solve the problem]

In order to achieve such an object, the present invention provides a communication method for a 7゛ programmable controller in which general information No. 1g is received by exchanging messages between the programmable controller main body and its peripheral devices. The peripheral device is provided with a first storage means for general information signals and a second storage means for message signals used only for message exchange, and the programmable controller main body stores the first storage means and the second storage means as addresses. The peripheral device reads and identifies the message exchange code stored in the second storage means, and reads out or writes a corresponding signal into the selected storage means, and reads out and identifies the message exchange code stored in the second storage means, and reads out and identifies the message exchange code stored in the second storage means. The method is characterized in that a response signal corresponding to the signal is written into the second storage means.

Furthermore, the second storage means of the present invention includes a reception storage section that receives and stores the message signal from the programmable controller main body, and a transmission storage section that stores a response signal that is sent as a response to the 10-gram programmable controller main body. The programmable controller main body is characterized in that after writing a message signal in the reception storage section, the programmable controller main body reads out a response signal from the reception storage section.

[In the invention, storage means for transmitting and receiving message No. 16 are provided at different speeds; therefore, even if the same code is used for the message signal and the contributing information signal, the storage means for storing the information are different. This θ), surrounding area!・On the single device side, there is no need to distinguish between the important information signal and the message signal,
In addition, since the 10-gram pull controller main body side can communicate the mensage signal and the signal for general 1## information separately, the mensage signal can be transmitted at desired timing.

Furthermore, by dividing the second storage means into a communication storage section and a reception storage section, it is possible to use the same code for message signals and to give different meanings to the transmission message signal and the response (message) signal. .

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

When communicating between the processor module and the message module of this embodiment, it is possible to use the device 'uc or a circuit configuration substantially similar to that shown in FIG. 4 and Section 5. Q) Please explain about the following points.

The broom 1 diagram shows the address structure of the input/output interface 61.

In FIG. 1, addresses If □ II to 11311 are allocated to a plurality of registers of the input/output interface 61, and addresses If OIf to I+ 2
5 'l is for general information signal, address I' 26 II
~l' 2911 is divided for control signals.

The address is the specific control signal to be sent from the message module to the fluorochrome module.

This ν11 is an area for storing communication message signals.

The address portion is a specific control signal received from the 70 septsmodules, which in this example is a communication message signal.

Address group is an area for storing other control signals to be transmitted, and address 4 is an area for storing other control signals to be received.

Next, the processor module 504 in the embodiment of the present invention
The communication procedure for transmission from the message module will be explained using FIG. 2 and Section 3.

2 and 3 show the types of message signals and their code formats according to the embodiment of the present invention.

The CPU 51 of the module specifies the reception specific control data register 42 (address l+2711) of the message module barrier, and sends the message signal 1'11000000'' (refer to the second section of the pictocode i) indicating the start of communication. Write.

Communication ff1lJ control circuit 63 of message module 52
Then, in response to this write, the transmission specific control register 4
1, a response message signal "11110000" (see FIG. 3 for the bit code) is written indicating that reception is possible and that there is no abnormality in the signal line or data.

After a certain period of time, the processor module CPU 51 reads out the response message from the transmission specific control register 41. After confirming that the message module mark can be received, the CPU 51 sequentially writes contact signals to addresses II□II to 112511 of the general data register group 40. When the contact signal has been inserted,
The CPU 51 writes a message signal indicating the end of communication into the reception specific data control data register 42. The communication control circuit 63 of the message 7 gel ω separates the received contents in accordance with this reception, and then inputs the response message signal into the transmission specific control register 41 and ends the reception process. Also, in response to this response signal, the CPU 51 side of the 10th module frame also ends the transmission process.

In addition, transmission control data other than the above-mentioned message signals,
Conventionally, the registers 42 and 44 are used to transmit and receive reception control data and information signals without designated addresses.

As described above, in this embodiment, registers 41 and 42 for storing message signals exclusively are provided separately, and general data signals and message signals are identified by specifying the storage position of the information signal. Therefore, there is no problem even if the same bit code is used for general data signals and message signals.

Furthermore, in this embodiment, a register 41 for receiving (M) message signals and a register 42 for transmitting (response) message signals are used.
Since these are provided separately, even if the same bit code is used for sending and receiving in a message signal, it can have different meanings.

Sarani, message module 6Ll side communication 1〃1j
The control circuit 63 only needs to monitor the writing of signals to the reception registers 42 and 44, and there is no need to perform the till processing of the reception signal as in the conventional example, so the reception processing time is shortened. . In addition, Frosesamogi Island - Le 5 (
l IJ allows message signals to be sent at any timing.

Although the present embodiment has shown an example in which the input/output interface 61 of the message module ω is composed of registers, it is also a random access memory (RaM).

A latch circuit may be used, and a desired storage element may be used depending on the bit configuration of data to be transmitted and received.

Furthermore, in this embodiment, the register for storing message signals is divided into two registers: one for superstition and one for reception.

When m and %ll of the sage signal are small, you can use one register to perform quick reception (J). In this case, it is not possible to use the same pictocode for sending and receiving with different meanings. It disappears.

Furthermore, in this practical example, a message module that inputs and outputs information is used as an example of a peripheral device, but a device that performs message communication, such as programming 4felil.
Needless to say, the present invention can be applied to equipment to be controlled by a programmable controller or a programmable controller.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to transmit A-type signals using a code, and there are no restrictions on the timing of transmitting these signals, so that messages can be exchanged and It is possible to reduce the number of signal lines required for transmitting information signals, and since the message signal and the general information signal are stored in the first storage means and the second storage means, respectively, the peripheral equipment side can easily transmit the signal. There is no need to identify the type, and the effect is that the reception processing time is shortened.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram showing the address structure in the input/output interface of the message module according to the embodiment of the present invention;
FIG. 2 shows 70 cells of the embodiment of the present invention. FIG. 3 is an explanatory diagram showing the format of the message sent by the Samoji module in the embodiment of the present invention. FIG. 4 is a block diagram showing the connection configuration of the conventional example. 5 are block diagrams showing the circuit configuration of a conventional input/output interface 61. As shown in FIG. Processor module: Processor module, 51: CPU. 54.61: Input/output interface, 63 = communication control circuit, 100 general information register, 101: control data register. Part (2) 7 bytes (ε bi, 7 to) Atsushi 2 Figure name 4

Claims (1)

[Claims] 1) A communication method for a programmable controller that transmits and receives general information signals by exchanging messages between a programmable controller main body and its peripheral devices, wherein the peripheral device includes a first storage means for general information signals and the message exchange. a second storage means for a message signal used only for a message signal, and the programmable controller main body selects the first storage means and the second storage means by addressing, and stores a message signal corresponding to the selected storage means. read or write;
Communication for a programmable controller, wherein the peripheral device reads and identifies a message signal stored in the second storage means, and writes a response signal corresponding to the identified message signal into the second storage means. Method.