JPH03126239A - Bump structure and film carrier body having bump structure - Google Patents

Bump structure and film carrier body having bump structure

Info

Publication number
JPH03126239A
JPH03126239A JP26599789A JP26599789A JPH03126239A JP H03126239 A JPH03126239 A JP H03126239A JP 26599789 A JP26599789 A JP 26599789A JP 26599789 A JP26599789 A JP 26599789A JP H03126239 A JPH03126239 A JP H03126239A
Authority
JP
Japan
Prior art keywords
lead
holes
film carrier
hole
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26599789A
Other languages
Japanese (ja)
Inventor
Hidekatsu Sekine
秀克 関根
Sotaro Toki
土岐 荘太郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toppan Inc
Original Assignee
Toppan Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toppan Printing Co Ltd filed Critical Toppan Printing Co Ltd
Priority to JP26599789A priority Critical patent/JPH03126239A/en
Publication of JPH03126239A publication Critical patent/JPH03126239A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To make it possible to perform the electric test for a semiconductor element by providing lead cutting holes at the outside of the character holes of an insulating film having device holes, the character holes and sprocket boles, and providing bumps which are guided by way of through holes in both surfaces of the insulating film. CONSTITUTION:In an insulating film 1, lead cutting holes 2, lead supporting bodies 3, sprocket holes 4 and the like are provided. Bumps 6 are provided by way of through holes in both surfaces of the insulating film 1. Thus, a semiconductor element 8 and a film carrier 7 comprising a conductor layer can be readily connected. The continued bodies of the bumps, the semiconductor element 8 and the film carrier 7 comprising the conductor layer are connected, and a lead-tip part 7a of the film carrier 7 is cut with the lead cutting hole 2. Thus the electric test of the semiconductor element can be performed.

Description

【発明の詳細な説明】 〈産業上の利用分野〉 本発明は、IC,LSI等の集積回路チップの実装に用
いられるフィルムキャリヤおよびそれに付属するバンプ
構造体に関するものである。
DETAILED DESCRIPTION OF THE INVENTION <Field of Industrial Application> The present invention relates to a film carrier used for mounting integrated circuit chips such as ICs and LSIs, and a bump structure attached thereto.

〈従来の技術〉 従来のバンプ23は、第3図Aに示すように、半導体素
子8上のパッド24上に設けられる。また、一枚の金属
導体層からなる従来のフィルムキャリヤ25は、第3図
Bに示すように、全てのリード配線電極が導通している
状態のフィルムキャリヤ25であった。
<Prior Art> A conventional bump 23 is provided on a pad 24 on a semiconductor element 8, as shown in FIG. 3A. Furthermore, the conventional film carrier 25 made of a single metal conductor layer was one in which all lead wiring electrodes were electrically connected, as shown in FIG. 3B.

〈発明が解決しようとする課題〉 第3図Aに示したような、バンプ23が半導体素子8上
のパッド24に設けられたバンプ付半導体素子は、バン
プ23の形成に多くの工程がかかる事、また、ユーザー
側がバンプ付半導体素子を入手することが困難である事
、また、バンプ付半導体素子は、既にバンプ23が半導
体素子8のパッド24上にあるために、半導体素子8の
接続方法に自由度がなかった。さらに、従来の一枚の金
属導体層からなるフィルムキャリヤ25は、全てのリー
ド配線電極が導通しているために、半導体素子8上のバ
ンド24に設けられたバンプ23との接続後、半導体素
子8の電気特性テストが不可能である事、また、従来の
導体層から成るフィルムキャリヤ25の製造工程及び後
工程においてリード先端の曲がりやねじれの問題がある
事などの課題があった。
<Problems to be Solved by the Invention> In the bumped semiconductor element in which the bumps 23 are provided on the pads 24 on the semiconductor element 8 as shown in FIG. 3A, the formation of the bumps 23 requires many steps. In addition, it is difficult for the user to obtain a semiconductor element with bumps, and since the bumps 23 are already on the pads 24 of the semiconductor element 8, it is difficult to connect the semiconductor element 8. There was no freedom. Furthermore, since all the lead wiring electrodes of the conventional film carrier 25 made of a single metal conductor layer are electrically connected, the semiconductor element 8 is connected to the bumps 23 provided on the band 24 on the semiconductor element 8. In addition, there were problems such as the fact that it was impossible to test the electrical characteristics of the film carrier 25 made of the conventional conductor layer, and that there was a problem of bending or twisting of the lead tips in the manufacturing process and post-process of the film carrier 25 made of the conventional conductor layer.

〈課題を解決するための手段〉 すなわち、本発明は、デバイスホール、キャラクタ−ホ
ールおよびスプロケットホールを有する絶縁フィルムの
該キャラクタ−ホールの外側に、リード切断用ホールを
設け、さらに、該絶縁フィルムの両面にスルーホール内
を導通するバンプを設けたことを特徴とするバンプ構造
体である。
<Means for Solving the Problem> That is, the present invention provides a lead cutting hole on the outside of the character hole of an insulating film having a device hole, a character hole, and a sprocket hole, and further provides a hole for cutting a lead in the insulating film. This is a bump structure characterized by providing bumps on both sides that conduct through the through holes.

必要に応じて、本発明は、前記キャラクタ−ホールの外
側に、リード切断用ホールに加えて、リド支持体を設け
てリード先端部分の固定を期しても良い。
If necessary, in the present invention, in addition to the lead cutting hole, a lead support may be provided outside the character hole to secure the lead end portion.

当然のことながら、本発明は、前記したバンプ構造体と
、一枚の金属導体層からなるフィルムキャリヤとを接続
したことを特徴とするフィルムキャリヤ体も含まれる。
Naturally, the present invention also includes a film carrier body characterized in that the bump structure described above is connected to a film carrier made of a single metal conductor layer.

本発明は、上記の課題を克服すべく、第1図A〜已に示
す様に、絶縁フィルム1にリード切断用ホール2、リー
ド支持体3及びスプロケットホール等を設け、さらに、
該絶縁フィルム1の両面にスルーホール5を介してバン
プ6を設ける事により半導体素子8と導体層から成るフ
ィルムキャリヤ7とを容易に接続できるバンプ連続体(
第1図A参照)を提供し、また、該バンプ連続体(第1
図A参照)、半導体素子8及び導体層から成るフィルム
キャリヤ7を接続し、リード切断用ホル2にてフィルム
キャリア7のリード先端部分7aを切断する事で(第1
図E参照)、半導体素子の電気テストを可能にするフィ
ルムキャリヤ体(第1図り参照)を提供するものである
In order to overcome the above problems, the present invention provides an insulating film 1 with a lead cutting hole 2, a lead support 3, a sprocket hole, etc., as shown in FIGS.
By providing bumps 6 on both sides of the insulating film 1 via through holes 5, a continuous bump body (
(see FIG. 1A), and the bump series (see FIG. 1A).
(see Figure A), by connecting the semiconductor element 8 and the film carrier 7 consisting of the conductor layer, and cutting the lead tip portion 7a of the film carrier 7 with the lead cutting hole 2 (see Figure A).
(see Figure E) provides a film carrier body (see Figure 1) which allows electrical testing of semiconductor components.

尚、第1図Hに示すように、リード先端を全てつないだ
形で導体層から成るフィルムキャリヤ7を製造し、本発
明のバンプ構造体との接続後に、リード先端を切断する
事によりリード曲がりの問題を解決する事も可能である
。また、本発明のフィルムキャリア体において第1図F
−Gに示すように、バンプ6及びリード支持体3と接続
するフィルムキャリヤ7の接合部にあらかじめ溝9を設
け、接続時に絶縁フィルム1表面とフィルムキャリヤ7
とが接触する構造にしても良い。
As shown in FIG. 1H, a film carrier 7 made of a conductive layer is manufactured with all the lead tips connected, and after connection with the bump structure of the present invention, the lead tips are cut to prevent lead bending. It is also possible to solve the problem. Further, in the film carrier body of the present invention, FIG.
- As shown in G, a groove 9 is provided in advance at the joint part of the film carrier 7 that connects the bump 6 and the lead support 3, so that the surface of the insulating film 1 and the film carrier 7 are connected at the time of connection.
The structure may be such that they are in contact with each other.

〈製造例〉 第2図A−3に本発明の製法例を示す、第1図Bに示す
プロケラトホール4がパンチングにより形成された厚さ
20μmポリイミドフィルム11の全面に、シップレイ
P−T−Hプロセス(米国シンプレイ社製めっき仕1I
l)を用い無電解銅めっき法により1μmの銅層12を
形成した(第2図B参照)。次に銅層12表面へフォト
レジスト13をコーティングし、露光し、現像を行いバ
ンプ6、リド切断用ホール2、デバイスホール14及び
キャラクタ−ホール15となる部分の銅層12を露出さ
せた(第2図り参照)。次にスプレィエツチングにより
銅12をエツチングし、バンプ6、リード切断用ホール
2、デバイスホール14及びキャラクタ−ホール15と
なる部分のポリイミドフィルム表面を露出させた(第2
図E参照)。ここで、銅層12のエツチング液として常
温の665.g//!塩化第二鉄化第用鉄液。
<Manufacturing Example> An example of the manufacturing method of the present invention is shown in FIG. 2A-3.Shiplay P-T- H process (manufactured by Shinprey, USA, plating finish 1I)
A copper layer 12 having a thickness of 1 μm was formed by electroless copper plating using 1) (see FIG. 2B). Next, a photoresist 13 was coated on the surface of the copper layer 12, exposed to light, and developed to expose portions of the copper layer 12 that will become the bumps 6, the lid cutting holes 2, the device holes 14, and the character holes 15. (See diagram 2). Next, the copper 12 was etched by spray etching to expose the surface of the polyimide film in the portions that would become the bumps 6, lead cutting holes 2, device holes 14, and character holes 15 (second
(See Figure E). Here, as an etching solution for the copper layer 12, 665. g//! Ferric chloride liquid.

次に、フォトレジスト13を剥離しく第2図F参照)、
ポリイミドフィルム上に残った銅12をマスクとし、両
面からスプレィエツチングを行い、バンプ6、リード切
断用ホール2、デバイスホール14及びキャラクタ−ホ
ール15となる部分のスルホールを形成した(第2図G
参照)。ここで、エツチング液にはヒドラジンとエチレ
ンジアミンが1対1の液を用いた。
Next, remove the photoresist 13 (see FIG. 2F),
Using the copper 12 remaining on the polyimide film as a mask, spray etching was performed from both sides to form through-holes that will become the bumps 6, lead cutting holes 2, device holes 14, and character holes 15 (Fig. 2G).
reference). Here, the etching solution used was a solution containing hydrazine and ethylenediamine in a ratio of 1:1.

次に、シップレイP−T−Hプロセス(米国シップレイ
社製めっき仕様)を用い無電解銅めっき法により1μm
の銅膜16を形成しく第2図M参照)、銅膜16表面へ
フォトレジスト17をコーティングしく第2図M参照)
、露光し、現像を行いバンプ6及びリード支持体3とな
る部分の銅膜16を露出させた(第2図M参照)。
Next, electroless copper plating was performed using the Shipley P-T-H process (plating specifications manufactured by Shipley, Inc. in the United States) to a thickness of 1 μm.
(See Figure 2 M) and coat the surface of the copper film 16 with a photoresist 17 (See Figure 2 M).
The copper film 16 was exposed to light and developed to expose the portions of the copper film 16 that will become the bumps 6 and the lead support 3 (see FIG. 2M).

次に、カパラシドHL(日本シェーリング■製めっき仕
様)を用い、浴温20〜25°C,電流密度1〜2A/
drd、浴電圧1〜6■の条件で銅をポリイミドフィル
ム11表面から高さ32μmになるまで電解銅めっきを
行い(第2図に参照)、次いでフォトレジスト17を剥
離しく第2図し参照)、そのまま銅を2μmμmデスプ
レーエツチングポリイミドフィルム11表面を露出させ
、バンプ6及びリード支持体3だけを残した(第2図M
参照)。ここで、エツチング液として、液温40°C,
665g/i塩化第二鉄を用いた。
Next, using Kaparaside HL (plating specifications manufactured by Nippon Schering ■), the bath temperature was 20 to 25°C, the current density was 1 to 2 A/
Electrolytic copper plating is performed under the conditions of drd and bath voltage of 1 to 6 μm to a height of 32 μm from the surface of the polyimide film 11 (see Figure 2), and then the photoresist 17 is peeled off (see Figure 2). Then, the surface of the polyimide film 11 was exposed by etching the copper to 2 μm μm, leaving only the bumps 6 and the lead support 3 (see Fig. 2M).
reference). Here, as an etching liquid, the liquid temperature is 40°C,
665 g/i ferric chloride was used.

次に、ELGB511 (西独デグサ社製めっき仕様)
を用い、pH5,0〜533、浴温90±2 ’Cの条
件で無電解めっき法により金層18を0.5μmバンプ
6及びリード支持体3に設ける事によりバンプ連続体(
第2図N参照)を作製した。
Next, ELGB511 (plated specification manufactured by Degussa, West Germany)
A bump continuum (
(See Figure 2 N) was prepared.

次に、第2回0に示すように、スプロケットホール4を
存する厚さ70μmの銅のみから成るフィルムキャリヤ
19と上記バンプ連続体とを各々のスプロケットホール
4にて位置合わせを行い、加熱350 ”C〜450°
C1圧カフ0g/lリード程度、の条件でパルスヒート
ボンディングを行った。
Next, as shown in the second time 0, the film carrier 19 made only of copper and having a thickness of 70 μm and having sprocket holes 4 is aligned with the bump continuum at each sprocket hole 4, and heated 350 '' C~450°
Pulse heat bonding was performed under the conditions of a C1 pressure cuff of approximately 0 g/l lead.

次に、第2図M参照に示すように、リード切断機21に
てリード切断用ホール2部でリード22を切断する事に
より半導体素子8とのボンディング後の電気テストが可
能なフィルムキャリヤ(第2図S参照)を作製した。
Next, as shown in FIG. 2M, the leads 22 are cut using the lead cutting machine 21 at the second part of the lead cutting hole. 2 (see Figure S) was prepared.

なお、リードの切断は半導体素子とのボンディング後に
行ってもよい。
Note that the leads may be cut after bonding with the semiconductor element.

〈発明の効果〉 上記したように、絶縁フィルム1にリード切断用ホール
2、さらに、ti HA縁フィルムlの両面にスルーホ
ール5を介してバンプ6を設ける事により、半導体素子
8と導体層から成るフィルムキャリヤ7とを容易に接続
できるバンプ連続体を提供し、また、該バンプ連続体、
半導体素子8及び導体層から成るフィルムキャリヤ7を
接続し、リード切断用ホール2にてリード10を切断す
る事で半導体素子8の電気テストを可能にし、また、必
要に応じてリード支持体3を設ければ、第1図Hに示す
ように、リード先端を全てつないだ形で導体層から成る
フィルムキャリヤ7を製造し、該バンプ連続体との接続
後に、リード先端を切断する事によりリード曲がりの問
題を解決する事も可能であるフィルムキャリヤを提供す
るものである。
<Effects of the Invention> As described above, by providing the lead cutting holes 2 in the insulating film 1 and the bumps 6 through the through holes 5 on both sides of the TIHA edge film l, it is possible to separate the semiconductor element 8 from the conductor layer. To provide a bump continuum that can be easily connected to a film carrier 7 consisting of the bump continuum,
By connecting the semiconductor element 8 and the film carrier 7 consisting of a conductive layer and cutting the leads 10 through the lead cutting hole 2, the semiconductor element 8 can be electrically tested. If provided, as shown in FIG. 1H, a film carrier 7 made of a conductor layer is manufactured with all the lead tips connected, and the lead tips are cut after being connected to the bump continuum to prevent lead bending. The purpose of the present invention is to provide a film carrier that can also solve the above problems.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図Aは、本発明のバンプ連続体の一実施例の断面図
、第1図Bは、本発明のバンプ連続体の一実施例の平面
図、第1図Cは、導体層から成るフィルムキャリヤと本
発明のバンプ連続体との接続後の様子を示す説明図であ
る。 第1図りば、第1図Cのフィルムキャリヤのリードをリ
ード切断用ホールにて切断したところを示す断面図、第
1図Eは、本発明のフィルムキャリヤに半導体素子を接
続した様子を示す説明図である。 第1図Fおよび第1図Gは、本発明のフィルムキャリア
において、バンプ及びリード支持体を接続するリード接
続部にあらかじめ溝を設け、接続時に絶縁フィルム表面
とリードとが接触する構造にしたところを示す説明図で
ある。 第1図■(は、リード先端を全てつないだ形の導体層か
ら成るフィルムキャリヤを示す説明図である。 第2図M参照は、本発明のバンプ構造体の製造例を工程
順に示す説明図である。 第3図Aは、従来のバンプの一例の断面図、第3図Bは
、従来のフィルムキャリヤの一例を示す平面図である。 l・・・絶縁フィルム 2・・・リード切断用ホール 3・・・リード支持体 4・・・スプロケットホール 5・・・スルーホール 6・・・バンプ 7・・・フィルムキャリヤ 8・・・半導体素子 9・・・リード接続部 10・・・リード 11・・・ポリイミドフィルム 12・・・銅層 13・・・フォトレジスト 14・・・デバイスホール 15・・・キャラクタ−ホール 16・・・銅膜 17・・・フォトレジスト 18・・・金層 19・・・フィルムキャリヤ 20・・・ポンディングツール 21・・・リード切断機 22・・・リード 23・・・バンプ 24・・・パッド 25・・・フィルムキャリヤ 第 図 第 2 図 第 図 第 図 第 図 ロコ
FIG. 1A is a sectional view of an embodiment of the bump series of the present invention, FIG. 1B is a plan view of an embodiment of the bump series of the present invention, and FIG. 1C is a conductor layer. FIG. 3 is an explanatory diagram showing the state after the film carrier and the bump continuous body of the present invention are connected. Fig. 1 is a sectional view showing the lead of the film carrier of Fig. 1C cut through a lead cutting hole, and Fig. 1E is an explanation showing how a semiconductor element is connected to the film carrier of the present invention. It is a diagram. Figures 1F and 1G show the film carrier of the present invention in which a groove is provided in advance in the lead connection part that connects the bump and the lead support, so that the surface of the insulating film and the lead come into contact during connection. FIG. FIG. 1 (■) is an explanatory diagram showing a film carrier consisting of a conductor layer in which all lead tips are connected. FIG. 2 M is an explanatory diagram showing an example of manufacturing the bump structure of the present invention in order of process. FIG. 3A is a cross-sectional view of an example of a conventional bump, and FIG. 3B is a plan view of an example of a conventional film carrier. l... Insulating film 2... For cutting leads Hole 3...Lead support 4...Sprocket hole 5...Through hole 6...Bump 7...Film carrier 8...Semiconductor element 9...Lead connection part 10...Lead 11 ... Polyimide film 12 ... Copper layer 13 ... Photoresist 14 ... Device hole 15 ... Character hole 16 ... Copper film 17 ... Photoresist 18 ... Gold layer 19 ... ...Film carrier 20...Ponding tool 21...Lead cutting machine 22...Lead 23...Bump 24...Pad 25...Film carrier Fig. 2 Fig. Fig. Fig. Fig. Loco

Claims (4)

【特許請求の範囲】[Claims] (1)デバイスホール、キャラクタ−ホールおよびスプ
ロケットホールを有する絶縁フィルムの該キャラクタ−
ホールの外側に、リード切断用ホールを設け、さらに、
該絶縁フィルムの両面にスルーホール内を導通するバン
プを設けたことを特徴とするバンプ構造体。
(1) Character of insulating film having device hole, character hole and sprocket hole
A lead cutting hole is provided outside the hole, and
A bump structure characterized in that bumps are provided on both sides of the insulating film to conduct electricity through the through holes.
(2)デバイスホール、キャラクタ−ホールおよびスプ
ロケットホールを有する絶縁フィルムの該キャラクタ−
ホールの外側に、リード切断用ホールを設け、かつリー
ド支持体を設け、さらに、該絶縁フィルムの両面にスル
ーホール内を導通するバンプを設けたことを特徴とする
バンプ構造体。
(2) Character of insulating film having device hole, character hole and sprocket hole
A bump structure characterized in that a lead cutting hole is provided outside the hole, a lead support is provided, and bumps are provided on both sides of the insulating film to provide conduction within the through hole.
(3)請求項(1)記載のバンプ構造体と、一枚の金属
導体層からなるフィルムキャリヤとを接続したことを特
徴とするフィルムキャリヤ体。
(3) A film carrier body, characterized in that the bump structure according to claim (1) and a film carrier made of a single metal conductor layer are connected.
(4)請求項(2)記載のバンプ構造体と、一枚の金属
導体層から成るフィルムキャリヤとを接続したことを特
徴とするフィルムキャリヤ体。
(4) A film carrier body, characterized in that the bump structure according to claim (2) is connected to a film carrier made of a single metal conductor layer.
JP26599789A 1989-10-12 1989-10-12 Bump structure and film carrier body having bump structure Pending JPH03126239A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26599789A JPH03126239A (en) 1989-10-12 1989-10-12 Bump structure and film carrier body having bump structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26599789A JPH03126239A (en) 1989-10-12 1989-10-12 Bump structure and film carrier body having bump structure

Publications (1)

Publication Number Publication Date
JPH03126239A true JPH03126239A (en) 1991-05-29

Family

ID=17424934

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26599789A Pending JPH03126239A (en) 1989-10-12 1989-10-12 Bump structure and film carrier body having bump structure

Country Status (1)

Country Link
JP (1) JPH03126239A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0831869A (en) * 1994-05-09 1996-02-02 Nec Corp Semiconductor device, manufacture thereof and mounting inspection method therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0831869A (en) * 1994-05-09 1996-02-02 Nec Corp Semiconductor device, manufacture thereof and mounting inspection method therefor

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