JPH01145827A - Film carrier - Google Patents

Film carrier

Info

Publication number
JPH01145827A
JPH01145827A JP30548387A JP30548387A JPH01145827A JP H01145827 A JPH01145827 A JP H01145827A JP 30548387 A JP30548387 A JP 30548387A JP 30548387 A JP30548387 A JP 30548387A JP H01145827 A JPH01145827 A JP H01145827A
Authority
JP
Japan
Prior art keywords
bump
film carrier
terminal
lead terminal
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30548387A
Other languages
Japanese (ja)
Inventor
Hidekatsu Sekine
秀克 関根
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toppan Inc
Original Assignee
Toppan Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toppan Printing Co Ltd filed Critical Toppan Printing Co Ltd
Priority to JP30548387A priority Critical patent/JPH01145827A/en
Publication of JPH01145827A publication Critical patent/JPH01145827A/en
Pending legal-status Critical Current

Links

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To provide strong adhering strength of a bump to a lead terminal and to reduce the collapse of the bump by the strong adhering strength by providing at least one groove or through hole to the bump adhering section of the terminal. CONSTITUTION:The interior of a device hole 1 is protected by a lining agent 10, a copper foil wiring pattern 11 is formed by twice etchings, photoresists 12, 13 and the agent 10 are exfoliated, and a lead terminal 14 formed with a groove 9 is obtained. A film carrier formed with the terminal 14 is dipped in an Su plating solution, an Sn film is formed on the copper foil by an electroless plating method, and a bonding test is conducted. As a result, the carrier having stronger adhering strength of a bump to the terminal twice as large as that of a conventional film carrier is obtained. Thus, the groove or through hole is formed at the bump adhering section of the terminal, thereby obtaining the strong adhering strength of the bump to the terminal, and the bump and the collapse of the bump can be reduced in its structure.

Description

【発明の詳細な説明】 〈産業上の利用分野〉 本発明は、IC,LSI等の集積回路チップの実装に用
いられるフィルムキャリヤに関するものである。
DETAILED DESCRIPTION OF THE INVENTION <Field of Industrial Application> The present invention relates to a film carrier used for mounting integrated circuit chips such as ICs and LSIs.

<従来のフィルムキャリヤ〉 従来のフィルムキャリヤは、第3図(a)に示すように
、絶縁フィルム19上に、直接または接着層3を介して
設けられた導電層よりなる。該フィルムキャリヤは、そ
のリード端子14のバンプ接合部20が、平坦なフィル
ムキャリヤと、第3図(b)に示す様に、その平坦なバ
ンブ接合部20に、バンプ21が、接合されたバンプ付
フィルムキャリヤとがある。
<Conventional Film Carrier> A conventional film carrier consists of a conductive layer provided on an insulating film 19 directly or via an adhesive layer 3, as shown in FIG. 3(a). The film carrier has a flat film carrier in which the bump joint portion 20 of the lead terminal 14 is bonded to a flat film carrier, and a bump 21 in which the bump joint portion 20 of the lead terminal 14 is bonded to the flat film carrier, as shown in FIG. 3(b). Comes with a film carrier.

〈発明が解決しようとする問題点〉 上記したような従来のフィルムキャリヤでは、半導体素
子のパッド上にバンプがある場合のリード端子とバンプ
との接合の際、またはリード端子にバンプを形成する場
合のリード端子とバンプとの接合の際に、接着不良とい
った問題が起こり、この問題は、ピン数が増加するにつ
れて、より大きな問題となっていた。
<Problems to be Solved by the Invention> In the conventional film carrier as described above, when a lead terminal and a bump are bonded to each other when there is a bump on a pad of a semiconductor element, or when a bump is formed on a lead terminal, Problems such as poor adhesion occur when bonding lead terminals and bumps, and this problem becomes more serious as the number of pins increases.

また、従来のフィルムキャリヤのいずれも、バンプ、リ
ード端子及び、半導体素子パッド部との接合や電気特性
等の関係から、バンプのつぶれが大きくなり、多ピンの
場合には、バンプのつぶれによる、リードどうしの接触
などの問題から、不都合なものとなっていた。
In addition, in all conventional film carriers, due to the relationship between bumps, lead terminals, and semiconductor element pads, electrical characteristics, etc., bump collapse becomes large, and in the case of a large number of pins, bump collapse causes This was inconvenient due to problems such as contact between leads.

〈問題を解決するための手段〉 本発明は、上記の欠点を改良すべく、リード端子のバン
ブ接合部に、少なくともひとつの溝または貫通孔を設け
ることにより、バンプとリード端子との強い接着力をも
たせ、それによってバンプのつぶれを、小さくすること
ができるフィルムキャリヤを、堤供するものである。
<Means for Solving the Problems> In order to improve the above-mentioned drawbacks, the present invention provides a strong adhesive force between the bump and the lead terminal by providing at least one groove or through hole in the bump joint portion of the lead terminal. The purpose of the present invention is to provide a film carrier that can reduce bump collapse.

第2図(A)〜(F)に溝17.第2図(G)〜(1(
)に貫通孔18の代表的な形状例を示す。第2図(A)
〜(H)の上図は、リード端子15の側面図、下図は、
リード端子を先端方向16から見た図を示す。また、第
4図(a)〜(d)に、本発明のフィルムキャリヤの例
を示す。第4図(a)は、リード端子14に溝17を設
けたフィルムキャリヤ、第4図(b)は、第4図(a)
のフィルムキャリヤにバンプ21を形成したフィルムキ
ャリヤ、第4図(C)は、リード端子14に貫通孔18
を設けたフィルムキャリヤ、第4図(山は、第4図(C
)のフィルムキャリヤにバンプ21を形成したフィルム
キャリヤである。
Grooves 17. Figure 2 (G) ~ (1 (
) shows a typical example of the shape of the through hole 18. Figure 2 (A)
The upper figure of ~(H) is a side view of the lead terminal 15, and the lower figure is
The figure which looked at the lead terminal from the front-end|tip direction 16 is shown. Further, examples of the film carrier of the present invention are shown in FIGS. 4(a) to 4(d). FIG. 4(a) shows a film carrier with grooves 17 provided in the lead terminals 14, and FIG. 4(b) shows the film carrier shown in FIG. 4(a).
A film carrier in which bumps 21 are formed on the film carrier shown in FIG.
Figure 4 (the crests are Figure 4 (C)
This is a film carrier in which bumps 21 are formed on the film carrier of ).

〈作用〉 前述したように、フィルムキャリヤリード端子のバンプ
接合部に溝17又は貫通孔18を設けることにより、従
来のフィルムキャリヤと比較して、リード端子のバンプ
接合面において、リード端子14とバンプ21の接触面
積が大きくなり、また第2図(H)の貫通孔18のよう
な場合には、投錨効果にもなり、強い接着力をもたせる
ことができる。こうすることによって、リード端子14
とバンプ21とが、十分に接触しているので、バンプ2
1を小さくし、ボンディング時のバンプ21のつぶれに
よるリード端子14からのはみだしを少なくでき、多ピ
ン化に適している。
<Function> As described above, by providing the groove 17 or the through hole 18 in the bump joint part of the film carrier lead terminal, the lead terminal 14 and the bump can be connected to each other at the bump joint surface of the lead terminal, compared to the conventional film carrier. The contact area of 21 becomes large, and in the case of the through hole 18 in FIG. 2(H), it also has an anchoring effect and can provide strong adhesive force. By doing this, the lead terminal 14
Since the bump 21 and the bump 21 are in sufficient contact with each other, the bump 2
1 can be made small, and the protrusion from the lead terminal 14 due to the crushing of the bump 21 during bonding can be reduced, making it suitable for increasing the number of pins.

〈実施例〉 第1図(A)〜(G)に本発明の実施例を示す。<Example> Embodiments of the present invention are shown in FIGS. 1(A) to 1(G).

デバイス孔lが形成された125μm程度のポリイミド
フィルム2上に、接着層3を介して35μm銅箔4が設
けられた基板を用いた。まず、銅箔4表面にフォトレジ
スト5.6を設け、露光し、フォトレジスト5に配線パ
ターン7、フォトレジスト6にリード端子幅のA程度の
バンプ形成用部8を形成した後、リード端子厚の1/3
程度の満9をスプレーエツチングにより形成した。ここ
で、エツチング液として、液温40℃、665g/j!
塩化第二鉄を用いた。
A substrate was used in which a 35 μm copper foil 4 was provided with an adhesive layer 3 interposed on a polyimide film 2 of about 125 μm in which device holes 1 were formed. First, a photoresist 5.6 is provided on the surface of the copper foil 4 and exposed to light. After forming a wiring pattern 7 on the photoresist 5 and a bump forming portion 8 having a lead terminal width of about A on the photoresist 6, the lead terminal thickness is 1/3 of
It was formed by spray etching. Here, as an etching liquid, the liquid temperature is 40°C and 665 g/j!
Ferric chloride was used.

この場合の溝の形状は、要求されるバンプ形状に適した
形状にする方がよい。
In this case, the shape of the groove is preferably a shape suitable for the required bump shape.

次に、第1図(E)のごとく、デバイス孔l内部を裏止
め剤10で保護し、二度目のエツチングにより、銅箔配
線パターン11を形成した後、フォトレジスト12・1
3及び、裏止め剤10を剥離し、第1図(G)の様に、
溝9が設けられたリード端子14が得られた。
Next, as shown in FIG. 1(E), the inside of the device hole l is protected with a backing agent 10, and a second etching is performed to form a copper foil wiring pattern 11.
3 and peel off the backing agent 10, as shown in Figure 1 (G).
A lead terminal 14 provided with a groove 9 was obtained.

次に、Snメツキ液にリード端子14を形成したフィル
ムキャリヤムを浸漬し、無電解メツキ法により0.3〜
0゜5μmのSn膜を銅箔表面に形成し、ボンディング
テストを行った。その結果、従来のフィルムキャリヤと
比較してバンプとリード端子との2倍以上の強い接合力
をもつフィルムキャリヤが得られた。
Next, the film carrier on which the lead terminals 14 are formed is immersed in Sn plating solution, and electroless plating is performed to
A 0.5 μm Sn film was formed on the surface of a copper foil, and a bonding test was conducted. As a result, a film carrier was obtained that has twice as strong bonding force between bumps and lead terminals as compared to conventional film carriers.

〈発明の効果〉 上記したように、リード端子のバンプ接合部に少なくと
もひとつの溝または貫通孔を設けることにより、従来の
フィルムキャリヤに比べて、バンプとリード端子との強
力な接合が得られ、バンプとリード端子との接着不良が
減少し、歩留りが上がり、製造コストを低下させること
ができる。また、構造上、バンプ及びバンプのつぶれを
小さくすることができるので、微細化に適している。
<Effects of the Invention> As described above, by providing at least one groove or through hole in the bump joint portion of the lead terminal, a stronger joint between the bump and the lead terminal can be obtained compared to conventional film carriers. Adhesion defects between bumps and lead terminals are reduced, yields are increased, and manufacturing costs can be reduced. Further, since the bumps and the crushing of the bumps can be reduced due to the structure, it is suitable for miniaturization.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(A)〜(G)は、本発明のフィルムキャリヤの
製造例を工程順に示す説明図である。 第2図(A)〜(H)は、本発明におけるフィルムキャ
リヤのリード端子の側面図及び、リード端子先端面から
みた、溝または貫通孔の代表的なものを、数例示した説
明図である。 第3図(a)、(b)は、従来のフィルムキャリヤの例
を示した説明図である。 第4図(a)〜(ロ)は、本発明におけるフィルムキャ
リヤ、及び、バンプ付フィルムキャリヤのリード先端部
を示した説明図である。 l・・・デバイス孔 2・・・ポリイミドフィルム 3・・・接着層 4 ・・・銅箔 5・・・フォトレジスト 6・・・フォトレジスト 7・・・配線パターン 8・・・バンプ形成用部 9・・・溝 10・・・裏止め剤 11・・・銅箔配線パターン 12・・・フォトレジスト 13・・・フォトレジスト 14・・・リード端子 15・・・リード端子の側面図 16・・・リード端子先端方向からみた図17・・・溝 18・・・貫通孔 19・・・絶縁フィルム 20・・・バンプ接合部 21・・・バンプ 第1図 第3図 4図
FIGS. 1(A) to 1(G) are explanatory diagrams showing an example of manufacturing a film carrier of the present invention in order of steps. FIGS. 2(A) to 2(H) are a side view of the lead terminal of the film carrier according to the present invention, and an explanatory diagram showing several examples of typical grooves or through holes as seen from the lead terminal end surface. . FIGS. 3(a) and 3(b) are explanatory views showing examples of conventional film carriers. FIGS. 4(a) to 4(b) are explanatory diagrams showing lead tips of a film carrier and a bumped film carrier in the present invention. l...Device hole 2...Polyimide film 3...Adhesive layer 4...Copper foil 5...Photoresist 6...Photoresist 7...Wiring pattern 8...Bump forming part 9...Groove 10...Backing agent 11...Copper foil wiring pattern 12...Photoresist 13...Photoresist 14...Lead terminal 15...Side view of lead terminal 16...・Figure 17 viewed from the tip of the lead terminal...Groove 18...Through hole 19...Insulating film 20...Bump joint 21...Bump Figure 1 Figure 3 Figure 4

Claims (1)

【特許請求の範囲】[Claims] 1)半導体素子のパッド部もしくは外部端子接合部とボ
ンディングされるフィルムキャリヤのリード端子バンプ
接合部に、少なくともひとつの溝または貫通孔を設けた
事を特徴とするフィルムキャリヤ。
1) A film carrier characterized in that at least one groove or through hole is provided in a lead terminal bump joint portion of the film carrier that is bonded to a pad portion of a semiconductor element or an external terminal joint portion.
JP30548387A 1987-12-01 1987-12-01 Film carrier Pending JPH01145827A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30548387A JPH01145827A (en) 1987-12-01 1987-12-01 Film carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30548387A JPH01145827A (en) 1987-12-01 1987-12-01 Film carrier

Publications (1)

Publication Number Publication Date
JPH01145827A true JPH01145827A (en) 1989-06-07

Family

ID=17945701

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30548387A Pending JPH01145827A (en) 1987-12-01 1987-12-01 Film carrier

Country Status (1)

Country Link
JP (1) JPH01145827A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108257938A (en) * 2018-01-31 2018-07-06 江苏长电科技股份有限公司 For the jig of lead frame and the engraving method of lead frame

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60130132A (en) * 1983-12-19 1985-07-11 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60130132A (en) * 1983-12-19 1985-07-11 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108257938A (en) * 2018-01-31 2018-07-06 江苏长电科技股份有限公司 For the jig of lead frame and the engraving method of lead frame
CN108257938B (en) * 2018-01-31 2020-01-24 江苏长电科技股份有限公司 Jig for lead frame and etching method of lead frame

Similar Documents

Publication Publication Date Title
JP2753746B2 (en) Flexible circuit board for mounting IC and method of manufacturing the same
JP2641869B2 (en) Method for manufacturing semiconductor device
US7547850B2 (en) Semiconductor device assemblies with compliant spring contact structures
KR100614548B1 (en) Fabrication method of wiring substrate for mounting semiconductor element and semiconductor device
JP3003624B2 (en) Semiconductor device
JP2001156203A (en) Printed wiring board for mounting semiconductor chip
US5109601A (en) Method of marking a thin film package
KR100288405B1 (en) Electrical bonding method for semiconductor chip and device therefor
JP2753696B2 (en) Automatic bonding structure of semiconductor package tape
US6763585B2 (en) Method for producing micro bump
US4965700A (en) Thin film package for mixed bonding of chips
JP3925752B2 (en) Bumped wiring board and manufacturing method of semiconductor package
JP2001217513A (en) Circuit board
JPH046841A (en) Mounting structure of semiconductor device
JPH01145827A (en) Film carrier
JP2001223287A (en) Method for manufacturing interposer
JP2721580B2 (en) Method for manufacturing semiconductor device
US6608384B2 (en) Semiconductor device and method of forming the same
JP3331146B2 (en) Manufacturing method of BGA type semiconductor device
JP2001015556A (en) Semiconductor device, its manufacture, and its mounting structure
JPH09293961A (en) Packaging method of electronic part
JP3258564B2 (en) Semiconductor device and manufacturing method thereof
KR0171099B1 (en) Substrate bumb and the same manufacture method
JPS63122135A (en) Electrically connecting method for semiconductor chip
JPH09246416A (en) Semiconductor device