JPH0311090B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device in which a thick insulating film in a field region and an anti-inversion layer are formed in a self-aligned manner.

Conventionally, in MOS type semiconductor integrated circuits, a relatively thick field insulating film is provided between adjacent elements, that is, in the field region, for element isolation, and a field insulating film of the same conductivity type as the substrate is used to increase the inversion voltage of the field region. A highly doped inversion prevention layer (channel stopper) is provided.
For this reason, conventional manufacturing methods require a photolithography process to selectively form an anti-inversion layer in the field region, and a process to selectively etch a thick insulating film formed over the entire surface of the substrate to obtain the element formation region. Two photo-etching processes were required, including a photo-etching process. This requires a large margin for mask alignment, which impedes an increase in the degree of integration, and complicates the manufacturing process, which impedes improvements in yield and cost reduction.

Therefore, selective oxidation methods have recently come to be used as a means to solve these difficulties. In this method, a silicon nitride film is deposited on a silicon substrate through a thin silicon oxide film, and this silicon nitride film is selectively etched to leave only the element forming area, and the remaining silicon nitride film is used as a mask for ion implantation. In this method, ions are first implanted to form an anti-inversion layer, and then high-temperature thermal oxidation is performed using the same silicon nitride film as a mask to selectively form a thick oxide film on the field region. Note that after that, the silicon nitride film is removed, the thin silicon oxide film thereunder is once removed, and an element is formed on the exposed substrate by a well-known process. According to this method, the photolithography process only needs to be carried out once for selectively etching the silicon nitride film, and the insulating film in the field region and the anti-inversion layer are formed in self-alignment, which is superior to the conventional method described above. The manufacturing process is simple and there is no need for mask alignment margins.

However, the following problems arise when using this selective oxidation method as a method for isolating elements in integrated circuits, which are becoming increasingly finer and denser.

First, nitrogen compounds from the silicon nitride film used as an oxidation-resistant mask in the high-temperature thermal oxidation process for selective oxidation diffuse into the underlying silicon oxide film, and the nitrogen compounds are deposited on the surface of the silicon substrate. generate. When a gate oxide film is later formed by thermal oxidation by exposing the surface of the silicon substrate in the element formation region, this nitrogen compound inhibits the formation of the oxide film, significantly lowering the withstand voltage of the gate oxide film and lowering the gate threshold. This causes voltage variations. Second, when selectively forming a thick field oxide film, oxidation also progresses in the lateral direction, so the thick field oxide film forms a bird's beak shape from the edge of the silicon nitride film, which is an oxidation-resistant mask. This intrusion causes dimensional errors in the element area and impedes high integration. Thirdly,
Forming a thick field oxide film requires high-temperature and long-term heat treatment at 1000°C for 5 hours in an oxidizing atmosphere containing water vapor, so impurities in the field region where ions have already been implanted may be diffused. The particles are then redistributed and seep into the device formation region, which causes problems such as deterioration of device characteristics and impeding high integration.

SUMMARY OF THE INVENTION An object of the present invention is to provide a pattern forming method that has small pattern conversion differences and can form fine patterns with high precision.

Another object of the present invention is to provide a method for manufacturing a semiconductor device, which applies such a patterning method to device isolation and enables high-density integration of microscopic devices without impairing their characteristics. .

In the pattern forming method of the present invention, first, a first material film to be patterned is formed on a predetermined substrate, and a second material film is formed with a predetermined pattern on the first material film. Next, a plasma polymerized film is deposited on the exposed surface of the first material film by exposing it to a predetermined plasma atmosphere. After the second material film is removed, the first material film is selectively etched using the plasma polymerized film as an etching-resistant mask.

This pattern forming method is one of the techniques for forming an etching-resistant mask using a mask that is inverted from that used when forming the mask by a normal photolithography process. Several inversion mask techniques have been known so far, but the present invention has the advantage that the process is simpler than conventional ones, and the difference in pattern conversion is extremely small, making it possible to form fine patterns with high precision. has.

A method for manufacturing a semiconductor device according to the present invention applies the above-described pattern forming method to element isolation. That is, a semiconductor substrate is first covered with an insulating film serving as an element isolation insulating film, and a first material film is formed on this insulating film. Next, a second material film is formed on the first material film with a pattern covering the element formation region by a photolithography process, and using this second material film as a mask, a film is formed on the substrate surface in the element isolation region to prevent inversion. ion implantation of impurities. Then, a plasma polymerized film is formed on the exposed surface of the first material film by exposing it to a plasma atmosphere. After removing the second material film,
The first use of plasma polymerized film as an etching-resistant mask
Then, using the remaining first material film as an etching-resistant mask, the insulating film is selectively etched to expose the substrate surface in the element formation region. Desired elements are then formed on the exposed substrate.

With this manufacturing method, an anti-inversion layer and a thick insulating film can be formed in the field region in a single photolithography process using the same technique as the selective oxidation method. Moreover, according to this method, there is no need to use a silicon nitride film, which is an oxidation-resistant film, and it is possible to avoid the problem of poor breakdown voltage of the gate oxide film, which is caused by the use of the silicon nitride film.

Furthermore, in recent years, there has been significant progress in etching technology centered on reactive sputter etching, and in particular, by using the above-mentioned reactive sputter etching technology, it has become possible to transfer the mask pattern to the underlying material to be etched without side etching. ing. Therefore, in the method of the present invention, if the reactive sputter etching technique is used to etch the element isolation insulating film, the area of the element formation region can be increased compared to the conventional selective oxidation method which causes bird's beaks. The degree of integration can be increased.

Further, according to the method of the present invention, there is no need for long-term heat treatment after ion implantation, and it becomes possible to minimize deterioration in device characteristics due to redistribution of the field inversion prevention layer. Furthermore, by selecting a material that does not form a plasma polymerized film even when exposed to a plasma atmosphere as the second material film, it is possible to selectively deposit the plasma polymerized film on the first material film on the field region. . By doing so, the reliability of patterning and etching using the plasma polymerized film is increased, and isolation between elements can be reliably performed, thereby improving the yield of products. For example, when performing reactive plasma etching of silicon using fluorocarbon gas (CF ₄ ) and H ₂ gas, if the amount of H ₂ gas exceeds about 50%, the silicon will no longer be etched and the surface will be etched.
A plasma polymerized film of CF _X is deposited. On the other hand, when a silicon oxide film is etched under the same conditions, the etching progresses and a plasma polymerized film of CF _X is not deposited on the surface. This is thought to be because the oxygen in the silicon oxide film reacts with carbon to form volatile CO ₂ , so that no plasma polymerized film is deposited. Therefore, for example, a polycrystalline silicon film is used as the first material film, a silicon oxide film is used as the second material film, and after patterning the second material film, a reaction using CF ₄ and H ₂ gas is performed. By performing plasma etching, a plasma polymerized film of _CFx can be selectively deposited on the first material film in the field region.

Embodiments in which the present invention is applied to a MOS type semiconductor device will be described below with reference to the drawings.

Example As shown in Figure 1a, plane orientation is 100, specific resistance is 5-
A P-type silicon substrate 1 of 20 Ωcm is prepared, and a silicon oxide film 2 with a thickness of about 7000 mm is formed on the entire surface thereof by thermal oxidation. Thereafter, a polycrystalline silicon film 3 having a thickness of about 1500 mm is deposited by, for example, the CVD method. Next, a resist film 4 is formed on the area where elements are to be formed by a normal photolithography process. Thereafter, as shown in FIG. 1B, boron ions are implanted into the silicon substrate in the field region using the resist film 4 as a mask to form implanted layers 5 and 6. At this time, it is best to select the accelerating voltage of boron to be around 350kV.

_{Next ,} as shown in _FIG . A plasma polymerized film 7 of CF _X is deposited. At this time, a plasma polymerized film 7' is also deposited on the resist film 4, but it can be removed together with the removal of the resist film 4. Figure d shows resist 4 using a boiling mixture of sulfuric acid and hydrogen peroxide.
This is a diagram after the plasma polymerized film 7' on the resist 4 is removed together with the resist 4. As a result of this etching, the plasma polymerized film 7 formed on the polycrystalline silicon film 3 is also partially etched, but it has been confirmed that it functions sufficiently as a mask for etching the polycrystalline silicon. Figure d shows the polycrystalline silicon film on the element formation region being etched away using the plasma polymerized film 7 as a mask. Next, the plasma polymerized film 7 is removed, for example, in an oxygen plasma atmosphere,
As shown in FIG. 5E, the silicon oxide film 2 on the element formation region is etched by, for example, reactive sputter etching using the polycrystalline silicon film 3 as an etching mask.

Next, as shown in FIG. Arsenic is doped to form an n-type source region 12 and drain region 13, and then a silicon oxide film 14 is deposited on the entire surface by CVD method, contact holes are opened and lead-out electrodes 15 and 16 are arranged, and the process is completed. do.

In Figure e, when the polycrystalline silicon on the field oxide film used as a mask is oxidized, the field oxide film becomes thicker and the corners of the field oxide film edges become rounded, which makes the corners of the metal wiring in the later process difficult. It is effective in reducing the problem of step breakage. In addition, in this embodiment, the plasma polymerized film 7 is deposited on the polycrystalline silicon film 3, but a film on which a plasma polymerized film is deposited, such as an alumina film, an alumina film, a silicon nitride film, etc., may be used instead. be able to. Furthermore, in the examples, plasma polymerized film deposition was performed using CF ₄ +H ₂ , but a portion of F may be replaced with other halogens.

According to this embodiment, similarly to the selective oxidation method, a thick insulating film and an anti-inversion layer can be formed in a self-aligned manner in a field region by a single photolithography process. Moreover, the above-mentioned problems in the case of selective oxidation are also solved.

That is, according to the method of the present invention, there is no need to use a silicon nitride film, which is an oxidation-resistant film, and the problem of poor breakdown voltage of the gate oxide film, which is caused by the use of the silicon nitride film, can be avoided. can.

Furthermore, since the field insulating film is etched using reactive sputter etching, the difference in pattern conversion can be reduced to almost zero, making it possible to increase the area of the device formation region compared to the conventional selective oxidation method, thereby increasing the degree of integration. can be raised. for example
When creating dRAM memory using the 3μ rule,
Using the method of the present invention, the degree of integration can be increased to more than 50%. Furthermore, the method of the present invention eliminates the need for long-term heat treatment after ion implantation, making it possible to significantly reduce deterioration in device characteristics due to redistribution of the field inversion prevention layer. On the other hand, as a conventional method of patterning polycrystalline silicon films, metal films, etc. using inversion mask technology, for example, a mask is formed on the part to be etched and selectively oxidized by thermal oxidation, anodic oxidation, etc. A method is known in which a film is formed and this oxide film is used as an etching-resistant mask (for example, Japanese Patent Laid-Open No. 1986-1999)
Publication No. 120782). However, in this method, oxidation proceeds isotropically, resulting in a large difference in pattern conversion.
Another method is to pattern the silicon oxide film that will become the field oxide film by implanting nitrogen ions into the field region to convert the surface of this region into a nitrided oxide film, which can be used as an etching-resistant mask. A method has also been proposed to
53-114685). However, this method not only requires a long time for nitrogen ion implantation, but also
After that, a heat treatment process for nitriding is also essential.
In contrast to these conventional techniques, the pattern forming method of the present invention that uses a plasma polymerized film has extremely simple steps, and the difference in pattern conversion is small.
Fine patterns can be formed with high precision.

Example In the example, a plasma polymerized film 7 was formed on the polycrystalline silicon film 3 using the resist film 4 as a mask, as shown in FIG. 7' is formed,
During the resist removal, the plasma polymer film 7 was also partially etched and inevitably became thinner. Furthermore, since boron ions were implanted using the resist film 4 as a mask, it was necessary to increase the thickness of the resist film 4. Therefore, this embodiment is an improvement on this point.

That is, as shown in FIG. 2a, a silicon oxide film 22 is formed on a silicon substrate 21 in the same manner as in the embodiment, and a polycrystalline silicon film 23 is deposited thereon. A silicon oxide film 24 having a thickness of about

Thereafter, a resist film 25 is formed on the area where the field is to be formed by a normal photolithography process, and then, as shown in FIG. 2B, the silicon oxide film 24 is patterned by reactive sputter etching.
Next, using the resist 25 and the silicon oxide film 24 as a mask, boron is implanted to form field inversion prevention layers 26 and 27.

Next _, after removing the resist film 25 as shown in _FIG . Plasma polymerized films 28 and 29 of CF _X are deposited on top. In this way, a portion of the silicon oxide film 24 is left. next,
The silicon oxide film 24 is removed by etching, as shown in FIG.
As shown in FIG. 2, polycrystalline silicon film 23 is etched using plasma polymerized films 28 and 29 as masks. Thereafter, as shown in FIG.
8 and 29 are removed, and then, using the polycrystalline silicon film 23 as a mask, the silicon oxide film 22 on the area where an element is to be formed is etched to form an element isolation area. Thereafter, desired elements are formed on the exposed silicon surface in the same manner as in the embodiment.

According to the method of the present invention, since ion implantation for preventing field inversion is performed using the silicon oxide film 24 and the resist film 25 as a mask, there is no fear that impurities will be implanted into the silicon substrate in the area where elements are to be formed. It disappears.

Further, when exposed to a plasma atmosphere, etching progresses in the silicon oxide film 24, and plasma polymerized films 28 and 29 are deposited only on the polycrystalline silicon film 23. After that, if the silicon oxide film 24 is etched with, for example, an ammonium fluoride solution, the plasma polymerized films 28 and 29 will hardly be etched, so that the polycrystalline silicon film 23 can be patterned with high reliability using the plasma polymerized films 28 and 29. Can be done.

As described in detail above, according to the pattern forming method of the present invention, a pattern can be formed with a small pattern conversion difference through a very simple process.
Furthermore, according to the method of manufacturing a semiconductor device of the present invention using this pattern forming method, the insulating film and the anti-inversion layer in the field region can be formed in self-alignment through a simple manufacturing process, and the fine element can be formed without deteriorating the device characteristics. High-density integration can be achieved. It goes without saying that the present invention is applicable not only to MOS type semiconductor devices but also to element isolation in bipolar type semiconductor devices.

[Brief explanation of drawings]

FIGS. 1 and 2 are cross-sectional views showing different embodiments of the manufacturing method of the present invention in the order of steps. 1, 21...P-type silicon substrate, 2, 22, 2
4... Silicon oxide film, 3, 23... Polycrystalline silicon film, 4, 25... Resist film, 5, 6, 2
6, 27...P ⁺ layer (inversion prevention layer), 7, 7', 2
8, 29... plasma polymerized film, 10... gate oxide film, 11... gate electrode, 12... source region, 13... drain region, 14... silicon oxide film, 15, 16... extraction electrode.

Claims (1)

[Claims] 1. A step of forming a first material film to be patterned on a predetermined substrate; a step of forming a second material film with a predetermined pattern on the first material film; and the first part exposed to a plasma atmosphere formed using a gas containing carbon.
depositing a plasma polymerized film on the surface of the material film; and after removing the second material film, selectively etching the first material film using the plasma polymerized film as an etching-resistant mask. A pattern forming method characterized by: 2. Covering the semiconductor substrate with an insulating film to serve as an element isolation insulating film, forming a first substance film made of a different material on this insulating film, and forming a pattern covering the element forming area by a photolithography process. a step of forming a second material film made of a material different from the first material film on the first material film; and using the second material film as a mask, impurities for preventing inversion are applied to the substrate surface of the element isolation region. a step of implanting ions, and exposing the exposed first part to a plasma atmosphere formed using a gas containing halogen and carbon.
forming a plasma polymerized film on the surface of the material film; after removing the second material film, selectively etching the first material film using the plasma polymerized film as an etching-resistant mask; selectively etching the insulating film using the first material film as an etching-resistant mask to expose the substrate surface in the element formation region; forming a desired element on the exposed substrate;
A method for manufacturing a semiconductor device, comprising: 3. A patent in which the first material film is a silicon film, the second material film is a resist film or a silicon oxide film, and the plasma atmosphere is formed using CF ₄ gas and H ₂ gas. A method for manufacturing a semiconductor device according to claim 2.