JPH0310199B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a superconducting device, and more particularly to a shift register using a Josephson device.

[Prior art]

Because Josephson elements switch at high speed,
Using this, the shift register can be operated at high speed. An example using a Josephson device according to the prior art is described in detail in Document 1 below.

1 Hamilton et al “ANALOG
MEASURMENT APP−LICATIONS FOR
HIGH SPEED JOSEPHSON SWITCHES”
IEEE MAG-17, No. 1, 577 (1981) The shift register shown in this document 1 uses polyphase (three-phase) AC power supplies with precisely shifted phases. Therefore, phase adjustment is difficult in this circuit, and high-speed operation is difficult.

[Purpose of the invention]

An object of the present invention is to provide a superconducting shift register that operates in synchronization with a single-phase AC power supply, has a wide operating margin, and is easy to integrate.

[Summary of the invention]

The features of the present invention include a drive circuit that amplifies and transfers an input data signal in one cycle of the steady portion of the AC power source, and a drive circuit that captures the output of the drive circuit determined in the steady portion when a timing signal is received, and transfers the data to the AC power source. A master flip-flop that holds during the power supply transient and reads the master flip-flop data on the rising edge of the next cycle;
In the register cell, which consists of a slave flip-flop that continues to hold the data over the steady portion of the next cycle, the drive circuit amplifies the input data signal, and the timing signal is simply delayed. This is because it is composed of a generator circuit.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is an example of a superconducting shift register according to the present invention. This superconducting shift register is composed of a plurality of register cells 100 connected in series. Each register cell 100 consists of a master flip-flop 101, a slave flip-flop 105, and a drive circuit 106 that supplies current to the slave flip-flop. Drive circuit 1
06 amplifies input data from the register cell 100 in the previous stage and supplies it to the master flip-flop 101 as a drive current. The master flip-flop 101 takes in the output data from the drive circuit 106 when it receives the timing signal from the terminal 108, and holds the taken-in data until it receives the next timing signal 108. Such a master flip-flop 101 is composed of a magnetic flux coupling quantum interference circuit 102, a superconducting loop formed by an inductance 103, and a damping resistor 104 connected in parallel to the inductance 103. When slave flip-flop 105 receives a clock, it reads the output data of master flip-flop 101 and holds the data until it receives the next clock. The flux-coupled quantum interference circuit 102 has five terminals. The first terminal of the flux-coupled quantum interference circuit 102 is connected to the drive circuit 10
6, and the second terminal is grounded. The third and fourth terminals are connected to terminal 108, and the fifth terminal is an output terminal that forms a superconducting loop with the second terminal. A magnetic flux-coupled quantum interference circuit 10 from the first terminal to the second terminal.
A gate current is applied to drive 2. A control input line from the third terminal to the fourth terminal is magnetically coupled to the flux-coupled quantum interference circuit 102. Flux-coupled quantum interference circuit 102 if either gate current or control input, or both, are absent.
is in a superconducting state, and no voltage is generated between the second terminal and the fifth output terminal. However, when a control input occurs while the gate current is flowing, the voltage between the second terminal and the fifth output terminal changes from zero voltage state to voltage state, and the output current is output from the fifth output terminal through the load resistor. It can be taken out.

The fifth part of such a magnetic flux-coupled quantum interference circuit 102
An inductance 103 and a damping resistor 104 are connected in parallel between the terminal and the second terminal. A timing input is input between the third terminal and the fourth terminal via terminal 108. The output current of the drive circuit 106 is connected to the magnetic flux coupling quantum interference circuit 102.
from the first terminal to the grounded second terminal.

When a timing input occurs while an output current is being generated from the drive circuit 106, the magnetic flux coupling quantum interference circuit 102 transiently switches from a superconducting state to a voltage state, and the output current from the drive circuit 106 is transferred to the inductance 103. , an output current flows through the inductance 103. After the output current from the drive circuit 106 is transferred to the inductance 103, the flux-coupled quantum interference circuit 102 returns from the voltage state to the superconducting state;
03 constitutes a superconducting loop, so there is no change in the output current of the inductance 103. Moreover, even if the timing input disappears after the output current from the drive circuit 106 is transferred to the inductance 103, the output current of the inductance 103 does not change.

On the other hand, if a timing input occurs in a state where there is no output current from the drive circuit 106, the magnetic flux will be Since the coupled quantum interference circuit 102 is in a voltage state, the superconducting loop is broken and the output current flowing through the inductance 103 disappears. Originally, if no current exists in this superconducting loop, the output current of the inductance 103 remains zero. That is, the output of the drive current at the time when the timing input occurs is held and remains in the inductance 103 even after the timing input disappears. As described above, the flip-flop operation of master flip-flop 101 is realized.

Slave flip-flop 105 reads the data from master flip-flop 101 when a clock arrives and holds the data until the next clock arrives. If the output current is flowing through the inductance 103 at this time, it is interpreted as data "1", the true value signal (T signal) of the slave flip-flop 105 is turned on, and the complementary value signal (C signal) is turned off. . If no output current flows through the inductance 103, the data is interpreted as "0", the true value signal is turned off, and the complement value signal is turned on. The true value signal (T signal) of the slave flip-flop is transmitted to the wiring 109 via the terminal 121, and the complementary value signal (C signal) is transmitted to the wiring 110 via the terminal 122. A signal is taken into the register cell 100 via a terminal 120. The present invention employs an AC power supply driven logic circuit. Generally, a logic circuit driven by an AC power supply performs a logic operation during an active time Ta, and is reset during an inactive time Tn. However, the master flip-flop 1
01 stores a persistent current in a superconducting loop composed of a flux-coupled quantum interference circuit 102 and an inductance 103, so that information can be retained even during the inactive time Tn. The slave flip-flop 105 has the role of reading the data of the master flip-flop 101 at the beginning of the active time Ta and sending out corresponding true/complement output information from terminals 121 and 122 to the logic circuit. one time,
Once the output of the true and complementary values is determined, the output will not change even if the contents of the master flip-flop 101 change thereafter.

FIG. 2 is a diagram showing the timing of generation of signals of the shift register. AC power is provided as a bipolar AC voltage with a partially flattened trapezoidal shape as shown by waveform 200. Slave flip-flop 10
5 is shown by waveform 201. At time T1 at the beginning of the active time, the slave flip-flop 105
receives the data from master flip-flop 101 and sends it to output terminals 121 and 122. The operation of drive circuit 106 is represented by waveform 202. The outputs of the slave flip-flop 105 and the drive circuit 106 may turn on or remain off during Ta, but in any case, they are always reset once during Tn. In the AC power supply drive system, the AC power supply functions as a clock. The drive circuit 106 uses the data of the register cell 100 in the previous stage at time T2.
The data is sent to the master flip-flop 101. The operation of master flip-flop 101 is represented by waveform 203. The timing signal is generated at time T4 when the true and complement outputs of slave flip-flop 105 are determined. In other words, the data of the master flip-flop is T within the active time Ta.
It is reset at time T4, which is later than 1, and set at time T3, which is later than T2.

FIG. 3a is a circuit example of the drive circuit 106. Magnetic flux coupling quantum interference circuit 300 and bias resistor 301
and a load resistor 302. A gate current for driving the flux-coupled quantum interference circuit 300 is caused to flow through a first terminal of the flux-coupled quantum interference circuit 300 via a bias resistor 301 . The second terminal of the flux-coupled quantum interference circuit 300 is grounded.
Data input from the input terminal 120 flows from the third terminal to the fourth terminal. The gate current is a trapezoidal waveform alternating current 200 shown in FIG.
When data input arrives from the input terminal 120 after this gate current reaches a certain value at time Ta, a voltage is generated between the second terminal and the fifth terminal of the flux-coupled quantum interference circuit 300, and the The output current flows through the load resistor 302 connected to the terminal of the master flip-flop 101 and is applied to the first terminal of the flux-coupled quantum interference circuit 102 in the master flip-flop 101.

FIG. 3b shows another example of the drive circuit 106. A current injection quantum interference circuit 310 is connected as a buffer amplifier to a magnetic flux coupling quantum interference circuit 300, and bias resistors 311, 312 and load resistors 313, 314 are also used to operate the circuit.
is added. Current injection quantum interference circuit 310
has three terminals. The first and second terminals are terminals that apply another input current, and the third terminal is a ground point. The current injection quantum interference circuit 310 switches from the zero voltage state to the voltage state only when inputs arrive at both the first and second terminals. At this time, the first terminal or the second terminal can also be used as an output terminal, and an output current can be taken out from the output terminal via a load resistor.

In FIG. 3b, the first part of the flux-coupled quantum interference circuit 300
A gate current for driving the magnetic flux-coupled quantum interference circuit 300 is caused to flow through the terminal through the bias resistor 311. The second terminal of the flux-coupled quantum interference circuit 300 is grounded. Magnetic flux coupling quantum interference circuit 30
Data input from the input terminal 120 flows from the third terminal of 0 to the fourth terminal. When data input comes from the input terminal 120 with the gate current applied in advance, the flux-coupled quantum interference circuit 300
A voltage is generated between the second and fifth terminals of
The output current flows through the load resistor 313 connected to the fifth terminal and is applied to the first terminal of the current injection quantum interference circuit 310. On the other hand, since the input current is previously applied to the second terminal of the current injection quantum interference circuit 310 via the bias resistor 312,
As soon as the input from the flux-coupled quantum interference circuit 300 arrives, the current injection quantum interference circuit 310 switches from the zero voltage state to the voltage state. Then, an output current flows from the second input terminal/output terminal via the load resistor 314, and the master flip-flop 101
The first terminal of the magnetic flux-coupled quantum interference circuit 102 in In this way, the drive circuit 106 shown in FIG. 3b can supply more current to the master flip-flop 101 than the drive circuit 106 shown in FIG. 3a, so the circuit operation is stable. FIG. 4 shows a circuit example of the slave flip-flop 105.
This circuit is a so-called Self Gate AND (SGA) circuit. Four magnetic flux coupling quantum interference circuits 401, 402, 403, 404 and 2
bias resistors 405, 406, 2 resistors 4
Consists of 07,408. Flux-coupled quantum interference circuit 401 is coupled to master flip-flop 101 via inductance 103. An AC power supply drive current is applied to a first terminal of the magnetic flux coupling quantum interference circuit 401 from an AC power supply bus 410 via a bias resistor 406 . The second terminal of the magnetic flux-coupled quantum interference circuit 401 is grounded via superconductor wiring. Magnetic flux coupling quantum interference circuit 40
The input signal line from the third terminal to the fourth terminal of the master flip-flop 101 becomes a part of the output inductance 103 of the master flip-flop 101. The fifth terminal of the flux-coupled quantum interference circuit 401 is a load resistor 408
It is connected to the first terminal of the flux-coupled quantum interference circuit 403 via. An AC power supply current is applied to a first terminal of the magnetic flux-coupled quantum interference circuit 402 from an AC power supply bus 410 via a bias resistor 405 . The second terminal of the flux-coupled quantum interference circuit 402 is grounded via superconducting wiring. The input signal line from the third terminal to the fourth terminal of the flux-coupled quantum interference circuit 402 is connected to the flux-coupled quantum interference circuit 401.
It forms part of the superconducting wiring connecting the second terminal of the superconductor and the ground point. The fifth terminal of the flux-coupled quantum interference circuit 402 is connected to the first terminal of the flux-coupled quantum interference circuit 404 via a load resistor 407.

The second terminal of the flux-coupled quantum interference circuit 403 is grounded. The input signal line from the third terminal to the fourth terminal of the flux-coupled quantum interference circuit 403 forms part of the superconducting wiring that connects the second terminal of the flux-coupled quantum interference circuit 402 and the ground point. The fifth terminal of the flux-coupled quantum interference circuit 403 is the true value output terminal of the slave flip-flop 105.

The second terminal of the flux-coupled quantum interference circuit 404 is grounded. The input signal line from the third terminal to the fourth terminal of the flux-coupled quantum interference circuit 404 forms part of the superconducting wiring that connects the second terminal of the flux-coupled quantum interference circuit 401 and the ground point. The fifth terminal of the flux-coupled quantum interference circuit 404 is the complement output terminal of the slave flip-flop 105.

Assume that the voltage of the power supply bus 410 rises from 0 to a steady state while the output current is flowing through the inductance 103. At this time, the magnetic flux coupling quantum interference circuit 401 first switches from a zero voltage state to a voltage state in the middle of rising. Then, from the fifth terminal of the flux-coupled quantum interference circuit 401 to the flux-coupled quantum interference circuit 4
An output current is supplied to the first terminal of 03. After the flux-coupled quantum interference circuit 401 is switched on, there is no control line input to the flux-coupled quantum interference circuit 402, so the flux-coupled quantum interference circuit 402 remains in the superconducting state. Therefore, the flux-coupled quantum interference circuit 4
The gate current of 02 passes through and reaches the control line input of the magnetic flux coupling quantum interference circuit 403. The flux-coupled quantum interference circuit 403 is therefore supplied with both a gate current and a control line input, so it switches from a zero voltage state to a voltage state and generates a true value output. Since the flux-coupled quantum interference circuits 402 and 404 remain in a zero voltage state, the complementary value output remains off.

If the voltage of the power supply bus 410 rises while no output current is flowing through the inductance 103, no gate current is supplied to the flux-coupled quantum interference circuit 403 and the true value output remains off. At this time, the gate current that has passed through the flux-coupled quantum interference circuit 401 is added to the control line input of the flux-coupled quantum interference circuit 402, so the flux-coupled quantum interference circuit 402 switches to a voltage state, and the output current changes to the flux-coupled quantum interference circuit. It is applied to the gate current of circuit 404. At this time, the gate current that has passed through the flux-coupled quantum interference circuit 401 is also added to the control line input of the flux-coupled quantum interference circuit 404, so the flux-coupled quantum interference circuit 404 is switched to a voltage state, and the complementary value output is turned on. .

Once the flux-coupled quantum interference circuit 402 is switched on, there is no control line input to the flux-coupled quantum interference circuit 403, so the inductance 103
Even if an output current is generated at , the flux-coupled quantum interference circuit 403 remains off.

FIG. 5a shows an example of a circuit that generates a timing signal for the flux-coupled quantum interference circuit 102 included in the master flip-flop 101. This timing signal generation circuit includes a magnetic flux coupling quantum interference circuit 500, a bias resistor 501, and two sets of control input lines 109 and 110. A bias resistor 50 is connected to the first terminal of the magnetic flux-coupled quantum interference circuit 500 from an AC power supply bus 503.
A gate current is supplied through 1. The second terminal of the flux-coupled quantum interference circuit 500 is grounded. The outputs of the true value T and complement value C from the slave flip-flop 105 are input to two sets of control input lines 109 and 110, respectively. These control input lines 109 and 110, like the control input line from the second terminal to the fourth terminal of the flux-coupled quantum interference circuit 102 or 103 in FIG. It has a function of switching the quantum interference circuit 500 from a zero voltage state to a voltage state or vice versa. In this way, the timing signal generation circuit of FIG. 5a has two sets of control input lines 109 and 110.
This utilizes the fact that the flux-coupled quantum interference circuit 500 equipped with the above operates as an OR circuit. Therefore, the bias resistor 501 is added to the magnetic flux coupling quantum interference circuit 500.
If a current flows through either one of the two sets of control input lines 109, 110 while a gate current is flowing through the gate current, the flux-coupled quantum interference circuit 500 switches from a zero voltage state to a voltage state. Then, an output voltage is generated at terminal 502.

In this configuration, slave flip-flop 105
After the signal of is confirmed, the timing signal is output to terminal 5.
02 and corresponds to timing T4 of waveform 203 in FIG.
Reset 1. FIG. 5b is another example of a circuit for generating timing signals. Josephson element 5
10, bias resistor 501, AC power supply bus 5
It is composed of 03.

Josephson device 510 has two terminals. A certain value of gate current flowing from the first terminal to the second terminal (this is the maximum superconducting current)
The zero voltage state is maintained while the voltage is less, but when it exceeds a certain value, it switches to the voltage state. A gate current is applied to the first terminal of the Josephson element 510 from an AC power supply bus 503 via a bias resistor 501. Josephson element 51
The second terminal of 0 is grounded. The maximum superconducting current of the Josefson element 510 is determined by the bias resistance 5
The gate current supplied from the AC power supply bus 503 through the AC power supply bus 503 is set to be smaller than the maximum value, and the Josephson element 510 is
should be switched to the voltage state. The signal that has changed to the voltage state of Josephson element 510 is delayed using delay circuit 511, and is used as a timing signal. When such a method is used, the timing signal of the master flip-flop 101 is
There is no need to feed back and use the output signal of the slave flip-flop 105 which receives the output of the master flip-flop 101. This has the effect of shortening the wiring length and improving the degree of integration and operating frequency. It is clear that the Josephson element may be either a magnetic flux coupling quantum interference circuit or a current injection quantum interference circuit. FIG. 6 shows a pseudo-random pulse generation circuit which is an application example of the present invention. This is a circuit configuration in which four register cells 100 are connected in series and the exclusive OR of the output signals of the two subsequent stages is used as the input signal of the first stage. The exclusive OR signal is in register cell 1
Exclusive OR circuit 6 using affirmation and negation signals of 00
It is made using 50. The exclusive OR circuit 650 includes two magnetic flux coupling quantum interference circuits 600, a current injection quantum interference circuit 602, two bias resistors 603,
It is composed of three load resistors 605, two resistors 604, and a power supply line 601. The output signal F of the exclusive OR circuit is expressed as F=(A+B).( A + B )= A.B + A.B . Generally, this pseudo-random pulse is called an M-sequence pulse.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to realize a superconducting shift register that operates stably and has an excellent degree of integration and operating frequency.

[Brief explanation of the drawing]

FIG. 1 shows an example of the configuration of a shift register according to the present invention, FIG. 2 shows a timing chart of the shift register, FIGS. 3a and 3b show an example of a drive circuit, FIG. 4 shows an example of a slave flip-flop circuit, and FIG. 5a , FIG. 5b shows a timing signal generation circuit, and FIG. 6 shows a pseudo pulse generation circuit which is an application example of the present invention. 100... Register cell, 101... Master flip-flop, 105... Slave flip-flop, 106... Drive circuit, 102... Magnetic flux coupling quantum interference circuit, 103... Inductor, 30
0...Magnetic flux coupling quantum interference circuit, 310...Current injection quantum interference circuit, 510...Josephson element,
511...delay element, 650...exclusive OR circuit.

Claims (1)

[Scope of Claims] 1. Consists of a Josephson element driven by an AC power supply that periodically repeats a transient portion that crosses a zero value and a steady portion that exists in between, and amplifies the input data signal in one cycle of the steady portion. a master flip-flop that captures the output of the drive circuit determined in the steady-state portion at the time it receives the timing signal and holds that data during the transient portion; 1
A register cell consisting of a slave flip-flop that reads data from the master flip-flop at the rising edge of a cycle and continues to hold that data over the steady portion of the cycle is transferred to the slave flip-flop of the preceding register cell. In a superconducting shift register circuit configured by connecting a plurality of shift registers in series so that the output of the register cell becomes the input data signal to the drive circuit of the next stage register cell, the drive circuit inputs the input data signal to the control line. A superconducting shift register circuit comprising a magnetic flux-coupled quantum interference circuit. 2. In claim 1, the drive circuit includes a magnetic flux-coupled quantum interference circuit that receives the input data signal as a control line input, and directly connects the output current of the magnetic flux-coupled quantum interference circuit and the AC power supply via a resistor. A superconducting shift register circuit comprising a current injection quantum interference circuit having two inputs of supplied current. 3. In claim 1, the circuit that generates the timing signal to the master flip-flop generates a signal that changes to a voltage state of the Josephson device with a maximum superconducting current that is smaller than the current supplied from the AC power source. 1. A superconducting shift register circuit comprising a delay circuit that causes a delay.