JPS62272878A - Arm shortproof circuit of transistor converter - Google Patents

Abstract

PURPOSE:To minimize a control dead time by supplying a forward bias current turning ON one transistor on condition that a reverse bias voltage detection means provided at the other transistor has detected said voltage. CONSTITUTION:A series circuit of two transistors (hereinafter referred to as Tr) 3, 4 is connected with a DC power source 2 and said transistors are turned ON and OFF alternately to supply a load 7 with AC power created by conversion from DC power. In this case, an original signal A turning ON and OFF the Tr3 is directly inputted to a signal insulating circuit 15 and given to the Tr3 base through a base current amplifier circuit 20. It is also given to a Tr4 base through an insulating circuit 16 constituted in like manner and so on. Further, respective Trs 3, 4 are provided with reverse bias voltage detectors 40, 50 of which output is inputted to the other amplifier circuits 30, 20. According to the resulting logical product of detected values and respective original signals A, B, a base current is supplied to Trs 3, 4 which are then turned ON.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention [Technical Field to Which the Invention Pertains] The present invention relates to an arm short-circuit prevention circuit for a transistor converter that prevents arm short-circuits of a power conversion device constituted by transistors.

[Prior art and its problems]

There is a transistor inverter that converts power using transistors. Therefore, the following description will be made using a transistor inverter as an example of a transistor converter.

FIG. 4 is a main circuit connection diagram showing an example of a single-phase transistor inverter. In FIG. 4, diodes 3D to 6D are connected in antiparallel to the four transistors 3 to 6, respectively, and a single-phase bridge circuit is formed by the antiparallel circuits of these four sets of transistors and diodes. , supplies DC power from a DC power supply 2. Here transistor 3
and 4 are turned on and off alternately, and transistors 5 and 6 are also turned on and off alternately. At this time, the on-off operation of transistor 3.4 and the transistors 5 and 6 are
It is well known that the DC power from the DC power source 2 can be converted to AC power and supplied to the load 7 by providing a predetermined phase difference between the on/off operations of the DC power source 2.
Transistors 3 and 4 are connected in series between the positive and negative terminals of
In order to alternately turn on and off transistors 5 and 6, appropriate consideration must be taken to avoid arm short-circuiting, which will be explained below. Note that similar consideration is given to the series circuit composed of transistors 5 and 6, so only the series circuit composed of transistors 3 and 4 will be explained here.

In a transistor that is in the on state and has a collector current flowing through it, even if the base current is cut off by reverse biasing the base to turn it off, the collector current does not immediately become zero, and internal carriers recombine. The conductive state continues until it disappears. Therefore, the time from when the base current is cut off until the collector current of the transistor becomes zero is called storage time, and is assumed to be Tg.

Therefore, in order to turn on transistor 3 after turning off transistor 4, the base current is turned on to transistor 3 after a time Td longer than the storage time Tg has elapsed since the base current of transistor 4 was disconnected. must be supplied. This is because if there is a period when transistors 3 and 4 connected in series are on at the same time, the DC power supply 2 will be short-circuited, resulting in a so-called arm short-circuit condition, which may cause damage to the transistors or overcurrent detection. This is to avoid inconveniences such as stopping the inverter, and the time Td is referred to as one on-delay hour for arm short-circuit prevention, but hereinafter it will be abbreviated as one on-delay hour.

This also applies to the case where the transistor 3 which is in the on state is turned off and the transistor 4 is turned on.

FIG. 5 is a block diagram showing a conventional example of base signal generation for preventing arm short-circuiting of a transistor converter.
2 is an inverting element, 13 and 14 are on-delay time paths for preventing arm short circuits, and 17. ! :18 is a base current amplification circuit. Now turn on transistors 3 and 4 alternately.
When the original signal A to turn off is a signal to turn on the transistor 3, this original signal is inverted by the inverting element 12 and becomes the original signal B to turn off the transistor 4.

Further, if the original signal A is a signal that turns off the transistor 3, the original signal B, which is an inverted signal thereof, turns on the transistor 4. Transistors 3 and 4 turn on and off alternately, converting DC power from DC power supply 2 to AC and supplying it to load 7. Since the circuits 13 and 14 ensure the above-mentioned on-delay time Td, one arm short circuit can be reliably prevented.

FIG. 6 is an operation waveform diagram showing the operation of each part in the conventional circuit 1 shown in FIG. 5, where FIG. 6(a) shows the waveform of the original signal A, and FIG. Figure 6 () shows the change in the collector current of transistor 3; Figure 6 () shows the change in the base-emitter voltage of transistor 3; 6(g) shows the waveform of the on/off signal given to transistor 4, FIG. ) respectively express changes in the voltage between the base and emitter of the transistor 4.

5 and 6, in order to turn on the transistor 3 which is in the off state, when the original signal changes from off to on at time to, the on-delay circuit 13 for arm short circuit prevention works (this causes an on-delay of one hour). After Td has elapsed, an on signal is applied to the base of the transistor 3 via the signal isolation circuit 15 and the base current amplification circuit 17 (see FIG. 6 (q)), and a collector current flows through the transistor 3. This collector current is the transistor 3
It does not become zero unless the storage time Td has elapsed after the signal to turn it off is given (see Figure 6 (c)).
. Moreover, as this collector current becomes zero, a reverse bias voltage is applied between the base and emitter of this transistor 3 (see FIG. 6).

In the conventional example circuit shown in FIG. 5, one on-delay time Td set by the on-delay circuit 13 for arm short circuit prevention
is a constant value. On the other hand, the storage time Tg of the transistor 3 varies depending on the type of transistor, the magnitude of the collector current, the level of the junction temperature, the magnitude of the base current, etc., so the maximum storage time Tg is determined by considering all operating conditions of the transistor 3. Tgmax
In anticipation of this, a value larger than this maximum storage time Tgmax was selected for the on-delay time Td.

However, storage time Tg in normal operation
is much shorter than the maximum storage time TgnlaX, so the on-delay time T
There is a large difference between d and storage time Tg. Therefore, during the time difference between the two, ie, the period Td-Tg, transistors 3 and 4 are simultaneously off, and no base current is supplied. In this way, the mode period in which both transistors 3 and 47 are off at the same time is a wasted time in terms of control, and the transistor inverter made up of these transistors is left in an uncontrolled state. That's not a good thing. (Although the above description is only for one transistor 3, the same applies to the other transistor 4, so the description of the transistor 4 will be omitted.) [Object of the Invention] An object of the present invention is to provide an arm short-circuit prevention circuit for a transistor converter, which can minimize control waste time that occurs to prevent arm short-circuits in a power converter.

[Key points of the invention]

The present invention focuses on the fact that when a reverse bias current is applied to the base of a transistor in an on state to turn the transistor off, a reverse bias voltage is generated between the base and emitter of the transistor after a storage time has elapsed. When trying to turn on one of two transistors connected in series,
By detecting that the other transistor is in the off state from the reverse voltage generated between its base and emitter, and incorporating this reverse voltage detection signal into the base current supply conditions of the one transistor that is to be turned on, the other transistor is turned on. Since one of the transistors can be turned on at the same time when the storage time of the transistor ends and the collector current becomes zero, this effectively reduces the control dead time to almost zero.

[Embodiments of the invention]

FIG. 1 is a block diagram showing an embodiment of the present invention. In FIG. 1, a series circuit of 2fl transistors 3 and 4 is connected between the positive and negative electrodes of a DC power source 2, and both transistors 3 and 4 are alternately turned on and off to generate DC power. Converting the AC power to AC power and supplying it to the load 7 is the same as in the conventional circuit described above in FIG.

In the present invention, the original signal A for turning on and off the transistor 3 is directly input to the signal isolation circuit 15 without passing through the on-delay circuit for short circuit prevention, and is input to the base of the transistor 3 via the base current amplification circuit 20. be done. Similarly, the original signal B that causes the transistor 4 to operate in the opposite direction to that of the transistor 3 by passing through the inverting element 12 is also input directly to the signal isolation circuit 16, and is applied to the base of the transistor 4 via the base current amplification circuit 30. It has become. Further, a reverse bias voltage detector 40 is connected between the base and emitter of the transistor 3, and its output is input to the base current amplification circuit 30 for the transistor 4, and this reverse bias voltage detection signal and the original signal B command ON. A base current is supplied to the transistor 4 based on the result of the logical product operation with the result of the AND operation, and the transistor 4 is turned on. A reverse bias voltage detector 50 is also connected between the base and emitter of this transistor 4, and the AND operation of the detection signal of this and the original signal that commands the transistor 31 to turn on is performed in the base current amplification circuit 20. According to the calculation result, a base current is supplied to the transistor 31 to turn it on.

FIG. 2 is a circuit diagram showing details of the embodiment circuit shown in FIG. 1. That is, the base current amplification circuit 20 shown in FIG.
6 to 29, the reverse bias voltage detector 40 shown in FIG. Similarly, the base current amplification circuit 30 shown in FIG. Corresponding to the AND gate 35 and the resistors 36 to 39, the reverse bias voltage detector 50 shown in FIG. 1 corresponds to the constant voltage diode 51 as constant voltage operating means and the photocoupler 52 as signal insulating means in FIG.

However, although the signal isolation circuits 15 and 16 and the inverting element 12 are not shown in FIG. 2, when the original signal input to the AND gate 25 is a logic H signal or a logic low signal, the AND gate 351 The input original signal B becomes an inverted logic low signal or logic high signal.

Assuming that transistor 3 is now off and transistor 4 is on, and original signal A commands transistor 31 to turn on and original signal B commands transistor 4 to turn off, reverse bias transistor 3 is turned off according to this off command.
4 becomes conductive immediately, and a reverse bias current flows through the path of reverse bias power supply 32 → emitter of transistor 4 → base of transistor 4 → reverse bias transistor 34 → resistor 39 → reverse bias power supply 32. During the storage period until the reverse bias current t turns off the I transistor 4, no reverse voltage is applied between the base and emitter of the transistor 4, so no signal is output from the photocoupler 52. Therefore, even if the original signal input to the AND gate 25 is commanded to turn on, the AND gate 25 will output a logical signal as the result of the AND operation, and the forward bias transistor 23 will not conduct. Transistor 3 remains off.

When the transistor 4 is turned off after the storage time Tg has elapsed, a reverse bias voltage is generated between the base and emitter. When this reverse bias voltage exceeds a predetermined value, the voltage regulator diode 51 becomes conductive and Since the photocoupler 52 connected in series is turned on, the reverse bias voltage detection signal that is emitted from the photocoupler 52 is output as A.
The signal is applied to the ND gate 25. This signal causes the output of the AND gate 25 to switch from a logic low signal to a logic high signal i, thereby making the forward bias transistor 23 conductive; thereby supplying a forward bias current to the transistor 3 to turn it on. That is, since the transistor 3 turns on with almost no time delay when the transistor 4 turns off, the conventional control dead time can be reduced to almost zero. Note that the operation is the same as above when turning off the transistor 3 that is in the on state and turning on the transistor 4 at the same time, so a description thereof will be omitted.

FIG. 3 is an operation waveform diagram showing the operation of each part in the embodiment circuit shown in FIGS. 1 and 2, and FIG.
is the waveform of the original signal A, and Figure 3 (b) is the waveform of the transistor 3I.
Figure 3 shows the waveform of the applied on/off signal, Figure 3) shows the change in the collector current of transistor 3, Figure 3) shows the change in the voltage between the base and emitter of transistor 3, and
Figures (1) are the waveforms of the signals that detect the reverse bias state of transistor 3; Figures 6 (1) are the waveforms of the original signal B;
Figure 6 (g) shows the waveform of the on/off signal applied to transistor 4, Figure 6 (h) shows the change in the collector current of transistor 4, and Figure 6 (h) shows the change in the base-emitter voltage of transistor 4. Figure 6 (6) shows the waveforms of the signals for detecting the reverse bias state of the transistor 4.

In FIG. 3, original signal A gives an ON command to transistor 3, and at the same time original signal B gives an OFF command to transistor 4. This OFF command of the original signal B immediately becomes an OFF signal for the transistor 4 (see Figure 3 (G)), and a reverse bias current flows through the transistor 4. Therefore, after the storage time Tg has elapsed, the collector current of the transistor 4 becomes becomes zero (see the circle in Figure 3), and at the same time, a reverse bias voltage is created between the base and emitter (see the circle in Figure 3).
Therefore, the photocoupler 52 outputs a reverse bias state detection signal (see FIG. 3 (N)), and based on the AND result of this detection signal and the original signal, the transistor 3
An on signal is applied to the base of the transistor 3 (see FIG. 3 (see C0II)), and this transistor 3 becomes conductive, causing a collector current to flow (see FIG. 3 (see /→)).

The operation when one transistor 3 that is on is turned off and the other transistor 4 is turned on is the same as above, and in either case, the storage time required to turn off the transistor that is on is Once Tg has elapsed, the transistor on the other side can be turned on immediately, and the dead control time can be reduced to almost zero.

〔Effect of the invention〕

According to this invention, a series circuit of two transistors is connected between the positive and negative electrodes of a DC power source, and the operations of applying a bias current to the bases of these transistors to turn them on, and passing a reverse bias current to their bases to turn them off are alternately performed. By repeating the above, in a transistor converter that can supply converted AC power to a load connected to the connection point between both transistors, a reverse bias voltage detection means is separately connected between the base and emitter of each transistor. The circuit structure is such that a forward bias current for turning on one transistor is supplied on condition that the reverse bias voltage detecting means connected to the other transistor detects a reverse bias voltage.

With this kind of circuit configuration, it is possible to reliably avoid a situation in which both transistors are turned on at the same time, that is, an arm short-circuit condition, and when one transistor that is in the on state turns off after the storage time has elapsed, the other transistor immediately turns on. Since it is possible to turn on the transistor by supplying a forward bias current to the transistor, it has the great effect of almost eliminating control waste time when both transistors are in the off state.

Furthermore, the on-delay circuit for arm short circuit prevention, which requires delicate time adjustment, is no longer required, simplifying the circuit and v! 4
! It also has the effect of reducing labor and cost in step 1.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG.
This figure is a detailed circuit diagram of the embodiment circuit shown in FIG. 1, and FIG. 3 is an operation waveform diagram showing the operation of each part in the embodiment circuit shown in FIGS. 1 and 2. FIG. 4 is a main circuit connection diagram showing an example of a single-phase transistor inverter, FIG. 5 is a block diagram showing a conventional example of base signal generation to prevent arm short circuit of a transistor converter, and FIG. FIG. 3 is an operation waveform chart showing the operation of each part in the conventional circuit shown in FIG. 2...DC power supply, 3-6...Transistor, 3D-6
D... Diode, 7... Load, 12... Inverting element, 13.14... On-delay circuit for preventing arm short circuit, 15.16... Signal isolation circuit, 17. 18.
20°30... Base current amplification circuit, 21.31...
・Original bias power supply, 22.32... Reverse bias power supply,
23°33... Original bias transistor l, 24.34
...reverse bias transistor, 25. ,．． 35...
AND gate, 26-29. 36-39...resistance, 4
0.50... Reverse bias voltage detector, 41.51...
Constant voltage diode as constant voltage operating means, 42.52
...Photocoupler as a means of signal isolation. Tanshoukou RoadFigure 1Figure 3Figure 4Figure 5

Claims (1)

[Claims] 1) In order to turn the transistors on or off, two sets of transistors each having a means for supplying a forward bias current to the base and a means for supplying a reverse bias current are connected in series and a DC power source is used. In a transistor converter, which is connected between the positive and negative electrodes and performs power conversion by repeatedly turning one transistor and the other transistor on and off, both transistors have an opposite voltage applied between their base and emitter. A means for detecting a bias voltage is separately provided, and each transistor is separately provided with a means for issuing a supply command to the forward bias current supply means of the other transistor when it detects that a reverse bias voltage is applied to one transistor. An arm short-circuit prevention circuit for a transistor converter, characterized in that: 2) In the arm short-circuit prevention circuit according to claim 1, the reverse bias voltage detection means isolates the constant voltage operation means that operates when a constant voltage is applied and the operation signal of this constant voltage operation means. 1. An arm short-circuit prevention circuit for a transistor converter, characterized in that the arm short-circuit prevention circuit is comprised of a signal insulating means for outputting a signal.