JPH0613591Y2 - Instantaneous voltage drop compensator - Google Patents
Instantaneous voltage drop compensatorInfo
- Publication number
- JPH0613591Y2 JPH0613591Y2 JP13743487U JP13743487U JPH0613591Y2 JP H0613591 Y2 JPH0613591 Y2 JP H0613591Y2 JP 13743487 U JP13743487 U JP 13743487U JP 13743487 U JP13743487 U JP 13743487U JP H0613591 Y2 JPH0613591 Y2 JP H0613591Y2
- Authority
- JP
- Japan
- Prior art keywords
- voltage drop
- signal
- gate
- power supply
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Stand-By Power Supply Arrangements (AREA)
Description
【考案の詳細な説明】 ［産業上の利用分野］ 本考案は、瞬時電圧低下補償装置において、特に電圧低
下時におけるスイッチと補償用電源との切替構成につい
て改善を図ったものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention is intended to improve an instantaneous voltage drop compensating device, in particular, a switching configuration between a switch and a compensating power source when a voltage drops.
［従来技術］ 瞬時電圧低下補償装置の基本構成を第３図に示す。[Prior Art] FIG. 3 shows a basic configuration of an instantaneous voltage drop compensator.
図において１は商用電源、２は負荷、３は補償用電源を
示し、商用電源１と負荷２との間に直列に変圧器４の２
次側が接続され、その１次側に直流電源５、インバータ
６等よりなる補償用電源３が接続され、変圧器４の２次
側端子間に、例えば、逆並列接続のサイリスタ素子より
なるサイリスタスイッチ７が接続され、電源側回路に電
圧低下検出回路10が結合される。In the figure, 1 is a commercial power supply, 2 is a load, 3 is a compensating power supply, and a transformer 4 2 is connected in series between the commercial power supply 1 and the load 2.
The secondary side is connected, and the primary side thereof is connected to the DC power source 5, the compensating power source 3 including the inverter 6 and the like, and the thyristor switch including, for example, an antiparallel connection thyristor switch is provided between the secondary side terminals of the transformer 4. 7 is connected, and the voltage drop detection circuit 10 is coupled to the power supply side circuit.
商用電源電圧低下時には、変圧器短絡用のサイリスタス
イッチ７を開き、補償用電源３に切替え、補償用電権３
より電圧低下分に相当する電圧を発生する。When the commercial power supply voltage drops, the thyristor switch 7 for short-circuiting the transformer is opened and switched to the compensating power supply 3, and the compensating power supply 3
A voltage corresponding to the voltage drop is generated.
前記切替動作を制御する回路を第４図に示す。FIG. 4 shows a circuit for controlling the switching operation.
図において、電圧低下検出回路10よりの検出信号Ｈによ
り、補償用電源オン信号を発生し、サイリスタスイッチ
素子ゲートオン信号は消滅する。In the figure, the detection signal H from the voltage drop detection circuit 10 generates a compensation power-on signal, and the thyristor switch element gate-on signal disappears.
第５図において、ａは電圧低下検出信号波形、ｂはゲー
トオン信号、ｃはスイッチ素子のゲート、ｄは補償用電
源オン信号、ｅはインバータで発生のパルス電圧、ｆは
補償用電源出力電流の波形をそれぞれ示す。In FIG. 5, a is a voltage drop detection signal waveform, b is a gate-on signal, c is a gate of a switch element, d is a compensation power-on signal, e is a pulse voltage generated by an inverter, and f is a compensation power-supply output current. Waveforms are shown respectively.
常時、電圧低下が発生していない場合は、電圧低下検出
信号Ｈが発生せず、したがって補償用電源オン信号ｄは
でず、スイッチ素子ゲートオン信号ｃがでている。When the voltage drop does not occur at all times, the voltage drop detection signal H is not generated, and therefore the compensation power-on signal d is not output and the switch element gate-on signal c is output.
スイッチ素子（上記逆並列接続サイリスタ）には、電流
の断続を皆無とするため正側，負側両方にゲートオン信
号ｂが与えられている。つまり電流を流していない方の
素子にもゲートオン信号ｂが与えられている。A gate-on signal b is applied to both the positive side and the negative side of the switch element (the above-mentioned antiparallel connection thyristor) in order to make no interruption of current. That is, the gate-on signal b is also applied to the element that does not pass the current.
商用電源１で電圧低下が発生すると、電圧低下検出回路
10でこれを検出し、検出信号Ｈを発生する。これと同時
に、スイッチ素子ゲートオン信号ｂが止まるとともに、
補償用電源オン信号ｄが発生する。When a voltage drop occurs in the commercial power supply 1, a voltage drop detection circuit
This is detected at 10 and a detection signal H is generated. At the same time, the switch element gate-on signal b stops and
The compensation power-on signal d is generated.
［考案が解決しようとする問題点］ 前述のようにゲートオン信号ｂを止めても、実際にスイ
ッチ素子のゲートがオフ状態となるのにｃに示すように
数μｓの遅れがあり、オフ状態となる前に、補償用電源
３からパルス電圧を発生した場合、パルス電圧の方向は
電流が流れているスイッチ素子に逆バイアスとなる方向
であるが、逆側のスイッチ素子にとっては順バイアスと
なるので、オフ状態となる前（ゲートのＰ−Ｎ間空乏層
が回復する前）に順方向電圧がかかり、スッチ素子が導
通し、補償用電源がスイッチ素子で短絡されることにな
り、補償用電源の過電流保護手段（ｆ図図示、一定値以
上の電流でトリップ）により補償用電源が停止し、低下
分の補償動作が行なえないことがある。[Problems to be Solved by the Invention] Even if the gate-on signal b is stopped as described above, there is a delay of several μs as shown in c even though the gate of the switching element is actually in the off state. If a pulse voltage is generated from the compensating power supply 3 before that, the direction of the pulse voltage is reverse bias to the switch element in which the current is flowing, but the reverse switch element is forward bias. , A forward voltage is applied before it is turned off (before the P-N depletion layer of the gate is restored), the switch element becomes conductive, and the compensation power supply is short-circuited by the switch element. In some cases, the overcurrent protection means (shown in Fig. F, trips with a current of a certain value or more) stops the compensating power supply, and the compensating operation for the decrease cannot be performed.
［考案の構成］ 本考案は、電圧低下時に補償用電源を動作させる際、補
償用電源がスイッチ素子で短絡されないように、補償用
電源オン信号に遅れ要素を持たせたものである。この遅
れ時間はゲート信号を止めてからスイッチ素子のゲート
が完全にオフ状態となるだけの時間とする。[Configuration of the Invention] The present invention has a delay element in the compensation power-on signal so that the compensation power supply is not short-circuited by the switch element when the compensation power supply is operated when the voltage drops. This delay time is set so that the gate of the switch element is completely turned off after the gate signal is stopped.
第１図は本考案の制御回路を示す。電圧低下検出回路10
に対して補償用電源オン信号回路12とスイッチ素子ゲー
トオン信号回路13とが分岐接続されるが、補償用電源オ
ン信号回路12には、検出信号Ｈに対して例えば逆極性の
ダイオードと抵抗が並列で、抵抗出力側にコンデンサを
分岐して備える遅れ要素14が挿入接続される。FIG. 1 shows the control circuit of the present invention. Voltage drop detection circuit 10
The compensating power-on signal circuit 12 and the switch element gate-on signal circuit 13 are branched and connected to each other. Then, the delay element 14 provided by branching the capacitor on the resistance output side is inserted and connected.
電圧低下検出信号Ｈのないとき、NOT回路を接続するサ
イリスタスイッチ素子ゲートオン信号回路13よりオン信
号が出力され、このとき補償用電源オン信号回路12より
は出力信号なく、電圧低下検出信号Ｈのあるとき、スイ
ッチ素子ゲートオン信号回路13よりの出力オン信号は消
滅し、検出信号Ｈの発生より遅れ要素14により遅れ時間
Ｔ1をもって補償用電源オン信号を生ずる。When there is no voltage drop detection signal H, an ON signal is output from the thyristor switch element gate ON signal circuit 13 that connects the NOT circuit, and at this time there is no output signal from the compensating power ON signal circuit 12 and there is a voltage drop detection signal H. At this time, the output ON signal from the switch element gate ON signal circuit 13 disappears, and the compensating power ON signal is generated with the delay time T 1 due to the delay element 14 from the generation of the detection signal H.
第２図は、前記第５図と対応のａ：電圧低下検出信号、
ｂ：ゲートオン信号、ｃ：スイッチ素子のゲート、ｄ：
補償用電源オン信号、ｅ：パルス電圧、ｆ：補償用電源
出力電流の各波形図を示すが、ｃ図、ｄ図に示すよう
に、スイッチ要素ゲートオン信号を止めてからの遅れ時
間Ｔ1をスイッチ要素のゲートが完全にオフ状態となる
だけの時間Ｔ2よりも長くする。FIG. 2 shows a corresponding to FIG. 5: a voltage drop detection signal,
b: gate-on signal, c: gate of switch element, d:
Each waveform diagram of the compensation power-on signal, e: pulse voltage, f: compensation power-supply output current is shown. As shown in FIGS. C and d, the delay time T 1 after the switching element gate-on signal is stopped is shown. It is set longer than the time T 2 required for the gate of the switch element to be completely turned off.
［考案の効果］ このように補償用電源オン信号回路12に時間遅れを持た
せることによって、補償用電源からパルス電圧を発生す
るとき、スイッチ素子のゲートが完全にオフ状態となっ
ているので、パルス電圧を与えてもスイッチ素子が導通
することはなく、従ってスイッチ素子と補償用電源との
切替が正常に行なえる。[Advantage of the Invention] Since the compensation power-on signal circuit 12 is delayed in this way, when the pulse voltage is generated from the compensation power supply, the gate of the switch element is completely off. Even if a pulse voltage is applied, the switch element does not become conductive, and therefore the switch element and the compensating power supply can be normally switched.
第１図は、本考案の主要部を示す。 第２図は、本考案の各部動作説明の波形図である。 第３図は、瞬時電圧低下補償装置の基本構成説明図であ
る。 第４図は、従来の電圧低下検出回路につながる補償用電
源オン信号回路及びサイリスタスイッチゲート信号回路
説明図を示す。 第５図は、従来の瞬時電圧低下補償装置の各部動作説明
図である。 １……商用電源、２……負荷、３……補償用電源、４…
…変圧器、５……直流電源、６……インバータ、７……
サイリスタスイッチ、10……電圧低下検出回路、12……
補償用電源オン信号回路、13……サイリスタスイッチゲ
ートオン回路。FIG. 1 shows the main part of the present invention. FIG. 2 is a waveform diagram for explaining the operation of each part of the present invention. FIG. 3 is an explanatory diagram of the basic configuration of the instantaneous voltage drop compensator. FIG. 4 is an explanatory diagram of a compensation power-on signal circuit and a thyristor switch gate signal circuit connected to a conventional voltage drop detection circuit. FIG. 5 is an explanatory diagram of the operation of each part of the conventional instantaneous voltage drop compensating device. 1 ... Commercial power supply, 2 ... Load, 3 ... Compensation power supply, 4 ...
… Transformer, 5 …… DC power supply, 6 …… Inverter, 7 ……
Thyristor switch, 10 ... Voltage drop detection circuit, 12 ...
Compensation power-on signal circuit, 13 ... Thyristor switch gate-on circuit.
Claims (1)
列に接続し、前記変圧器の１次側にインバータを用いた
補償用電源を接続するとともに前記変圧器２次側端子間
に逆並列サイリスタスイッチを接続し、電圧低下を検出
して前記サイリスタスイッチを開き、前記補償用電源に
より低下した電圧分に担当の電圧を補償する回路におい
て、電圧低下検出回路に接続される補償用電源オン信号
回路にサイリスタスイッチ素子のゲートが完全にオフ状
態となるだけの時間遅れをもたせる遅れ要素を接続した
ことを特徴とする瞬時電圧低下補償装置。1. A secondary side of a transformer is connected in series between a commercial power source and a load, a compensating power source using an inverter is connected to the primary side of the transformer, and the secondary side terminal of the transformer is connected. In a circuit for connecting an anti-parallel thyristor switch in between, detecting the voltage drop, opening the thyristor switch, and compensating the voltage in charge for the voltage reduced by the compensation power supply, the compensation connected to the voltage drop detection circuit. An instantaneous voltage drop compensating device characterized in that a delay element for delaying the time for the gate of the thyristor switch element to be completely turned off is connected to the power-on signal circuit for power supply.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13743487U JPH0613591Y2 (en) | 1987-09-08 | 1987-09-08 | Instantaneous voltage drop compensator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13743487U JPH0613591Y2 (en) | 1987-09-08 | 1987-09-08 | Instantaneous voltage drop compensator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6445449U JPS6445449U (en) | 1989-03-20 |
| JPH0613591Y2 true JPH0613591Y2 (en) | 1994-04-06 |
Family
ID=31398852
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13743487U Expired - Lifetime JPH0613591Y2 (en) | 1987-09-08 | 1987-09-08 | Instantaneous voltage drop compensator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0613591Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07106032B2 (en) * | 1987-12-21 | 1995-11-13 | 日新電機株式会社 | Series compensation type voltage fluctuation compensator |
-
1987
- 1987-09-08 JP JP13743487U patent/JPH0613591Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6445449U (en) | 1989-03-20 |
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