JPH0983319A - Superconducting delay element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a superconducting delay element which can easily set the delay time with high controllability and also can flexibly correct the margin against the variance of the circuit parameter value. SOLUTION: A superconducting switch 104 is driven by an AC power supply, and a control input line 141 applies a control current to control the lowest power current level that is needed for switching a superconducting state to a voltage state. Then the delay time when the power current of the switch 104 reaches a specific level and then an output signal is outputted after the power current is set at the lowest level is set by the control current. Therefore, a switching phase can easily be set against the power current of a stable waveform. In addition, the designing of a circuit is facilitated compared with a fast clock signal owing to the DC control current, and an optimum control current can be set according to the variance of element characteristic of a produced circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a superconducting digital circuit using a Josephson element, and more particularly to a superconducting logic circuit element which operates at a very high speed.

[0002]

2. Description of the Related Art Josephson devices have been researched for application to ultra-high speed switching circuits having a clock frequency of several GHz due to switching delay characteristics of picoseconds and power consumption of μW. A switching circuit composed of Josephson junctions with hysteresis has the property of latching to that state when switched to a voltage state, and the AC power source must be reset by turning it off once before the next operation. I need. This AC power supply can also serve as a clock.

In digital circuit applications, it is often necessary to locally synchronize a phase different from that of the clock signal, or insert a delay time to control the time when the switch starts to operate. In the conventional technology, it is necessary to newly introduce another clock signal.

For example, a negative logic circuit called a timed inverter uses the delay function as described above. Since it is difficult to reset the latch type Josephson element from the voltage state to the superconducting state only with the input signal,
In the negative operation to 1 ', a method of outputting the default current in advance is used. When the input signal is '0', the negative operation element is not switched, the default current is transmitted as it is, and the element of the next stage is switched. When the input signal is "1", the negative operation element is switched and the output current is drastically reduced to output only a small amount. Therefore, the element of the next stage is not switched. Until the negative operation ends, it is necessary to delay the power supply current of the output element so that the element in the next stage (output element) that inputs the output signal of the negative operation does not switch with the default current. In the prior art, a means has been used in which a delay element is inserted in series in the power supply line of the output element, the delay element is switched by another clock signal delayed from the phase of the power supply, and the power supply current is supplied to the output element.

The timed inverter described above is
For example, it is written on pages 88 to 89 of "Ultra High Speed Josephson Device" edited by Takao Sugano and edited by Nao Hayakawa, and is well known in this research field. FIG. 9 is a schematic circuit diagram of a conventional timed inverter. The superconducting switch 201 is a negative operation element. First, when the power supply current is supplied, the power supply current flows through the superconducting switch 201, the superconducting switch 202 and the superconducting switch 203. The shunt resistor 117a is set to have a resistance value sufficiently smaller than that of the shunt resistor 117b so that the superconducting switch 203 cannot operate with the power supply current supplied in this state. Then, even if a large input current flows through superconducting switch 201, superconducting switch 203
Does not switch. When the input A is "0", the superconducting switch 201 does not switch. At that time, when the superconducting switch 202 switches at the input of the clock signal T, the power supply current flowing through it is diverted to the power supply current of the superconducting switch 203, and the superconducting switch 203 switches and outputs the signal "1". When the input A is "1", the superconducting switch 201 switches and the current input to the superconducting switch 203 is drastically reduced. At that time, even if the superconducting switch 202 is switched by the input of the clock signal T, the superconducting switch 203 is not switched and the signal “0” is output.
Is output.

[0006]

It is extremely difficult to accurately introduce another clock signal into a phase different from the power supply current as in the conventional timed inverter at an operating frequency on the order of several GHz, and the maximum frequency is limited. And margin reduction.

[0007]

In order to solve the above problems, the present invention proposes a delay element in which a DC control current is input from a control input line and is switched at the rise of the power supply current.

For example, a delay element which is composed of a first superconducting switch provided with a first control input line and which can set a minimum power supply current level to be switched depending on the magnitude of a control current flowing through the first control input line can be considered. In the delay element, the first superconducting switch comprises a parallel circuit of a first Josephson junction and a first load resistor, and the first control input line has the parallel circuit so that a control current can be injected into the first Josephson junction. The structure connected with. The first superconducting switch may have a structure in which a first Josephson interference element and a first load resistor are connected in parallel, and the first control input line is magnetically coupled to the first Josephson interference element. it can.

In the delay element, the first superconducting switch comprises a parallel circuit constituted by connecting a series circuit of a first shunt resistance and a first Josephson junction in parallel with a first load resistance, and the first control circuit. The input line may be connected to the parallel circuit so that a control current can be injected to the contact point of the first shunt resistor and the first Josephson junction. The first superconducting switch may be a parallel circuit configured by connecting a series circuit of a first shunt resistance and a first Josephson interference element in parallel with a first load resistance, and the first control input line may be the first control input line. The structure may be magnetically coupled to one Josephson interference element.

A basic superconducting circuit using the delay element is considered to be a superconducting switch with delay having a structure in which the power source terminal of the second superconducting switch is connected to the tip of the first load resistor. When used for a negative logic gate, the structure is such that the input terminal of the second superconducting switch is connected to the ground terminal of the third superconducting switch. An output terminal of the third superconducting switch is connected to a first shunt resistor which is grounded.

[0011]

When operating at a high frequency of several GHz, it is difficult to send a well-shaped rectangular wave into the chip from the external oscillator, and the waveform is rounded to a shape close to a sine wave.
Therefore, the rise time of the power supply current is long. The delay element proposed by the present invention uses this in reverse. An element which switches with a larger minimum operating power supply current than a general element operates with a delay due to a difference in time when the power supply current reaches each minimum operating power supply level. By using this phenomenon, if the minimum operating power supply level of the delay element is set by the magnitude of the control current, the delay time from the switching of the general element to the switching of the delay element can be set with good controllability.

If the control current is designed so that it can be set from the outside, the delay time can be changed according to the variations in the element characteristics of the circuits created.

In one embodiment of the present invention which constitutes a delay element including a Josephson junction, a circuit including the Josephson junction is connected to a wiring through which a power supply current flows between the wiring (power supply line) and the ground potential. To do. Further, a control current input line and an output line are connected between the power supply line connecting portion and the Josephson junction portion of this circuit. Current flows from the power supply line and the control current input line to the Josephson junction and the output line, but when the Josephson junction is in the superconducting state (that is, when the current is below the critical current value of the Josephson junction). ), Most of the current flows through the Josephson junction to ground potential. However, the current from the power supply line and the control current input line exceeds this critical current value (the Josephson junction becomes a voltage state).
Then, the current also flows to the output line. Therefore, by adjusting the relationship between the current from the power supply line and the current from the control input line, ON / OFF of the current supply (that is, signal output) to the output line is determined. When the power supply line supplies alternating current or pulsed current and the control current input line supplies direct current,
In the process of rising current, the Josephson junction shifts from the superconducting state to the voltage state. Therefore, in such a delay element, the critical time of the Josephson junction is set as the minimum operating current, and the delay time is set by the rise of the power supply current. That is, the present invention is characterized in that the power supply current itself plays the role of the conventional clock power supply.

[0014]

FIG. 1 shows a first embodiment of the present invention. FIG. 1a is a schematic circuit diagram thereof. The superconducting switch 104 has a control input line 141. The power supply current is supplied from the power supply bus 121 through the power supply resistance 111. The relationship between the power supply current and the control current can be represented by the typical threshold characteristic of FIG. 1b. Im is a critical current in a non-input state, and when the input Ic is applied, it switches to a voltage state with a power supply current Ig depending on the input Ic, which is lower than Im. A feature of the present invention is that a control current is first applied to the superconducting switch 104 at Ic and then a power supply current is applied. When the rising power supply current reaches Ig, superconducting switch 104 switches to the voltage state. Since Ig can be changed by the set value of Ic, if the waveform of the power supply current is stable, the phase for switching to the power supply with good controllability can be set. This delay circuit is used to send out a signal after a predetermined delay time from the time when the power is turned on.

FIG. 2 is a schematic circuit diagram of the second embodiment of the present invention. The other end of the Josephson junction 151, which is grounded, is connected to the power supply resistance 111, the load resistance 116a, and the control input line 141. First, the control input Ic is injected from the control input line 141. When the power supply current Ig is applied and the total of the control input Ic and the power supply current Ig becomes larger than the critical current Im of the Josephson junction 151, the superconducting switch 104 switches to the voltage state. Load resistance 1 having a resistance value several times smaller than the equivalent resistance of the superconducting switch 104 in the voltage state
If the tip of 16a is grounded, most of the power supply current is output as an output current through the load resistor 116a.

FIG. 3 is a schematic circuit diagram of the third embodiment of the present invention. The circuit is similar to that of the second embodiment, and the magnetic flux input type Josephson element 102 which is grounded is used instead of the Josephson junction 151. The magnetic flux input type Josephson element includes a two-junction Josephson interferometer as shown in FIG. 4a or a three-junction Josephson interferometer as shown in FIG. 4b.
Typical threshold curves for each are shown in Figures 5a and 5b. Details of these Josephson interferometers are described on pages 77 to 88 of "Ultra-high-speed Josephson device" edited by Takao Sugano and edited by Nao Hayakawa. FIG. 3 according to the present invention
The operation of the superconducting circuit is as follows. First, the control input Ic is injected from the control input line 141 to apply a magnetic flux to the Josephson interferometer. Then, the power supply current Ig is applied, and when the state exceeds the threshold curve, the superconducting switch 104 switches to the voltage state. Load resistance 116 with sufficiently small resistance value
If the tip of a is grounded, most of the power supply current is output as an output current through the load resistor 116a.

FIG. 6 is a schematic circuit diagram of the fourth embodiment of the present invention. The power supply terminal of the superconducting switch 101 is connected to the tip of the load resistor 116a of the same superconducting circuit as in FIG. If the Josephson junction 151 does not switch, the power supply current does not flow in the superconducting switch 101. Even if an input is applied to the input terminal 131, there is no output at the output terminal 132. By controlling the switching time of the Josephson junction 151, the switching time of the superconducting switch 101 can be controlled. When the Josephson junction 151 is switched when the current value obtained by adding the increasing power supply current and the control current reaches a critical current, the superconducting switch 101 is supplied with the power supply current and becomes the first switchable state.

FIG. 7 is a schematic circuit diagram of the fifth embodiment of the present invention. The circuit is similar to that of the sixth embodiment, and the Josephson junction 151, which is grounded, is connected in series with the shunt resistor 116b. The other end of the shunt resistor 116b is connected to the power supply resistor 111 and the load resistor 116a. The control input line 141 is connected to the contacts of the Josephson junction 151 and the shunt resistance 116b. The power supply terminal of the superconducting switch 101 is connected to the tip of the load resistor 116a. The operation of this circuit is as follows. First, the control input Ic is injected from the control input line 141. When the power supply current Ig 'flows from the power supply bus 121, the shunt resistance 116b and the load resistance 1
The power supply current is distributed to 16a. If there is no input, even if the Josephson junction 151 switches, the superconducting switch 10
The resistance values of the shunt resistor 116b and the load resistor 116a are set so that 1 does not switch. Further, the control current value is set so that the superconducting switch 101 does not switch until the Josephson junction 151 switches and the state stabilizes. If a small amount of power supply current is supplied to the superconducting switch 101 before the Josephson junction 151 switches as described above, the switching time of the superconducting switch 101 is shortened. It can be seen from the description of the third embodiment that similar operation can be obtained by using a Josephson interference element instead of the Josephson junction 151.

FIG. 8 is a schematic circuit diagram of the sixth embodiment of the present invention. The sixth embodiment is a negative logic operation circuit using the circuit of the fourth embodiment. The power supply terminal of the superconducting switch 103 is a power supply resistor 112, and the ground terminal is the superconducting switch 10
1 is connected to the input terminal. Shunt resistor 11 grounded at the contact point between the superconducting switch 103 and the power supply resistor 112
5 is connected. First, power supply current is started to be supplied from the power supply bus 121. Superconducting switch 10 in superconducting state
The current passing through 3 is applied to the input terminal of the superconducting switch 101. At this time, since the power supply current is not yet supplied to the superconducting switch 101, the superconducting switch 101 does not switch with the input current. Negative logic operation makes input signal from "0" to "
When it is inverted to 1 ', the superconducting switch 103 does not switch because the input signal is'0' and is always in the superconducting state. When the Josephson junction 151 switches with the increasing power supply current, the superconducting switch 101 is supplied with the power supply current and switches. If the negative logic operation inverts the input signal from '1' to '0', the superconducting switch 103 switches to the voltage state when the input signal '1' is applied. Most of the power supply current flowing through the superconducting switch 103 is diverted to the shunt resistor 115, and the current flowing through the superconducting switch 103 to the input of the superconducting switch 101 is drastically reduced. The increasing power supply current switches the Josephson junction 151, and the superconducting switch 101 does not switch even when the power supply current is supplied.

In the Josephson junction and the superconducting switch using the same, the threshold characteristics fluctuate due to variations in the manufacturing process, and the switching time fluctuates. Therefore, it is necessary to provide a large input margin at the time of design. Therefore, the margin for power supply fluctuation is reduced. However, when variations in element characteristics are small due to the actual circuit performance, stable and normal operation may be obtained even with a narrower input margin. In the circuit of the present invention, the input margin can be changed by designing the DC control current to be adjusted from the outside, so that the extra input margin can be replaced with the power supply margin.

[0021]

In the superconducting circuit proposed by the present invention, the delay time can be set by a simple method with good controllability. When applied to a negative logic circuit, the delay time can be flexibly corrected against variations in circuit parameters, and the margin can be used most effectively.

[Brief description of drawings]

FIG. 1 is a diagram showing (a) a schematic circuit and (b) representative threshold characteristics of a superconducting switch according to a first embodiment of the present invention.

FIG. 2 shows a schematic circuit diagram of a second embodiment of the present invention.

FIG. 3 shows a schematic circuit diagram of a third embodiment of the present invention.

4A and 4B show a schematic circuit diagram of a two-junction Josephson interferometer and a schematic circuit diagram of a three-junction Josephson interferometer, respectively, regarding the configuration of the Josephson interferometer.

FIG. 5 is a graph showing a threshold characteristic of a Josephson interferometer,
It is a figure which shows the threshold characteristic of a 2-junction Josephson interferometer, and (b) respectively shows the threshold characteristic of a 3-junction Josephson interferometer.

FIG. 6 shows a schematic circuit diagram of a fourth embodiment of the present invention.

FIG. 7 shows a schematic circuit diagram of a fifth embodiment of the present invention.

FIG. 8 shows a schematic circuit diagram of a sixth embodiment of the present invention.

FIG. 9 shows a schematic circuit diagram of a conventional timed inverter.

[Explanation of symbols]

101, 102, 103 ... Superconducting switch, 104 ... Delay element, 111, 112, 113 ... Power supply resistance, 11
4, 116a ... Load resistance 115 ... Shunt resistance, 116
b, 117a, 117b ... Shunt resistance, 121, 122 ...
Power bus, 131 ... Input terminal, 132 ... Output terminal, 13
3 ... Control input terminal, 141 ... Control input line, 151 ... Josephson junction, 201, 202, 203 ... Superconducting switch.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shinya Konan 1-280 Higashi Koikekubo, Kokubunji, Tokyo Inside Central Research Laboratory, Hitachi, Ltd. (72) Toshikazu Nishino 1-280 Higashi Koikeku, Kokubunji, Tokyo Hitachi Ltd. Central Research Center

Claims (7)

[Claims] 1. A first superconducting switch driven by an AC power source, wherein the first superconducting switch controls a minimum power supply current level for switching from a superconducting state to a voltage state by applying a control current. A control input line is provided, and the power supply current of the first superconducting switch is the first
A superconducting delay element, wherein a delay time from when the power supply current level is reached to when the power supply current reaches the minimum power supply current level and an output signal is output is set by the control current. 2. The first superconducting switch according to claim 1, wherein the first superconducting switch has a first parallel circuit in which a first Josephson junction and a first load resistor are connected in parallel, and the first control input line is the first parallel circuit. A superconducting delay element having a structure in which the first parallel circuit is connected so that the control current can be injected into one Josephson junction. 3. The first superconducting switch according to claim 1, wherein the first superconducting switch has a second parallel circuit in which a first Josephson interference element and a first load resistor are connected in parallel, and the first control input line is the same. A superconducting delay element having a structure magnetically coupled to a first Josephson interference element. 4. The first superconducting switch according to claim 1, further comprising a third parallel circuit in which a series circuit of a first shunt resistance and a first Josephson junction is connected in parallel with a first load resistance, A first control input line is connected to the first shunt resistor and the first shunt resistor.
A superconducting delay element, which is connected to a contact of a Josephson junction and has a structure capable of injecting the control current into the first Josephson junction. 5. The first superconducting switch according to claim 1, further comprising a fourth parallel circuit in which a series circuit of a first shunt resistance and a first Josephson interference element is connected in parallel with a first load resistance, A superconducting delay element having a structure in which the first control input line is magnetically coupled to the first Josephson interference element. 6. A first superconducting delay circuit according to claim 2, claim 3, claim 4, or claim 5, comprising a second superconducting switch.
A superconducting element having a structure in which a tip of a load resistor and a power supply terminal of the second superconducting switch are connected. 7. The superconducting circuit according to claim 6, wherein the first shunt resistor grounded and the first shunt resistor are connected to the output terminal, and the ground terminal is connected to the input terminal of the second superconducting switch. A superconducting device having a second Josephson interference device.