JPH0295238U - - Google Patents

Info

Publication number
JPH0295238U
JPH0295238U JP398489U JP398489U JPH0295238U JP H0295238 U JPH0295238 U JP H0295238U JP 398489 U JP398489 U JP 398489U JP 398489 U JP398489 U JP 398489U JP H0295238 U JPH0295238 U JP H0295238U
Authority
JP
Japan
Prior art keywords
semiconductor device
die
top surface
processing mold
lead processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP398489U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP398489U priority Critical patent/JPH0295238U/ja
Publication of JPH0295238U publication Critical patent/JPH0295238U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の一実施例を示す断面図、第
2図は、その動作状態を示す断面図、第3図は従
来装置を示す断面図、第4図はその動作状態を示
す断面図である。 図中、40はダイスペーサ、40aは平面部、
40bはテーパ部である。なお図中、同一符号は
同一、又は相当部分を示す。
Fig. 1 is a sectional view showing an embodiment of this invention, Fig. 2 is a sectional view showing its operating state, Fig. 3 is a sectional view showing a conventional device, and Fig. 4 is a sectional view showing its operating state. It is. In the figure, 40 is a die spacer, 40a is a flat part,
40b is a tapered portion. In the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 切断ダイの間に配置され、この切断ダイを位置
決めするダイスペーサを有する半導体装置用リー
ド加工金型において、ダイスペーサの上面を、パ
ツケージ下面に近接させて平面状に構成すると共
に、上記上面の両側を下面方向へテーパ状に構成
したことを特徴とする半導体装置用リード加工金
型。
In a semiconductor device lead processing mold having a die spacer placed between cutting dies and for positioning the cutting die, the die spacer has a top surface close to the bottom surface of the package and configured in a flat shape, and both sides of the top surface are arranged as a bottom surface. A lead processing mold for a semiconductor device characterized by having a tapered shape in the direction.
JP398489U 1989-01-18 1989-01-18 Pending JPH0295238U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP398489U JPH0295238U (en) 1989-01-18 1989-01-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP398489U JPH0295238U (en) 1989-01-18 1989-01-18

Publications (1)

Publication Number Publication Date
JPH0295238U true JPH0295238U (en) 1990-07-30

Family

ID=31206100

Family Applications (1)

Application Number Title Priority Date Filing Date
JP398489U Pending JPH0295238U (en) 1989-01-18 1989-01-18

Country Status (1)

Country Link
JP (1) JPH0295238U (en)

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