JPH0287667A - Manufacture of thin film transistor matrix - Google Patents

Abstract

PURPOSE:To prevent short circuits between each picture element electrode and drain bus-line and improve the quality of an active matrix type liquid crystal display and the like as well as manufacturing yield rate by leaving a part of the material layer of a channel protective film between the picture element electrode and the drain bus-line as a short circuit prevention protective film when a pattern is formed with a self-alignment process. CONSTITUTION:Firstly a mask exposure is performed on an image reversal photoresist film at the middle of each region in which each picture element electrode E and a drain bus-line 9 are to be formed and then, reversal baking is performed. After rear exposure is performed and a part other than a directly upper part of a gate electrode G of the image reversal photoresist film is exposed, development treatment is performed and then, a resist film 21 is formed at the directly upper part of the gate electrode G and the other resist film 22 is formed at the middle between picture element electrode formation and drain bus-line formation regions. An exposure part of a protective film material layer 4 is removed by using two resist films 21 and 22 as masks. A channel protective film 4' and a protective film 4'' for preventing short circuits are thus formed.

Description

[Detailed Description of the Invention] [Summary] To reduce point defects in a thin film transistor matrix without complicating the manufacturing process, regarding a method for manufacturing a thin film transistor matrix, particularly a method for preventing short circuits between a drain bus line and a pixel electrode. After forming a gate electrode, a gate insulating film, and an active semiconductor layer in order on a transparent insulating substrate, a material layer for a channel protective film was formed in the next step of forming a channel protective film. After that, an image reversal photoresist film is formed thereon, mask exposure is performed on this resist film between the pixel electrode formation region and the drain bus line formation region, and then reversal baking is performed. After making the exposed area in the mask exposure insoluble in the developer, back exposure is performed using the gate electrode as a mask to expose a region of the image reversal photoresist film other than directly above the gate electrode, and then developed. A process is carried out to leave the exposed area in the mask exposure as a resist film and the area directly above the gate electrode as a resist film, and etching is performed using the resist film as a mask to form the channel protective film and resist film directly under the resist film. A protective film for preventing short circuits is formed immediately below, and then an electrode layer is formed. After that, the resist film is removed, and an unnecessary part of the electrode layer that is attached on top of the resist film is lifted off, and then the device is separated. Step 1: A pixel electrode forming step is performed.

[Industrial application field]

The present invention relates to a method for manufacturing a thin film transistor matrix, and more particularly to a method for preventing short circuits between drain bus lines and pixel electrodes.

In recent years, thin film transistor matrices are increasingly being used for information processing terminal equipment.

When used as an information processing terminal device, even if there is a single point defect, there is a risk that it will be read as incorrect information. Therefore, there is a strong demand for a method for manufacturing a thin film transistor matrix that does not generate point defects.

[Conventional technology]

The reason why a short circuit occurs between the drain bus line and the pixel electrode in the conventional thin film transistor matrix manufacturing method will be explained with reference to FIGS. 3 and 4(a) to (1). Third
Figures (a) to (1) are views showing a section taken along line A-A and a line taken along line B-B in Fig. 2.

First, a first electrode G is formed on a glass substrate 1, and a gate insulating film 2.
Operating semiconductor layer 3. A channel protective film 4 is formed.
[See (a) and (a) in the same figure] Next, back exposure is performed to form a resist film 5 that is self-aligned to the gate electrode G.
is formed, and using this as a mask, the channel protective film 4 is etched.

[See figure (b) and (h)]

After forming the electrode layer 6 by laminating the contact layer and the conductive film, lift-off is performed to remove unnecessary portions of the electrode layer 6.

[See Figures (c) and (i)] A resist film 7 for element isolation is formed on the remaining electrode layer 6.

In this step, if foreign matter adheres to or mixes into the resist film 7, an abnormal part of the pattern as shown by reference numeral 8, which causes the aforementioned point defects, is generated. [Same figure (d
), (j)] Then, using this resist film 7 as a mask, the electrode layer 6 is patterned, and the source electrode S
In addition to forming a drain electrode layer, a drain bus line 9 is also formed. If it is assumed here that there is an abnormal pattern part 8 in the resist film 7 due to foreign matter, the pattern of the electrode layer 6 will also be abnormal.

[See figures (e) and (k)]

3 and 4) show an example in which a protrusion 10 is formed on the drain bus line 9 due to this pattern abnormality.

Note that the pattern in this step will be hereinafter referred to as a drain pattern for ease of explanation.

Next, a transparent conductive film is formed and patterned to form a pixel electrode E connected to the source electrode S. However, since the distance between the adjacent drain lot line 9 and the pixel electrode E is very narrow, If such a protrusion 10 exists, the pixel electrode E and the protrusion 10 protruding from the drain bus line 9 will be connected to each other as shown, resulting in a short circuit between the two. [Figure (f),
(1)] Due to this short circuit, the corresponding pixel electrode E and the drain lot line 9 are short-circuited, and the pixel formed by that pixel electrode has a display defect, and it becomes a point when viewed from the entire matrix display section (display screen). produce defects.

[Problem to be solved by the invention]

As described above, in the conventional forming method, if foreign matter gets into the resist film 7 during drain pattern formation, the pixel electrode E and the drain electrode easily short-circuit, resulting in point defects on the display screen.

The present invention aims to reduce point defects in a thin film transistor matrix without complicating the manufacturing process.

[Means to solve the problem]

FIG. 1 is a diagram explaining the principle of the present invention, and the same figure is a plan view showing the configuration of one pixel.

In the present invention, a gate electrode G is formed on a transparent insulating substrate 1, and a gate insulating film 2. An active semiconductor layer 3 and a channel protective film material layer (hereinafter referred to as a protective film material layer) 4 are laminated. Thereafter, the protective film material N4 is patterned as follows.

For this patterning, an image reversal photoresist film is used, and first, a predetermined area between the drain bus line 9 and the area where the pixel electrode E is to be formed, as shown by the symbol 4 in the diagram, is formed on the resist film. After exposing the exposed area to light and performing reversal baking to make the exposed area insoluble in a developer, back exposure is performed using the gate electrode G as a mask, and then development is performed to form a resist film that is aligned with the gate electrode G. 21, a resist film 22 is also formed between the pixel electrode E and drain bus line 9 forming regions.

Using these resist films 5 as masks, the exposed portions of the protective film material N4 are removed. As a result, the channel protection film 4' is formed directly above the gate electrode G, and between the region where the pixel electrode E is to be formed and the region where the drain bus line 9 is to be formed.
A protective film 4'' for preventing short circuits is formed on both sides.

Thereafter, formation of a drain electrode film, lift-off, and formation of an element isolation 1 pixel electrode are performed according to the usual manufacturing process.

Note that the interlayer insulating film 31 shown in the figure will be described later.

[For production]

Even if a pattern abnormality occurs in the resist film during element isolation due to the contamination of foreign matter as described above, and a protrusion 10 is formed on the drain bus line 9 due to this, the protrusion 10 is removed from the previous process. Protective film for short circuit prevention formed by 4°
Since they are completely separated by .degree., there is no electrical continuity between the right and left sides of the protrusion 10 that sandwich the protective film 4'. Therefore, even if the pixel electrode E overlaps a part of the protrusion 10, there will be no short circuit with the adjacent drain bus line 9.
Therefore, point defects on the display screen do not occur.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

2(a) to 2(1) are sectional views of main parts of the above-mentioned embodiment in the order of manufacturing steps, and FIGS. 2(a) to 2(f) are sectional views taken from A--A in FIG.
A plane as seen by arrow A, and (8) to (1) show planes as seen in arrow B-B.

[See FIGS. 2(a) and (g)] On the transparent insulating substrate 1, for example, the glass substrate 1, about 80 nm thick
A gate electrode G made of a Ti film with a thickness of Further, a 5 in 2 film (hereinafter referred to as a protective film material layer) 4 of a channel protective film material is formed to a thickness of approximately 1100 nm.

[See Figures 2(b) and (h)] Next, using an image reversal photoresist film,
A self-alignment method using the gate electrode G as a mask, that is, back exposure is performed to self-align the protective film material layer 4 with the gate electrode G (patterning is performed, but in this embodiment, prior to this, pixel A resist film 22 is formed between the region where the electrode E is formed and the region where the drain bus line 9 is formed.

The image reversal photoresist film is first subjected to mask exposure in the middle of each region where the pixel electrode E and drain bus line 9 are to be formed, and then reversal baking is performed. As a result, the exposed area in the mask exposure becomes insoluble in the developer, and this property does not change by subsequent exposure processing.

Next, back exposure is performed to expose a portion of the image reversal photoresist film other than directly above the gate electrode G, and then a development process is performed to form a resist film 211, a pixel electrode formation area, and a drain bus line directly above the gate electrode G. A resist film 22 is formed in the middle of the region.

Using these two resist films 21 and 22 as masks, the exposed portion of the protective film material layer 4 is removed. As a result, a channel protective film 4'' similar to the conventional example is placed directly above the gate electrode G, and a protective film 4'' for short-circuit prevention of the present invention is placed between the pixel electrode formation region and the drain bus line 9 formation region. It is formed.

[See FIGS. 2(c) and (i)] With the resist films 21 and 22 left in place, an n''aSi film with a thickness of about 30 nm as an ohmic contact layer and a Ti film with a thickness of about 1100 nm as a conductive film are laminated. A film (hereinafter referred to as electrode layer 6) is formed and lift-off is performed.

The electrode layer 6 formed here is similar to the channel protective film 4″
and a protective film 4'' for short circuit prevention.

[See FIGS. 2(d) and (j)] Next, a resist film 7 for element isolation is formed. If foreign matter enters the resist film 7 during this step, an abnormal pattern portion 8 will be formed as shown in the figure.

[See FIGS. 2(e) and 2(k)] Using the resist film 7 as a mask, the electrode layer 6 is etched to separate the elements, and a source electrode S, a drain electrode, and a drain bus line 9 are formed. do.

In this step, immediately below the abnormal part 8 of the pattern,
A protrusion 10 extending from the drain bus line 9 is formed.

Even if this protrusion 10 is formed, in this embodiment, the end of the protrusion 10 and the drain bus line 9 are separated by the short-circuit prevention protective film 4'', and there is no electrical continuity.

[See Figure 2, (])] Next, an ITO film that will become the pixel electrode E is formed to a thickness of about 200 nm, and this is patterned.

Even if a part of the pixel electrode E formed here overlaps the end of the protrusion 10, there is no conduction between the end of the protrusion 10 and the drain bus line 9 as described above, so the pixel electrode There is no conduction between the electrode E and the drain bus line 9.

As described above, when a thin film transistor is manufactured according to this embodiment, even if foreign matter is mixed into the resist film, which is a mask for the element isolation process, and as a result, a pattern protrusion 10 is formed on the drain bus line 9, the pixel There is no short circuit between the electrode E and the drain bus line 9.

Note that the present inventors previously proposed in Japanese Patent Application No. 1982-230082 that a part of the channel protective film remains as the interlayer insulating film 31 interposed between the gate pass line 30 and the drain bus line 9. We proposed a method for manufacturing thin film transistor matrices.

In this manufacturing method, an image reversal photoresist film is formed on the channel protective film material layer 4, and the interlayer insulating film 30 formation region is first exposed to light using a mask, and then reversal baking is performed. After making the exposed area insoluble in the developer, back exposure is performed.

In the patterning process of the channel protection film material layer 4, which is the main part of the present invention, the process of forming the resist film 22 by exposing between the pixel electrode formation region and the drain bus line formation region is performed by forming the resist film 22 on the interlayer insulating film 31. By only partially changing the pattern of the photomask used in the step of exposing the formation region, both can be exposed at the same time. Therefore, in this case, there is no need to make any changes to the manufacturing process and operations.

〔Effect of the invention〕

As explained above, according to the present invention, when forming a pattern by the self-alignment method, by leaving a part of the material layer of the channel protective film between the pixel electrode and the drain bus line as a short-circuit prevention protective film, the pixel electrode Short circuits between drain bus lines can be prevented, and the quality and manufacturing yield of active matrix liquid crystal display devices and the like can be improved.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of the principle of the present invention. FIGS. 2(a) to (1) are explanatory diagrams of an embodiment of the present invention. FIG. 3 is a diagram showing the configuration of a conventional thin film transistor matrix. FIG. 4(a) -(1) are explanatory diagrams of a conventional thin film transistor manufacturing method. In the figure, 1 is a transparent insulating substrate (glass substrate), 2 is a gate insulating film (SiN film), and 3 is an active semiconductor layer (a-3
i film, 4 is a channel protective film material layer, 4° is a channel protective film, 4'' is a short circuit prevention protective film, 6 is a drain electrode layer,
7 is a resist film, 8 is an abnormal part of the pattern, 9 is a drain bus line, 10 is a tentative drawing of the Ugar investigation example in Figure 2, Style F4 change I-RA>shi'°77ha
1Figure 3

Claims (1)

[Claims] After forming a gate electrode (G), a gate insulating film (2), and an active semiconductor layer (3) in this order on a transparent insulating substrate (1), a next channel protective film (4) is formed. In the process of forming
After forming the channel protective film material layer (4), an image reversal photoresist film is formed on it, and the pixel electrode (E) formation area and the drain bus line (9) are formed on this resist film. Mask exposure is performed between the formation area, and then reversal baking is performed to make the exposed area in the mask exposure insoluble in a developer, and then back exposure is performed using the gate electrode (G) as a mask. Then, a region of the image reversal photoresist film other than directly above the gate electrode (G) is exposed, and a development process is performed to convert the exposed area in the mask exposure into a resist film (22).
, leave the area directly above the gate electrode as a resist film (21), and perform etching using the resist film (21, 22) as a mask to form the channel protection film (4') and the resist film directly under the resist film (21). A protective film (4″, 4′) for short circuit prevention is formed directly under the resist film (22), and then an electrode layer (6) is formed, and then the resist film (22) is formed.
1, 22) and a step of lifting off unnecessary parts of the electrode layer (6) attached thereon, followed by an element isolation step and a pixel electrode (E) forming step. Method of manufacturing matrix.