JPH027476Y2 - - Google Patents
Info
- Publication number
- JPH027476Y2 JPH027476Y2 JP1984145253U JP14525384U JPH027476Y2 JP H027476 Y2 JPH027476 Y2 JP H027476Y2 JP 1984145253 U JP1984145253 U JP 1984145253U JP 14525384 U JP14525384 U JP 14525384U JP H027476 Y2 JPH027476 Y2 JP H027476Y2
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- groove
- conductor pattern
- pattern
- check
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004020 conductor Substances 0.000 claims description 13
- 238000001514 detection method Methods 0.000 description 4
- 238000007689 inspection Methods 0.000 description 4
- 238000003754 machining Methods 0.000 description 4
- 238000011179 visual inspection Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000012937 correction Methods 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Landscapes
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Structure Of Printed Boards (AREA)
Description
【考案の詳細な説明】
(技術分野)
本考案は印刷配線板にかかわり、とくに印刷配
線板(以後、配線板と略称)の実装後の分割に必
要なV溝が正常に加工されていることを電気的に
容易な検出ができる配線板に関する。[Detailed description of the invention] (Technical field) The present invention relates to printed wiring boards, and in particular, the invention relates to printed wiring boards (hereinafter referred to as wiring boards) in which V-grooves necessary for dividing the printed wiring board (hereinafter abbreviated as wiring boards) are properly processed. This invention relates to a wiring board that can be electrically easily detected.
(従来技術)
一般に電気部品の自動実装の効率化を図るため
連接的に集合化して編集された従来例の編集配線
板10は第1図に示めす如く個々の配線板1毎に
導体パターン1aをそれぞれ形成したものを連続
的に接続編集し、自動実装に必要な基準孔を設け
る余白部2を設けて電気部品の実装後の個々の配
線板に分割するに必要なV溝をV溝加工線3上に
施した構成であつた。このためV溝の加工洩れを
生じたときの検出およびV溝加工表裏面の位置ズ
レが生じた時の不良個所の検出を目視手段の検出
に頼るしかなかつた。したがつてこれらの従来検
出手段では検出洩れが生じ易く、また不良個所は
電気部品実装後の個々の配線板に分割する段階に
発見されることが多く、修正を加えることが不可
能な場合には、実装部品を含めて配線板を廃棄す
ることになる。(Prior Art) Generally, in order to improve the efficiency of automatic mounting of electrical components, a conventional editing wiring board 10 that is edited in a concatenated manner has a conductor pattern 1a for each wiring board 1 as shown in FIG. The two formed parts are connected and edited in a continuous manner, and a margin 2 is created to provide a reference hole necessary for automatic mounting, and a V-groove is machined to create a V-groove necessary for dividing into individual wiring boards after mounting electrical components. It was a configuration applied on line 3. For this reason, it has been necessary to rely on visual inspection means to detect leakage in the V-groove machining and to detect defective locations when the V-groove machining front and back surfaces are misaligned. Therefore, these conventional detection means tend to fail in detection, and defective locations are often discovered during the stage of dividing into individual wiring boards after mounting electrical components, and when it is impossible to make corrections. In this case, the wiring board including the mounted parts will be discarded.
これらのV溝の加工洩れ、位置ズレ等の解決策
の一つとして、第2図に示す様に一方の配線板1
の導体パターン1aからV溝加工線3をまたいで
隣りの配線板1の導体パターン1aとの間に線状
の接続パターン4を介して接続し、かつ編集配線
板10両端の余白部の片面に設けたチエツク用の
ランド5で電気的に検出する改良案が提案されて
いた。 As one solution to problems such as machining leakage and positional deviation of these V grooves, one of the wiring boards 1 as shown in FIG.
The conductor pattern 1a is connected to the conductor pattern 1a of the adjacent wiring board 1 via the linear connection pattern 4 across the V-groove processed line 3, and on one side of the margins at both ends of the editing wiring board 10. An improved plan has been proposed in which electrical detection is performed using a check land 5 provided.
しかし改良案では(イ)配線板1内の導体パターン
1aを介して接続パターン4を接続して用いてい
るため導体パターン1a自体の欠陥である断線又
は短絡が生じた場合にはV溝が正常に加工された
かを電気的に明確に確認できない。そのため先ず
V溝加工が正常であるかを布線試験機を用いてチ
エツクする。次に個々の配線板の回路パターンの
接続の良否が正常であるかを最低2回のチエツク
が必要である。(ロ)また、ランド5でのチエツク手
段では配線板の片面のみの検出であり、反対面に
加工されたV溝は未確認検査となる。従つてこの
検査を両面で実施する場合には三回のチエツクが
必要となるので効率が悪い。(ハ)さらに、この改良
案では接続パターン4と導体パターン1aが同一
回路となるためV溝を加工して設けることにより
導体パターン1aの銅の露出が生じ、腐蝕及び接
続パターン4の剥離が導体パターン1aにまで影
響を及ぼす場合があつた。 However, in the improved proposal, (a) the connection pattern 4 is connected via the conductor pattern 1a in the wiring board 1, so if a disconnection or short circuit occurs due to a defect in the conductor pattern 1a itself, the V-groove is normal. It is not possible to clearly confirm electrically whether the product has been processed. Therefore, first check whether the V-groove processing is normal using a wiring tester. Next, it is necessary to check at least twice whether the connections between the circuit patterns on each wiring board are normal. (b) Furthermore, the checking means at land 5 detects only one side of the wiring board, and the V-groove machined on the opposite side is unconfirmed. Therefore, if this inspection is performed on both sides, three checks are required, which is inefficient. (c) Furthermore, in this improvement plan, since the connection pattern 4 and the conductor pattern 1a form the same circuit, the copper of the conductor pattern 1a will be exposed by processing and providing the V groove, and corrosion and peeling of the connection pattern 4 will occur. In some cases, even pattern 1a was affected.
(考案の目的)
本考案の目的はかかる従来の欠点を解消した配
線板を提供することにある。(Purpose of the invention) An object of the invention is to provide a wiring board that eliminates such conventional drawbacks.
(考案の構成)
本考案によれば単一の印刷配線板を連続的に編
集された配線板を分離する予定線の両端近傍に上
記予定線と直交する導体パターンを設け、かつ上
記導体パターンの両端と接続するランドつきスル
ホール導通孔を形成してなる配線板が得られる。(Structure of the invention) According to the invention, conductive patterns perpendicular to the planned line are provided in the vicinity of both ends of a planned line that separates a single printed wiring board into continuously edited wiring boards, and A wiring board is obtained in which through-hole conductive holes with lands connected to both ends are formed.
(実施例)
以下、本考案の実施例を第3図、第4図及び第
5図を参照して説明する。(Example) Hereinafter, an example of the present invention will be described with reference to FIGS. 3, 4, and 5.
第3図は個別の配線板1が連続的に編集された
連続配線板10で第4図は本考案主要部Aの拡大
斜視図である。 FIG. 3 is a continuous wiring board 10 in which individual wiring boards 1 are successively edited, and FIG. 4 is an enlarged perspective view of the main part A of the present invention.
個別の配線板1の導体パターン1aは独立して
設け、自動実装基準を設ける余白部2とV溝加工
線3を挟んだ位置にランド6aつきの導通孔6を
設け、この導通孔6同志の間を切断検査用のリー
ドパターン7でV溝加工線3を直交して結線す
る。個別の配線板1に半田付けおよび銅表面保護
のための半田レジスト8を施す。 The conductor pattern 1a of each wiring board 1 is provided independently, and a conductive hole 6 with a land 6a is provided at a position sandwiching the V-groove processed line 3 and the blank space 2 where the automatic mounting standard is provided, and between the conductive holes 6. The V-grooved wire 3 is connected perpendicularly to the lead pattern 7 for cutting inspection. A solder resist 8 is applied to each wiring board 1 for soldering and for protecting the copper surface.
次に第5図に示めす如くV溝加工線3を中心に
公知の切断手段によりリードパターン7をカツト
したV溝を表裏面に加工した後に、布線試験機で
完全に施されているか否かを検査する。 Next, as shown in FIG. 5, V-grooves are cut from the lead pattern 7 by a known cutting means around the V-groove processed wire 3 on the front and back surfaces, and then a wiring tester is used to check whether the V-grooves are completely formed. Inspect whether
(考案の効果) 以上、本考案により次の効果がある。(Effect of idea) As described above, the present invention has the following effects.
(i) 目視検査での見逃しによる部品実装後の修正
または廃棄等の問題が解決し併せて目視検査工
数が削減できる。(i) Problems such as correction or disposal of parts after mounting due to oversights in visual inspection can be solved, and the number of visual inspection man-hours can be reduced.
(ii) チエツク個所を導通孔としたことにより個々
の導体パターンの電気検査と同時に検出するこ
とができ、電気検査工数の大幅な削減ができ、
かつ両面の検出が可能となつた。(ii) By using conductive holes as the check points, detection can be performed simultaneously with the electrical inspection of individual conductor patterns, significantly reducing the number of electrical inspection man-hours.
It also became possible to detect both sides.
(iii) また、個別配線板内の導体パターンを経由し
ないため導体パターンの不具合は皆無となつ
た。(iii) In addition, since there is no conductor pattern in the individual wiring board, there are no problems with the conductor pattern.
第1図は従来例の編集配線板の正面図、第2図
は従来の改良例のチエツク用ランドを設けた編集
配線板の正面図、第3図は本考案実施例の印刷配
線板の正面図、第4図は第3図のV溝加工前のチ
エツク用導通孔近傍の拡大斜視図、第5図は第3
図のV溝加工後のチエツク用導通孔近傍の拡大針
視図である。
1……配線板、1a……(個別の配線板の)導
体パターン、2……(自動実装基準孔を設ける)
余白部、3……V溝加工線、4……接続パター
ン、5……チエツク用のランド、6……導通孔、
6a……ランド、7……リードパターン、8……
半田レジスト、10……連続編集配線板。
Figure 1 is a front view of a conventional editing wiring board, Figure 2 is a front view of a conventional improved editing wiring board with a check land, and Figure 3 is a front view of a printed wiring board according to an embodiment of the present invention. Figure 4 is an enlarged perspective view of the vicinity of the check through hole before V-groove machining in Figure 3, and Figure 5 is the
FIG. 2 is an enlarged stylus view of the vicinity of the check through hole after V-groove processing in the figure. 1... Wiring board, 1a... (individual wiring board) conductor pattern, 2... (automatic mounting reference hole provided)
Margin area, 3... V-groove processed line, 4... Connection pattern, 5... Land for check, 6... Continuity hole,
6a...Land, 7...Lead pattern, 8...
Solder resist, 10...Continuous editing wiring board.
Claims (1)
を分離する予定線の両端近傍に前記予定線と直交
する導体パターンを設け、かつ前記導体パターン
の両端と接続するランドつきスルホール導通孔を
設けたことを特徴とする印刷配線板。 A conductor pattern perpendicular to the planned line is provided near both ends of a planned line that separates a single printed wiring board that is continuously edited, and through-hole conductive holes with lands are connected to both ends of the conductive pattern. A printed wiring board characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984145253U JPH027476Y2 (en) | 1984-09-26 | 1984-09-26 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984145253U JPH027476Y2 (en) | 1984-09-26 | 1984-09-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6159374U JPS6159374U (en) | 1986-04-21 |
JPH027476Y2 true JPH027476Y2 (en) | 1990-02-22 |
Family
ID=30703511
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1984145253U Expired JPH027476Y2 (en) | 1984-09-26 | 1984-09-26 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH027476Y2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5760122B2 (en) * | 2013-06-27 | 2015-08-05 | キヤノン・コンポーネンツ株式会社 | Flexible wiring board for light emitting device mounting, light emitting device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5825292A (en) * | 1981-08-08 | 1983-02-15 | 松下電器産業株式会社 | Printed circuit board |
JPS60130884A (en) * | 1983-12-19 | 1985-07-12 | 中央銘板工業株式会社 | Method of confirming v-cut of printed circuit board |
JPH0274767U (en) * | 1988-11-29 | 1990-06-07 |
-
1984
- 1984-09-26 JP JP1984145253U patent/JPH027476Y2/ja not_active Expired
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5825292A (en) * | 1981-08-08 | 1983-02-15 | 松下電器産業株式会社 | Printed circuit board |
JPS60130884A (en) * | 1983-12-19 | 1985-07-12 | 中央銘板工業株式会社 | Method of confirming v-cut of printed circuit board |
JPH0274767U (en) * | 1988-11-29 | 1990-06-07 |
Also Published As
Publication number | Publication date |
---|---|
JPS6159374U (en) | 1986-04-21 |
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