JPH0272565U - - Google Patents
Info
- Publication number
- JPH0272565U JPH0272565U JP1988151642U JP15164288U JPH0272565U JP H0272565 U JPH0272565 U JP H0272565U JP 1988151642 U JP1988151642 U JP 1988151642U JP 15164288 U JP15164288 U JP 15164288U JP H0272565 U JPH0272565 U JP H0272565U
- Authority
- JP
- Japan
- Prior art keywords
- surface electrode
- receiving element
- mount plate
- semiconductor light
- out structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 230000003287 optical effect Effects 0.000 claims 1
- 239000013307 optical fiber Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
第１図はこの考案の一実施例のマウント板電極
導出構造を採用した半導体受光素子の断面図、第
２図は斜視図である。第３図は従来のボンデイン
グワイヤ導出構造を採用した半導体受光素子の断
面図、第４図は斜視図である。 １……半導体基板、３……接合面（受光面）、
４……絶縁膜、５……表面電極、６……ボンデイ
ングワイヤ、７……マウント板、７ａ……光通過
用穴、８……光フアイバ。
導出構造を採用した半導体受光素子の断面図、第
２図は斜視図である。第３図は従来のボンデイン
グワイヤ導出構造を採用した半導体受光素子の断
面図、第４図は斜視図である。 １……半導体基板、３……接合面（受光面）、
４……絶縁膜、５……表面電極、６……ボンデイ
ングワイヤ、７……マウント板、７ａ……光通過
用穴、８……光フアイバ。
Claims (1)
- 【実用新案登録請求の範囲】 光信号を電気信号に変換する半導体受光素子の
表面電極導出構造において、 前記表面電極を導電性マウント板を介して導出
したことを特徴とする半導体受光素子電極導出構
造。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988151642U JPH0272565U (ja) | 1988-11-21 | 1988-11-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988151642U JPH0272565U (ja) | 1988-11-21 | 1988-11-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0272565U true JPH0272565U (ja) | 1990-06-01 |
Family
ID=31425864
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988151642U Pending JPH0272565U (ja) | 1988-11-21 | 1988-11-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0272565U (ja) |
-
1988
- 1988-11-21 JP JP1988151642U patent/JPH0272565U/ja active Pending