JPH0268447U - - Google Patents

Info

Publication number
JPH0268447U
JPH0268447U JP14790088U JP14790088U JPH0268447U JP H0268447 U JPH0268447 U JP H0268447U JP 14790088 U JP14790088 U JP 14790088U JP 14790088 U JP14790088 U JP 14790088U JP H0268447 U JPH0268447 U JP H0268447U
Authority
JP
Japan
Prior art keywords
width
end surface
plane
step descending
ceramic substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14790088U
Other languages
English (en)
Other versions
JPH0731549Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988147900U priority Critical patent/JPH0731549Y2/ja
Publication of JPH0268447U publication Critical patent/JPH0268447U/ja
Application granted granted Critical
Publication of JPH0731549Y2 publication Critical patent/JPH0731549Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Structure Of Printed Boards (AREA)
  • Processing Of Stones Or Stones Resemblance Materials (AREA)

Description

【図面の簡単な説明】
第1図は本考案に係わる半導体パツケージ用セ
ラミツク基板の一実施例を示す斜視図、第2図は
同じくエツジ部の断面図、第3図は同じく製造状
態を示す断面図、第4図は実験結果を示す図、第
5図は従来の半導体パツケージ用セラミツク基板
を示す断面図、第6図a,bはそれぞれチツピン
グの発生状態を示す図である。 1…セラミツク基板、2…凹部、3…平面部、
4…外周端面部、5…エツジ部、6…平面側段下
り面、7…端面に連続する段下り面、8…平面に
連続する切り下げ面、9…端面側切り下げ面、θ
,θ′…交差角。

Claims (1)

    【実用新案登録請求の範囲】
  1. 半導体素子を収納する凹部が形成された平面と
    は反対側の平面と外周端面との境界に形成される
    エツジ部に、切り下げ面を介して二つの段下り面
    を形成し、且つ端面に連続する段下り面の幅を平
    面側の段下り面の幅と同じかそれよりも小さくす
    ると共に、前記切り下げ面と段下り面とで形成さ
    れる二つの交差角をそれぞれ鈍角状と為したこと
    を特徴とする半導体パツケージ用セラミツク基板
JP1988147900U 1988-11-11 1988-11-11 半導体パッケージ用セラミック基板 Expired - Lifetime JPH0731549Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988147900U JPH0731549Y2 (ja) 1988-11-11 1988-11-11 半導体パッケージ用セラミック基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988147900U JPH0731549Y2 (ja) 1988-11-11 1988-11-11 半導体パッケージ用セラミック基板

Publications (2)

Publication Number Publication Date
JPH0268447U true JPH0268447U (ja) 1990-05-24
JPH0731549Y2 JPH0731549Y2 (ja) 1995-07-19

Family

ID=31418735

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988147900U Expired - Lifetime JPH0731549Y2 (ja) 1988-11-11 1988-11-11 半導体パッケージ用セラミック基板

Country Status (1)

Country Link
JP (1) JPH0731549Y2 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0492649U (ja) * 1990-12-28 1992-08-12
JP2012119533A (ja) * 2010-12-01 2012-06-21 Murata Mfg Co Ltd セラミック多層基板

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01167052U (ja) * 1988-05-16 1989-11-22

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01167052U (ja) * 1988-05-16 1989-11-22

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0492649U (ja) * 1990-12-28 1992-08-12
JP2012119533A (ja) * 2010-12-01 2012-06-21 Murata Mfg Co Ltd セラミック多層基板

Also Published As

Publication number Publication date
JPH0731549Y2 (ja) 1995-07-19

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