JPH0264725A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To make unnecessary a special command for canceling a low power consumption mode and the monitor of the low power consumption mode and to simplify a control software by providing a microprogram ROM for a floppy disk controller. CONSTITUTION:A microprogram ROM (mROM) in a floppy disk controller FDC resets a control signal TRY from a host interface INFH to a clock generating circuit CPG by the specific command for executing the low consumption mode. Thus, the outputs of clock signals phi1 and phi2 are stopped, a sleep condition is obtained and the low power consumption mode is obtained. In the sleep condition, when a command is written from a host side, the signal TRY is set, the clock stop condition of the circuit CPG is canceled and the supply of the signals phi1 and phi2 to circuit blocks is started. Thus, the special command for canceling the low power consumption mode and the monitor of the low power consumption mode are made unnecessary and the control software can be simplified.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, and relates to a technique effective for use in, for example, a floppy disk memory control device.

[Conventional technology]

The operating state of the floppy disk controller can be divided into the following two states. One of them is an idle state, in which it waits for a command and does nothing in particular.

The other state is the execution state, in which the issued command is being executed. Since nothing operates in the idle state, the supply of clock signals to the internal circuits is stopped and a low power consumption mode is entered. A magnetic disk control LSI (Larva 5ca) equipped with such a low power consumption mode (standby state)
la Integrated C1rcuit) is well known.

[Problem to be solved by the invention]

The magnetic disk control LSI shifts from the idle (standby) state to the execution state by issuing a command. Therefore, when a host such as a microprocessor accesses a floppy disk memory device, etc., it is difficult to read the status register etc. to monitor whether it is in standby mode or to issue a command to cancel the standby mode. This makes the control software algorithm complex.

An object of the present invention is to provide a semiconductor integrated circuit device that is equipped with a low power consumption mode and whose control software is simplified.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

That is, the low power consumption mode in which supply of an internal clock signal is stopped by execution of a specific command is canceled by supplying the above-mentioned command, and the command is executed.

[Effect]

According to the above-described means, it is possible to eliminate the need for a special command for canceling the low power consumption mode or for monitoring that the low power consumption mode is set.

〔Example〕

FIG. 1 shows a block diagram of an embodiment of a floppy (or hard) disk controller FDC (HDC) to which the present invention is applied. Although not particularly limited, each circuit block surrounded by a broken line in the figure is formed on one semiconductor substrate by a known OMO3 (complementary Mo5) semiconductor integrated circuit manufacturing technique.

The host interface INFH exchanges data and commands with a host such as a microprocessor. This host interface I N F' H
includes a status register that indicates internal status and the like.

Commands issued through the above host interface INF'H are read-only (ROM).
The memory) is supplied to the address control ADC, and together with the microprogram ROM (hereinafter referred to as mROM), forms various control signals for decoding it and executing its commands.

The random access memory RAM primarily acts as a buffer for write/read data between the host side and the floppy disk drive FDD. The arithmetic and logic unit ALU performs various arithmetic operations necessary for the write/read operations, and the timer TM forms necessary time information. Seek control sc is
The receiver controls the migration of the FDD head.

The write control wc receives the write data and
During writing, it forms a write signal in accordance with a predetermined format together with the data compensation circuit wPc.

Read control RC is variable frequency generation circuit VFO
Upon receiving the clock signal formed by the above and the read signal, the ID field and the data field are separated, and the data and the clock signal are separated.

The FDD interface INFD exchanges write/read signals and control signals with the floppy disk drive FDD.

Further, the clock generating circuit CPG is necessary for the operation of each of the circuit blocks described above and generates lock signals φ1, φ2, etc. The above circuit blocks are interconnected by an internal path BUS.

Such a floppy disk control device FDC is, for example, model Ii'H sold by Hitachi, Ltd.
D63265" can be used.

In this embodiment, the floppy disk controller l! of the above configuration is used. The following low power consumption mode control function is added to the FDC.

That is, when a specific command, such as SLEEP, is issued that causes the mROM to execute a low power consumption mode, the mROM
The external terminals such as the interface INFD are set to the specified level, and the control signal TRY transmitted from the host interface INFH to the clock generation circuit CPG is reset. This control signal TRY causes the clock generation circuit CPG to stop outputting the clock signals φ1 and φ2. In addition, m ROM is host interface I
The status register included in the NFH is set to indicate that the command can be received (command waiting state), and the sleeve instruction is terminated. After several mROM steps (the number of clocks generated from the clock stop instruction until the clock actually stops), there is a jump instruction to the command analysis routine, but the clock is stopped immediately before the execution of that step. Therefore, as mentioned above, the floppy disk controller DC enters the sleeve mode while waiting for a command.

By stopping the lock signals φ1 and φ2 as described above,
Since φ1 and φ2 are no longer supplied to each of the circuit blocks, power consumption can be reduced.

In other words, in the 0M08 circuit, as is well known, current is consumed only when the signal changes, so by fixing the clock signals φ1 and φ2 at high level or low level, the power supply voltage No current path is formed between the terminal and the circuit's ground potential point. As a result, the 0M08 circuit can theoretically consume no current.

In the sleeve state, when a command is written from the host side, the control signal TRY is set and the clock generation signal CPG is released from the clock stop state. This allows each circuit block to receive clock signals φ1 and φ2.
supply will begin.

By supplying the above clock signals φ1 and φ2, m ROM
starts the instruction execution (command analysis routine) of the next step after the above-mentioned stopped state, and analyzes the issued command and executes it accordingly.

In this embodiment, as described above, the low power consumption mode can be automatically canceled without providing a special command. In this case, the issued command may be anything. for example.

It doesn't matter if it's a sleeve command.

This is because the sleeve state is released by issuing the sleeve command, and the sleeve mode is returned to by analyzing and executing the issued sleeve command.

The effects obtained from the above examples are as follows. In other words, (1) The low power consumption mode, in which the supply of internal clock signals is stopped by the execution of a specific command, is released by supplying a new command and the command is executed, thereby reducing power consumption. This has the effect of eliminating the need for a special command for canceling the power mode.

(2) According to (1) above, commands can be issued without monitoring whether the control software is in the low power consumption mode, so the algorithm can be simplified.

Although the invention made by the present inventor has been specifically explained above along with examples, it goes without saying that the present invention is not limited to the above examples and can be modified in various ways without departing from the gist thereof. do not have. For example, the clock signal generated by the clock generation circuit CPG is the ground of two-phase clock signals such as the clock signals φ1 and φ2,
It may also be a multi-phase clock signal, such as a phase or four-phase clock signal.

The command for entering the low power consumption mode may be a command such as set standby (SET 5TANDBY). Also, by executing this command, the clock signal φ
1. The clock signals φ1... etc. are stopped by stopping the clock signals φ1. Any specific circuit configuration may be used to restart the supply of φ2 and the like. Furthermore, a function may be added that disables a command specifying the low power consumption mode when it is issued in the low power consumption mode.

The present invention can be widely used in various semiconductor integrated circuit devices having a microcomputer function including a low power consumption mode function based on a specific command, as well as a floppy disk memory control device and a hard disk memory control device.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows. That is, the low power consumption mode in which supply of an internal clock signal is stopped by execution of a specific command is canceled by supply of a new command, and the command is executed. This eliminates the need for a special command for canceling the low power consumption mode or for monitoring that the low power consumption mode is present.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a floppy disk memory control device to which the present invention is applied. FDC...Floppy disk control device, engineering NFH/
...Host interface, INFD...FDD star face, m ROM...Micro program ROM (read only memory), ADC...RO
M address control, ALU...arithmetic logic unit, TM...timer, SC...seek control, RAM...random access memory, CPG
...Clock generation circuit, WC...Write control, RC...Read control, VFO...Variable frequency oscillation circuit, Bus...Internal bus, wpC...
Data compensation circuit when writing.

Claims (1)

[Claims] 1. A low power consumption mode function of stopping the supply of an internal operating clock signal by executing a specific command, and canceling the low power consumption mode by supplying a command in the low power consumption mode. What is claimed is: 1. A semiconductor integrated circuit device having a function of executing a command and executing the command. 2. The semiconductor integrated circuit device according to claim 1, wherein the semiconductor integrated circuit device is a magnetic disk memory control device.