JPH0398188A - Ic card - Google Patents

Abstract

PURPOSE:To prevent the runaway and malfunction of a processor caused by switching a clock frequency during a session by holding the operation of the processor in a standstill state according to a stop signal from a reader/writer and restarting the operation of the processor by the supply of a clock signal in the standstill state. CONSTITUTION:When the clock signal of the prescribed frequency is supplied from a reader/writer 100 to a processor 210 of an IC card 200, the processor 210 is operated at processing speed based on the clock signal. At such a time, when the stop signal is outputted from the reader/writer, a stopping means 220 holds the operation of the processor 210 in the standstill state. When the clock signals of various frequencies, for example, are switched and supplied from the reader/writer 100 in the state that the operation of the processor 210 is stopped, a restarting means 230 restarts the operation of the processor 210. Thus, when the clock signal is switched during the session with the reader/ writer 100, the runaway and malfunction of the processor 210 are not generated.

Description

Detailed Description of the Invention <Industrial Application Field> The present invention relates to an IC card that operates based on a clock signal supplied from a reader/writer, and more specifically, to an IC card that operates based on a clock signal supplied from a reader/writer. Regarding de.

BACKGROUND ART In an IC card to which a clock signal is supplied from an external device (reader/writer), the processing speed of its processor is proportional to the frequency of this clock signal.

However, the CPU/MPU (
The frequency range in which it can operate differs depending on the type of processor. This is set as a standard for each IC card.

Therefore, in order to improve the processing speed of IC cards,
Even if the reader/writer side switches from a low frequency clock signal to a high frequency clock signal, the IC card side may become out of specification. In other words, in the case of an IC card, the processor may not operate properly depending on the high frequency clock signal.

Therefore, if you want to improve the processing speed of an IC cart by changing the frequency of the clock signal, first supply a clock signal with a lower frequency, then exchange the operable clock region by some means, and then It is necessary to change the clock signal to a higher frequency one based on the result of the exchange.

However, in current IC cards specified by the ISO (International Organization for Standardization), when the above processing is performed, the processor thereof may malfunction.

Therefore, the IC cards currently in use are only configured to operate using a single clock signal.

<Problems to be Solved by the Invention> However, in such conventional IC cards, since the processor is constantly operating during a session with a reader/writer, the clock frequency may be changed during the session. There was a problem that the processor could run out of control or malfunction. This is because the internal timing of the processor's operation cannot be controlled by the drive frequency supplied from the outside.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide an IC card that does not cause runaway or malfunction of the processor even if the clock signal is switched during a session with a reader/writer.

<Means for Solving the Problems> The present invention, as shown in the block diagram of the schematic configuration in FIG. An IC having a processor 210 that operates as
In the card 200, a stopping means 220 keeps the operation of the processor 210 in a stopped state in response to a stop signal from the reader/writer 100, and a restarting means for restarting the operation of the processor 210 in the stopped state by supplying the clock signal. 230.

<Operation> In the IC card according to the present invention, the reader/writer 10
0 to a clock signal of a predetermined frequency from rC to F' 2
0 0 to the processor 210, the processor 210 will operate at a processing speed based on that clock signal. At this time, when a stop signal is output from the reader/writer, the stop means 220 holds the operation of the processor 210 in a stopped state.

If, for example, clock signals of different frequencies are switched and supplied from the reader/writer 100 while the operation of the processor 210 is stopped, the resuming means 230 restarts the operation of the processor 210. Therefore, the reader/writer 10
When the clock signal is switched during a session with 0, the processor 210 will not run out of control or malfunction.

<Example> Hereinafter, an example of an IC card according to the present invention will be described with reference to the drawings.

FIGS. 2 to 4 are diagrams for explaining an IC power supply according to an embodiment of the present invention.

First, in FIG. 2, 11 indicates a reader/writer, and 21 indicates an IC power supply connected to this reader/writer 1l.

The IC unit 121 has its data output unit (I/O) 22
Data can be written to and read from the reader/writer 11 via the reader/writer 11.

That is, the IC card 21 has a well-known configuration, and has an I/O port connected to the human output port of the reader/writer II.
22 and a processor MP connected to this I/O 22
It has U 2 3 and a memory FROM 24 into which data is written by the processor 23. Note that this processor 23 includes a control section 3L, a calculation section 32, and a ROM 3.
3, RAM34.

In addition, from each output terminal of the reader/writer 11 to the IC card 2
1 is supplied with the operating voltage Vcc of the processor, the ground GND, the reset signal RST, and the clock signal CLK.

Furthermore, this reader/writer 11 has a clock signal of different frequencies, for example, a 3.5 MHz clock signal and a 4-9 MHz clock signal, which are switched from the CLK terminal and supplied to the CLK terminal of the IC card 2l. The configuration is as follows. In the IC power supply 2l, the processor 23 operates at a predetermined processing speed based on the supplied clock signal.

Note that when the IC card 21 is supplied with the reset signal, it responds to the reader/writer l1 with response information "rANSWER TO RESET".

The IC card 21 can be in a clock change standby (STAND BY) mode or an active mode. The clock change wait mode is for stopping the internal operation of the processor 23 (RAM
active mode is a state in which normal operation is ensured.

FIG. 3 is a timing chart showing the waveforms of the operating voltage Vcc of the CPU of the IC card, its wake signal CLK, and the reset signal RST according to this embodiment.

As shown in this figure, after the reader/writer 11 starts supplying the operating voltage Vcc to the IC card 21, a predetermined frequency (
For example, 3.5MHz) clock signal at timing t3.
supply will begin.

Then, at a predetermined timing t4, supply of the reset signal RST is started. In this case, the link between the reader/writer 11 and the IC card 21 is established at timing t2 by starting the supply of the operating voltage Vcc.

In this case, the data is transmitted bidirectionally, and at a predetermined timing t5 after the start, the response signal rANSWER To RESETJ to the reset signal human input is
It will be output from the C card 2l to the reader/writer 11.

This response information includes the standard of the driving frequency of the processor 23 on the IC card 21 side. For example, when changing the clock signal (driving frequency) based on this information, the reader/writer 1l selects the clock generating circuit of 1 and supplies a clock signal (4.9 MHZ) to the rc card 2l. That is, at timing t6, the reset signal R
Set ST to "L" level (rOJ) (stop outputting the reset signal). As a result of inputting this RST stop signal, the IC card 21 stops the operation of its processor 23 and transitions to the clock change wait mode. do.

Then, with this reset signal set to rLJ, the reader/writer 11 changes the frequency at timing t7 and starts supplying the clock signal.

In this way, the processor 2 of the IC card 21 switches the drive frequency by setting the reset signal to the rLJ level.
Since the internal operations of the processor 3 are stopped, this switching is intended to prevent the processor 23 from running out of control or malfunctioning.

Note that after this frequency change is completed, timing t8
Let the reset signal be rHJ.

As a result, the processor 23 of the IC card 21 operates at the processing speed based on the changed clock signal (4.9 MHz). After this, the operation follows the normal sequence.

FIG. 4 is a flowchart showing the operating procedure of the processor 23 of the IC card 21 when switching the clock during a session. Note that this clock switching is processed as a reset interrupt.

First, if there is a reset signal, the flag P.
Check whether WR is 0 (step Sl). This flag P'vVR (standby bit) is determined to be O when the power is turned on, and thereafter holds its contents as long as the power is turned on even if a reset signal or the like is input.

Next, a character signal, e.g. rANSWER TO RESETJ, is sent as response information to the human reset.
The signal is output to the reader/writer 11 (step S2).

Furthermore, the flag PWR is set to 1 (step S
3).

Then, the processor 23 transitions to a standby (STAND BY) mode in which internal operations are stopped (step S4).

When the processor 23 enters the standby (wait for clock change) mode in this manner, the reader/writer 11 switches and supplies the clock frequency.

In this case, the reset signal rHJ is supplied again to issue a reset interrupt to the processor 23.

In this sequence, since the flag PWR is 1 (No in step Sl), this interrupt processing sequence ends and returns to the normal sequence. That is, the first reset interrupt for clock switching and the reset interrupt for restarting operation after switching are clearly distinguished depending on the contents of flag PWR.

<Effects> As described above, according to the present invention, runaway and malfunction of the processor of the IC card can be prevented when switching the driving frequency of the IC card.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an IC card according to the present invention, FIG. 2 is a block diagram showing the overall configuration of an IC card according to an embodiment of the present invention, and FIG. 3 is a block diagram showing a clock frequency according to an embodiment. Timing chart showing switching FIG. 4 is a flowchart showing the operating procedure of clock switching in a processor according to an embodiment. 100 ◆ ● 200 ◆ ・ 210 ● ● 220 ● ・ 230 ・ ・

Claims (1)

[Claims] An IC card having a processor that operates based on a clock signal supplied from a reader/writer capable of switching and supplying clock signals of different frequencies, wherein the operation of the processor is controlled by a stop signal from the reader/writer. An IC card characterized by comprising: a stopping means for maintaining the processor in a stopped state; and a restarting means for restarting the operation of the processor by supplying the clock signal in the stopped state.