JPH0262857U - - Google Patents

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Publication number
JPH0262857U
JPH0262857U JP14101788U JP14101788U JPH0262857U JP H0262857 U JPH0262857 U JP H0262857U JP 14101788 U JP14101788 U JP 14101788U JP 14101788 U JP14101788 U JP 14101788U JP H0262857 U JPH0262857 U JP H0262857U
Authority
JP
Japan
Prior art keywords
rate
circuit
conversion
signal
data rate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14101788U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14101788U priority Critical patent/JPH0262857U/ja
Publication of JPH0262857U publication Critical patent/JPH0262857U/ja
Pending legal-status Critical Current

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  • Time-Division Multiplex Systems (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案実施例における回線識別回路の
ブロツク図、第2図は無線区間用データ信号およ
び制御信号のタイミングチヤートである。 1:入力端子、2:データ速度変換回路、2a
:無線区間用データ信号、3:変換率制御回路、
3a,3b:制御信号、4:端子。
FIG. 1 is a block diagram of a line identification circuit according to an embodiment of the present invention, and FIG. 2 is a timing chart of data signals and control signals for the wireless section. 1: Input terminal, 2: Data speed conversion circuit, 2a
: Data signal for wireless section, 3: Conversion rate control circuit,
3a, 3b: control signal, 4: terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複合フレーム方式を用いたデジタル無線装置に
おいて、入力したデータ信号速度を無線区間用デ
ータ速度に変換するデータ速度変換回路と、この
データ速度変換回路の速度変換率を制御する信号
を反転して出力する変換率制御回路を具備したこ
とを特徴とする回線識別回路。
In a digital radio device using a composite frame method, there is a data rate conversion circuit that converts an input data signal rate to a wireless section data rate, and a signal that controls the rate conversion rate of this data rate conversion circuit is inverted and output. A line identification circuit characterized by comprising a conversion rate control circuit.
JP14101788U 1988-10-31 1988-10-31 Pending JPH0262857U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14101788U JPH0262857U (en) 1988-10-31 1988-10-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14101788U JPH0262857U (en) 1988-10-31 1988-10-31

Publications (1)

Publication Number Publication Date
JPH0262857U true JPH0262857U (en) 1990-05-10

Family

ID=31405710

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14101788U Pending JPH0262857U (en) 1988-10-31 1988-10-31

Country Status (1)

Country Link
JP (1) JPH0262857U (en)

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