JPH026226B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a diode for bipolar integrated circuits with few parasitic effects and high breakdown voltage.

Due to the structure of bipolar integrated circuits, various parasitic elements are formed between the circuit components and the silicon substrate, and it is known that various parasitic effects exist. The same applies to high voltage diodes, which are one of the components of integrated circuits.
For example, an N layer 4 on a P type silicon substrate 1 shown in FIG. 1 is separated from the substrate 1 and other adjacent components not shown by an N ⁺ buried layer 2 and a P ⁺ isolation region 3. The P anode region 5 and
A high voltage diode element made by providing the N ⁺ cathode region 6 is represented by an equivalent circuit as shown in FIG. The flowing forward current I _F becomes the base current of the parasitic PNP transistor formed by the P anode region 5, the N layer 4, and the P type substrate 1, and the parasitic transistor turns on and flows toward the substrate 1 as I _s = h _FE ( A parasitic effect current of S)×I _F flows. Here h _FE (S) is parasitic
This is the DC current amplification factor of a PNP transistor and usually has a value of about 1 to 10, so this parasitic effect current cannot be ignored in circuit design.

In order to reduce the parasitic effect by lowering the current amplification factor of such a parasitic transistor, as shown in FIG. 3, in which common parts are given the same reference numerals as in ^FIG . A structure is known in which a P region 9 surrounding the anode region 5 is formed simultaneously with the anode region 5 by a diffusion method, and this P region 9 is connected to the cathode electrode 8. As a result, a horizontal shape consisting of a P emitter region 5, an N base region 4, and a P collector region 9 is formed.
A PNP transistor type diode is formed in which the base region 4 and collector region 9 of the PNP transistor are directly connected, the electrode 7 connected to the emitter region 5 serves as an anode, and the electrode 8 connected to the base region 9 serves as a cathode.

Such a diode element is represented by an equivalent circuit as shown in FIG. When the anode electrode 7 and the cathode electrode 8 are forward biased, the forward current I _F of the diode is the sum of the base current I _B ' and collector current I _C ' in the lateral PNP transistor, and I _F = [1+h _FE (H) ]×I _B ′. Here, h _FE (H) is the DC current amplification factor of the lateral PNP transistor, I _B ′=I _F /1+h _FE (H), and the P emitter region 5, which is formed in the same way as in the cases of FIGS. 1 and 2, The collector current I _S ′ of the parasitic PNP transistor consisting of the N layer 4 and the P-type substrate 1 is I _S ′=h _FE(S) ×I _B ′=I _F ×(h _FE(S) /1+h _FE (H)) Therefore, it decreases to 1/h _FE (H) in the case of Figures 1 and 2.

However, in this structure, the silicon wiring conductor 71 from the anode electrode 7 must go beyond the P layer 9. Therefore, when the diode is reverse biased, the P layer connected to the P layer 5 on the anode side and the cathode electrode 8 by the P type inversion layer 11 formed directly under the oxide film 10 of the N type epitaxial layer 4 under the wiring conductor 71. 9 is short-circuited, the reverse breakdown voltage of the diode decreases, making it impossible to obtain a diode with high breakdown voltage.

An object of the present invention is to provide a structure that can prevent a decrease in breakdown voltage due to the channel effect of a transistor-type diode formed in such an integrated circuit.

The purpose of this is to create two one-conductivity types within a region of one conductivity type surrounded by a separation region of one conductivity type that extends from the surface of a region of one conductivity type provided on a semiconductor substrate of one conductivity type to the semiconductor substrate. Along with receiving the area,
one conductor provided on the region of the opposite conductivity type to connect to the region of the opposite conductivity type to form one electrode at a position sandwiching the one conductor between one of the conductors and the other; In order to use the other of the two conductivity type regions as the other electrode, it is provided on the region of the opposite conductivity type, along the surface of the region of the opposite conductivity type, even above and outside the region of the opposite conductivity type. This is achieved by providing the other conductor, and the one of the two one-conductivity-type regions is provided so as to surround the other conductor in a range that does not reach directly under the other conductor.

Embodiments of the present invention will be described below with reference to the drawings. In FIGS. 5 and 6, parts common to those in FIGS. 1 and 3 are given the same reference numerals. In addition to a P region 5 and an N ⁺ region 6, a P region 9 is formed by a diffusion method inside an N layer 4 provided on a P type silicon substrate 1 by an epitaxial method. P region 9 is interposed between P region 5 and N ⁺ region 6, surrounds P region 5 without surrounding N ⁺ region 6, and is open on the side opposite to N ⁺ region 6. P area 9
and N ⁺ region 6 are connected by electrode 8. As a result, as in the case of FIG. 3, a lateral PNP transistor is formed, which consists of a P emitter region 5, an N base region 4, and a P collector region 9. The electrode 7 connected to the emitter region 5 is used as an anode, and the electrode 8
A PNP transistor-type diode with less parasitic effects is formed with the cathode. in this case,
The P collector region 9 connects the emitter region 6 with three equal intervals.
Since the transistor is surrounded by a double layer, the entire region uniformly acts as a collector, and a more effective transistor effect can be obtained. Further, since the electrode 7 extends over the open portion of the P region 9, there is no risk of a P-type inversion layer being formed between the P region 5 and the P region 9, and there is no drop in breakdown voltage.

In order to reduce the parasitic effect according to the principle of the present invention, as shown in FIG. 7, a P region 15 is provided in the N-type epitaxial layer 4 by a diffusion method, and an N region 16 is further formed therein by a diffusion method. , provided in N layer 4
Electrode 18 connecting N ⁺ region 17 and P region 15
is an anode, and an electrode 19 connected to the N region 16
It can also be obtained in an NPN transistor type diode with a cathode of That is, in this case, the second layer 4 and third layer 15 of the parasitic thyristor formed by the P layer 1, N layer 4, P region 15, and N region 16 are short-circuited, so that the thyristor operation of the parasitic thyristor is prevented. . However, in the structure shown in FIG. 7, when the anode terminal 18 and the cathode terminal 19 are reverse biased, the withstand voltage between the P region 15 and the N region 16 is
Although it is determined by a PN junction, since the P region 15 is formed in the epitaxial layer 4 by diffusion, a high breakdown voltage cannot be obtained. On the other hand, in the structure shown in FIG. 5 according to the present invention, the reverse breakdown voltage is determined by the PN junction between the N type epitaxial layer 4 and the P region 5;
By increasing the resistance of layer 4, a high reverse breakdown voltage can be obtained.

As described above, the present invention reduces parasitic effect current by configuring a diode for bipolar integrated circuits using the base and emitter junctions of lateral transistors surrounding either the collector region or the emitter region, and By leaving the conductor open and pulling out the conductor connected to the anode above it, a drop in withstand voltage due to the inversion layer is prevented, making it possible to increase the withstand voltage from 100V to
It can be extremely effectively applied to high-voltage, large-capacity integrated circuits that directly control systems with voltages in the 200V class.

[Brief explanation of drawings]

Fig. 1 is a sectional view of a conventional example of a diode for integrated circuits, Fig. 2 is its equivalent circuit diagram, Fig. 3 is a sectional view of another example, Fig. 4 is its equivalent circuit diagram, and Fig. 5 is the invention of the present invention. 6 is a plan view thereof, and FIG. 7 is a sectional view showing another lateral transistor type diode for explaining the effects of the present invention. 1... P-type substrate, 2... P-type isolation region, 4...
N-type epitaxial layer (base region), 5...P
Emitter region, 7... Anode electrode, 8... Cathode electrode, 9... P collector region.

Claims (1)

[Claims] 1 Two regions of one conductivity type are provided in a region of one conductivity type that is surrounded by a separation region of one conductivity type that extends from the surface of a region of opposite conductivity type provided on a semiconductor substrate of one conductivity type to the semiconductor substrate. and one conductor provided on the region of the opposite conductivity type to connect one of the conductors to the region of the opposite conductivity type at a position sandwiching the one between the conductor and the other to form one electrode. , on the region of the opposite conductivity type, along the surface of the region of the opposite conductivity type, to the outside of the region of the opposite conductivity type, in order to use the other of the two regions of one conductivity type as the other electrode. and the other conductor provided,
A diode for an integrated circuit, characterized in that the one of the two one-conductivity type regions is provided so as to surround the other in a range that does not reach directly under the other conductor.