JPH0255171U - - Google Patents
Info
- Publication number
- JPH0255171U JPH0255171U JP13336088U JP13336088U JPH0255171U JP H0255171 U JPH0255171 U JP H0255171U JP 13336088 U JP13336088 U JP 13336088U JP 13336088 U JP13336088 U JP 13336088U JP H0255171 U JPH0255171 U JP H0255171U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- resistor
- emitter
- collector
- connection point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Control Of Amplification And Gain Control (AREA)
Description
第1図は本考案の一実施例の構成を示す回路図
。第2図aおよびbは本考案の一実施例の作用の
説明に供する回路図。第3図は従来例の回路図。
Q11,Q12,Q13およびQ14……トラ
ンジスタ、R1およびR2……抵抗、VVS……
可変直流電圧源、D1およびD2……ダイオード
。
FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention. FIGS. 2a and 2b are circuit diagrams for explaining the operation of an embodiment of the present invention. FIG. 3 is a circuit diagram of a conventional example. Q 11 , Q 12 , Q 13 and Q 14 ... transistor, R 1 and R 2 ... resistance, VVS ...
Variable DC voltage source, D 1 and D 2 ... diodes.
Claims (1)
スタと、カスコード接続された第2および第4ト
ランジスタとを有し、第1トランジスタのエミツ
タと第2トランジスタのエミツタとが接続され、
かつ第3トランジスタのベースおよび第4トラン
ジスタのベースに所定直流電圧を印加するように
構成された差動増幅器の利得可変回路であつて、
第1トランジスタのコレクタと第3トランジスタ
のエミツタとの間に接続された第1の抵抗と、第
1の抵抗と同一抵抗値を有し、かつ第2トランジ
スタのコレクタと第4トランジスタのエミツタと
の間に接続された第2の抵抗と、第1トランジス
タのコレクタと第1の抵抗との接続点と第2トラ
ンジスタのコレクタと第2の抵抗との接続点との
間に逆直列に接続された第1および第2ダイオー
ドと、第1および第2ダイオードの共通接続点に
接続されて該共通接続点に直流電圧を印加する可
変直流電圧源とからなる、差動増幅器の利得可変
回路。 It has first and third transistors connected in cascode, and second and fourth transistors connected in cascode, the emitter of the first transistor and the emitter of the second transistor are connected,
and a variable gain circuit of a differential amplifier configured to apply a predetermined DC voltage to the base of the third transistor and the base of the fourth transistor,
a first resistor connected between the collector of the first transistor and the emitter of the third transistor; and a first resistor having the same resistance value as the first resistor and connected between the collector of the second transistor and the emitter of the fourth transistor. a second resistor connected between the first transistor and the second resistor, and a second resistor connected in anti-series between the connection point between the collector of the first transistor and the first resistor and the connection point between the collector of the second transistor and the second resistor. A variable gain circuit for a differential amplifier comprising first and second diodes and a variable DC voltage source connected to a common connection point of the first and second diodes and applying a DC voltage to the common connection point.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13336088U JPH0720969Y2 (en) | 1988-10-14 | 1988-10-14 | Variable gain circuit of differential amplifier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13336088U JPH0720969Y2 (en) | 1988-10-14 | 1988-10-14 | Variable gain circuit of differential amplifier |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0255171U true JPH0255171U (en) | 1990-04-20 |
JPH0720969Y2 JPH0720969Y2 (en) | 1995-05-15 |
Family
ID=31391148
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13336088U Expired - Lifetime JPH0720969Y2 (en) | 1988-10-14 | 1988-10-14 | Variable gain circuit of differential amplifier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0720969Y2 (en) |
-
1988
- 1988-10-14 JP JP13336088U patent/JPH0720969Y2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0720969Y2 (en) | 1995-05-15 |