JPH0253880B2 - - Google Patents

Info

Publication number
JPH0253880B2
JPH0253880B2 JP56117323A JP11732381A JPH0253880B2 JP H0253880 B2 JPH0253880 B2 JP H0253880B2 JP 56117323 A JP56117323 A JP 56117323A JP 11732381 A JP11732381 A JP 11732381A JP H0253880 B2 JPH0253880 B2 JP H0253880B2
Authority
JP
Japan
Prior art keywords
memory cell
transmission gate
buffer
word line
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56117323A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5819791A (ja
Inventor
Nobuyuki Myazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP56117323A priority Critical patent/JPS5819791A/ja
Publication of JPS5819791A publication Critical patent/JPS5819791A/ja
Publication of JPH0253880B2 publication Critical patent/JPH0253880B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/08Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
JP56117323A 1981-07-27 1981-07-27 半導体記憶装置 Granted JPS5819791A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56117323A JPS5819791A (ja) 1981-07-27 1981-07-27 半導体記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56117323A JPS5819791A (ja) 1981-07-27 1981-07-27 半導体記憶装置

Publications (2)

Publication Number Publication Date
JPS5819791A JPS5819791A (ja) 1983-02-04
JPH0253880B2 true JPH0253880B2 (enrdf_load_stackoverflow) 1990-11-20

Family

ID=14708894

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56117323A Granted JPS5819791A (ja) 1981-07-27 1981-07-27 半導体記憶装置

Country Status (1)

Country Link
JP (1) JPS5819791A (enrdf_load_stackoverflow)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59218696A (ja) * 1983-05-26 1984-12-08 Toshiba Corp 半導体メモリ
JPS60212893A (ja) * 1984-04-09 1985-10-25 Fujitsu Ltd 語選択線駆動回路
CN1956098A (zh) * 2005-08-02 2007-05-02 株式会社瑞萨科技 半导体存储装置
JP5100035B2 (ja) 2005-08-02 2012-12-19 ルネサスエレクトロニクス株式会社 半導体記憶装置
KR102389818B1 (ko) 2017-09-12 2022-04-22 삼성전자주식회사 어시스트 회로를 포함하는 전압 조절 회로 및 이를 포함하는 메모리 장치

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4150441A (en) * 1978-03-20 1979-04-17 Microtechnology Corporation Clocked static memory
JPS55150189A (en) * 1979-05-10 1980-11-21 Nec Corp Memory circuit
JPS5782290A (en) * 1980-11-12 1982-05-22 Toshiba Corp Semiconductor storage device

Also Published As

Publication number Publication date
JPS5819791A (ja) 1983-02-04

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