JPH0245953A - Manufacture of semiconductor substrate and structure therefor - Google Patents

Abstract

PURPOSE:To obtain a semiconductor substrate having a plureality of element formation regions after reducing the number of processes by forming a dielectric layer on the whole surface where grooves are formed on the surface of the first substrate and joining the second substrate with the above dielectric layer and then, removing the rear of the first substrate until the dielectric layer is exposed. CONSTITUTION:The surface of a silicon substrate 1 is polished to obtain a mirror plane and regions for forming elements are obtained by partitioning the surface of the substrate 1. Grooves 2 for insulating between the regions are made until they reach the periphey of the substrate 1. Then, a silicon oxide film 3, that is a dielectric substrate, is heated at a temperature 1000 deg.C in an atmosphere of an oxygen gas and the whole surface of the substrate 1 is coated with the above film 3 to form an insulating layer. Close contact is just made between a silicon substrate 4 and the substrate 1 at a normal temperature in a clean room and a joined body is obtained by heating it in the oxygen gas. The rear of the substrate 1 is polished to obtain the mirror plane and the manufacture of the substrate comes to an end by exposing the oxide film 3. The substrate 4 having a plurality of element formation regions are thus obtained by reducing the number of processes.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention (Industrial Application Field) The present invention particularly relates to a method for manufacturing a semiconductor substrate having an element isolation structure for forming semiconductor elements and its structure.

(Prior Art) In semiconductor integrated circuits, the pn
Although methods using bonding have been widely used, in recent years, as ICs have become more sophisticated, it has become difficult to meet the increasing demands for increased isolation capacitance and reduction in element dimensions. Element isolation methods play an important role in improving the performance of ICs, which are becoming faster and more integrated, and new methods are required to be developed. A method using dielectric element isolation is promising. Since this method allows a large element isolation capacitance, it is possible to reliably electrically isolate a power transistor and its control section in, for example, a power IC.

(Problem to be Solved by the Invention) In dielectric element isolation, it is necessary to wrap a part of the element in a dielectric. In particular, when separating the element region and the substrate region, it is necessary to wrap the dielectric layer in the substrate. Must be embedded. For example, a method of forming a dielectric buried layer by contacting a semiconductor substrate on which a dielectric layer is formed and bonding by heat treatment (Japanese Patent Publication No. 39-17869, Appl.
, Phys, Lett,, 48.78 (19
86) etc.), only one element can be separated by bonding, and the number of processes increases to completely isolate dielectric elements, which is a drawback.

Also, SOI (S 1licon -on -1n
In the 5ulator) method, in order to form an insulator layer in a silicon substrate, a dielectric layer is first formed on a single crystal substrate,
Furthermore, a polycrystalline or amorphous silicon film is formed on this dielectric layer. Next, this silicon film is single-crystalized to form an element by heat treatment, laser light, or electron beam. In this method, an insulating layer is formed in the silicon substrate and it is possible to isolate the elements between the element formation region and the substrate, but it is not possible to simultaneously form the element isolation structure between each element formation region, and it takes many processes to completely isolate the elements. The disadvantage was that it increased. It also has drawbacks such as placing restrictions on the quality and shape of the single crystal formed and requiring expensive equipment.

Furthermore, in the polycrystalline support structure dielectric isolation method (for example, Shimamoto et al., Practical Semiconductor Technology Patent Handbook, P. 14 Science Forum, Inc. (1986)), elements are formed on the surface of the semiconductor substrate and lateral element isolation is achieved. After this, the semiconductor substrate is lapped from the back side to expose the lower part of the element area, a dielectric material such as an oxide film is formed there, and a polycrystalline silicon layer etc. to serve as a support is formed again. This method also has the disadvantage that it is not possible to simultaneously form an element isolation structure between the element region and the support and between each element region, and the number of processes increases to completely isolate the elements. Another disadvantage is that the substrate tends to warp due to the difference in thermal expansion between polycrystalline silicon and single crystal silicon.

As mentioned above, the conventional method has the disadvantage that the number of processes increases in order to completely separate dielectric elements.

The present invention has been made based on the above circumstances, and an object of the present invention is to provide a semiconductor substrate manufacturing method and its structure that reduce the number of processes for forming a plurality of electrically completely isolated element formation regions. purpose.

[Structure of the Invention] (Means for Solving the Problems) In order to solve the above problems, the first invention of the present application includes a step of forming a groove reaching to the outer edge of the substrate on the mirror surface of the first semiconductor substrate. , a step of forming a dielectric layer on the mirror surface on which the groove is formed, a step of bonding the surface on which the dielectric layer is formed and a second semiconductor mirror surface, and a surface side of the first semiconductor substrate that is not the mirror surface. and removing the first semiconductor substrate until at least the dielectric layer is exposed.

Further, the invention of Application No. 2 includes a step of forming a groove on the mirror surface of the first semiconductor substrate, a step of forming a dielectric layer on the mirror surface on which the groove is formed, and a step of forming the groove on which the dielectric layer is formed. polycrystalline 3
i, a step of bonding the surface of the first substrate on which the dielectric layer is formed and the second semiconductor mirror surface, and a step of bonding the surface of the first semiconductor substrate on which the dielectric layer is formed, at least the dielectric layer from the non-mirror surface of the first semiconductor substrate. and removing the first semiconductor substrate until the first semiconductor substrate is exposed.

Furthermore, the third aspect of the present invention is characterized in that, in the step of removing the first semiconductor substrate, a semiconductor element is formed on the remaining first semiconductor substrate separated by the dielectric layer.

Furthermore, the invention of No. 4 of the present application includes a step of forming a groove reaching to the outer edge of the substrate on the mirror surface of the first semiconductor substrate, a step of forming a dielectric layer on the mirror surface in which the groove is formed, and a step of forming the dielectric layer. In the step of joining the formed surface and the second semiconductor mirror surface, the dielectric layer of the groove formed in the first semiconductor substrate is removed from the non-mirror surface side of the first semiconductor substrate, and the second semiconductor substrate is bonded. and removing the first semiconductor substrate until a mirror surface of the semiconductor substrate is exposed.

Furthermore, in the invention of the present application 5, in the step of removing the first semiconductor substrate, a semiconductor element is formed on the first semiconductor substrate that remains after being separated by the dielectric layer, and the semiconductor element is formed on the exposed second semiconductor substrate. The gist is that a current driving semiconductor element is formed on a mirror surface.

(Function) In the invention of the present application, a groove reaching the outer edge is formed on the surface of the first semiconductor substrate, a dielectric layer is formed on the entire surface where the groove is formed, and a second layer is further formed on this surface. The surfaces of the semiconductor substrates are bonded, and the back surface of the first semiconductor substrate is removed until at least the dielectric layer is exposed.

The invention of the second aspect of the present application forms a groove on the surface of the first semiconductor substrate, forms a dielectric layer over the entire surface on which the groove is formed,
After filling the groove with polycrystalline Si, the surface of the second semiconductor substrate is bonded to this surface, and the back surface of the first semiconductor substrate is removed until at least the dielectric layer is exposed.

The third invention of the present application forms a semiconductor element on the semiconductor substrate formed by the second and third inventions of the present application.

The invention of the fourth aspect of the present invention is to form a groove reaching the outer edge on the surface of a first semiconductor substrate, form a yh dielectric layer on the surface where the groove is formed, and bond the surface of a second semiconductor substrate to this surface,
The back surface of the first semiconductor substrate is removed until the surface of the second semiconductor is exposed.

According to the fifth aspect of the present invention, a semiconductor element is formed in a first semiconductor substrate portion of the semiconductor substrate formed according to the fourth aspect of the present invention, and a current driving semiconductor element is formed in a second semiconductor substrate portion.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing an example of a manufacturing process of a method for manufacturing a semiconductor substrate according to a first embodiment of the present invention, and FIG. 2 is an enlarged plan view showing a substrate structure produced by the first embodiment. . In the following explanation, each item symbol (a) to (d) corresponds to (a) to (d) in FIG. 1, respectively.

(a) The surface of the silicon substrate 1 with the crystal plane (100) is polished to a mirror surface, and the surface of the silicon substrate 1 is partitioned by a photo process and an etching process using a photomask or reticle photoresist to form a region where an element will be formed (element formation area). ), and a groove 2 for insulating between these regions is formed until it reaches the outer edge of the silicon substrate 1. For etching, mask the required areas with 3i3N4 film, and 1-IF:HNO
3: Using a solution with a composition of CH3Cool-1 = 1: 2: 1, it was carried out at 22 ° C for 30 seconds, and the width was 50
A groove 2 having a depth of 0 μm and a depth of 5 μm is formed.

The shape and dimensions of the groove may be formed in various ways depending on the purpose.

(b) To form an insulating layer over the entire surface of the silicon substrate 1 on which the groove 2 is formed, a dielectric silicon oxide film 3 is heated at 1000°C in an oxygen gas atmosphere.
Coat to a thickness of 000 to 200 OA.

(C) A silicon substrate 1 coated with a silicon oxide film 3 and having grooves 2 formed therein, and another mirror-polished silicon substrate 4 that will serve as a support for an element formation area to be formed are placed in a clean room at room temperature. They are brought into close contact and then heated at 1000° C. for 5 hours in oxygen gas to obtain a bonded body. Other methods may be used to obtain the zygote. For example, when two silicon substrates are brought into close contact with each other, a liquid with associative properties and a large structure such as high purity (e.g. EL class) methanol, ethanol, acetic acid, formic acid, aqueous ammonia, or ultrapure water is used. A method may also be used in which the components are brought into close contact via a liquid contained therein and heat treated. Furthermore, using a solution that forms a solid oxide film by heat treatment, such as OCD (manufactured by Tokyo Ohka Kogyo Co., Ltd.), a coating solution for forming a 5i02 film known as spin-on glass, a thin film of this solution is formed. A method may also be used in which two silicon substrates are brought into close contact with each other via a heat treatment to form a bonded body.

In addition, there is also a method of heating two silicon substrates in close contact with each other without using a liquid (Japanese Patent Publication No. 39-17869), a method of applying pressure at the same time as heating, and a method of using electrostatic force (
For example, M48 figure Japan Society of Applied Physics, Lecture Proceedings Volume 2,
536 page No. 18P-N-3> may be used.

(d) After bonding, mirror polishing is performed on the back surface of the silicon substrate 1 on which the Si:1 oxide film 3 is formed, and the end point is where the Si:1 oxide film 3 is exposed (indicated by the dashed line in FIG. 1(C)). do.

As a result, as shown in FIG. 2, each formed element forming region 5 is divided by the groove 2 and the silicon oxide film 3, and a silicon substrate having a completely element-isolated structure can be formed.

As described above, according to this embodiment, a silicon substrate having a plurality of electrically completely isolated element forming regions can be formed with a smaller number of processes than in the past.

FIG. 3 shows a part of an example of the manufacturing process of the semiconductor substrate manufacturing method of the second embodiment.

The feature of this embodiment is that when two silicon substrates, that is, a silicon substrate 1 in which a groove 2 is formed and a silicon substrate 7 as a support, are bonded together, the silicon substrate 7 as a support
The reason is that a silicon oxide film 6 is coated in advance. This film is formed by heating to 1000° C. in an oxygen gas atmosphere, for example.

Other steps are the same as in the first embodiment.

Therefore, according to this embodiment, in addition to having the same effect as the first embodiment, it is possible to form a thicker silicon oxide insulating film in the silicon substrate, thereby preventing pinholes etc. in the insulating film. Another advantage is that highly reliable element isolation can be achieved even when the device is used.

FIG. 4 shows a part of an example of the manufacturing process of the semiconductor substrate manufacturing method of the third embodiment. FIG. 5 is an enlarged plan view showing the substrate structure obtained by the third embodiment.

The feature of this embodiment is that after bonding two silicon substrates, the silicon substrate 1 on which the zigzag grooves 2 are formed and the silicon substrate 4 serving as a support, when performing mirror polishing on the back surface of the silicon substrate 1, The position where the silicon substrate 4 is exposed (the fourth
By etching or grinding to a point (indicated by the dotted chain line 1 in Figure (a)) and finally mirror polishing, a substrate as shown in Figure (b) is formed. Other steps are the same as in the first embodiment. As a result, as shown in FIG. 5, two types of element formation regions 5 and 8 are partitioned by the silicon oxide film 3, and a silicon substrate having a completely element-isolated structure can be formed.

According to this embodiment, in addition to having the same effect as the first embodiment, the element formation regions 5 and 8 are separated by the silicon oxide film 3. There is also an advantage that a power IC can be formed by forming a driving section or a control IC section in the element forming region 5.

Note that the etching or grinding in this embodiment is carried out until the silicon oxide film 3 is exposed in FIG. Alternatively, the substrate may be removed by selective etching to produce a substrate having the structure shown in FIG.

In addition, in this embodiment, since the edge portion of the oxide film 3 is sharp, when forming wiring etc. to connect the element group formed on the element formation region 8 and the element group formed on the element formation region 5, In some cases, a break may occur. To prevent this, the edges may be rounded, for example, by etching with an ammonium fluoride solution.

FIG. 6 shows a part of an example of the manufacturing process of the semiconductor substrate manufacturing method of the fourth embodiment.

The feature of this embodiment is that when two silicon substrates, that is, a silicon U plate 1 in which grooves 2 are formed and a silicon substrate 7 that serves as a support, are bonded to each other, the silicon substrate 7 that serves as a support
The purpose of this step is to cover the silicon oxide film 9 in advance and remove the oxide film 9 on the silicon substrate 7 exposed by polishing or the like by etching. The silicon oxide film is formed by heating at 1000° C. using, for example, an oxidizing gas. Other steps are the same as in the first embodiment.

After bonding the two silicon substrates 1 and 7 described above, the silicon substrate 7 is ground to a point U (indicated by the dashed line in FIG.
The structure shown in b) is obtained. Thereafter, the exposed oxide film 9 on the silicon substrate 7 is removed by selective etching using, for example, an ammonium fluoride solution to form a substrate having the structure shown in FIG. In order to form a structure as shown in FIG. 3(C), etching or grinding is performed at the exposed portion of the silicon oxide film 3 in FIG.
(a) to (indicated by the dotted chain line p), after which the exposed oxidation is carried out, for example with ammonium fluoride solution! ! 13
This may be done by selective etching.

Therefore, according to this embodiment, in addition to having the same effect as the first embodiment, since the element formation regions 5 and 8 are partitioned by thick oxide WA3, reliability is improved against pinholes etc. in the oxide film. High element isolation is possible. For example, a semiconductor element is formed in the element formation region 8, a driving semiconductor element is formed in the element formation region [5], and a sharp break in the oxide film 3 that causes a step break in the wiring connecting between the two ends [5 and 8] is formed. Another advantage is that the edges can be rounded without increasing the number of manufacturing steps.

FIG. 7 shows the method for manufacturing a semiconductor substrate according to the fifth embodiment.
It is a figure showing an example of a built I culm. In the following explanation (
The symbols for each item in a) to (f) are (a) to (f) in Figure 7.
Corresponds to each of the following.

(a) The surface of the silicon substrate 1 with the crystal plane (100) is polished to a mirror surface, and the surface of the silicon substrate 1 is partitioned into areas where elements will be formed (element formation areas) using a photo and etching process, and the areas are insulated. A groove 2 is formed for this purpose. Etching is done by masking the required part 5i31'J+Fi, 1-IF:HNO3:CF+3COOH=1:2:1
It was carried out for 30 seconds at 22°C using a solution with the composition of
Form a sardine with a width of 500 μm and a depth of 5 μm.

(b) In order to form an insulating layer on the entire surface of the silicon substrate 1 on which the silicon oxide is formed, dielectric silicon oxide [13] is heated at 1000°C in an oxygen gas atmosphere, and heated to 1000°C. Coat to a thickness of ~200OA.

(C) Polycrystalline silicon 10, which is an insulator, is formed to a thickness exceeding the depth of iM2 on a silicon substrate coated with silicon oxide film 3 and in which grooves 2 are formed. This polycrystalline silicon 10 is formed using a low pressure CVD method, a sputtering method, or the like.

(d) In order to polish and flatten the portion of the polycrystalline silicon 10 that exceeds the full depth, a silicon oxide film 3 is removed.
Mirror-polish the surface until it is exposed (as shown by the dotted chain line in Figure (d)).

(e) A silicon substrate 1 coated with a silicon oxide film 3 and with the inside of the groove 2 filled with polycrystalline silicon 10 is covered with another mirror-polished silicon substrate 4 that will serve as a support for an element forming area to be formed. They are brought into close contact in a clean room at room temperature, and then heated in oxygen gas at 1000° C. for 5 hours to obtain a bonded body.

Haku's method may also be used to obtain a zygote. For example, when two silicon substrates are brought into close contact with each other, a liquid that has associative properties and has a large structure, such as high purity (e.g. EL grade) methanol, ethanol, acetic acid, formic acid, aqueous ammonia, or ultrapure water, is used. Alternatively, a method may be used in which the substrates are brought into close contact with each other through a liquid and heat treated.

Furthermore, for example, Si, which is known as spin-on glass,
Using a solution that forms a solid oxide film through heat treatment, such as O2 coating liquid OCD (manufactured by Tokyo Ohka Kogyo Co., Ltd.), two silicon substrates are bonded together through a thin film of this solution. Alternatively, a bonded body may be formed by subjecting the bonded body to heat treatment.

(f) After bonding, mirror polishing is performed on the surface of the silicon substrate 111 on which the groove 2 is formed, and the end point is where the silicon oxide 11513 is exposed.

Therefore, according to this embodiment, since the grooves of the silicon substrate are also filled with polycrystalline silicon, which is an insulator, highly reliable element isolation is possible.

FIG. 8 shows an example of the manufacturing process of the semiconductor substrate manufacturing method of the sixth embodiment. In the following explanations (a) to (d)
Each item symbol corresponds to each of FIGS. 8(a) to (d).

<a> The surface of the silicon chain plate 1 with the crystal plane (100) is mirror-polished, and the surface of the silicon substrate 1 is divided into regions where elements will be formed (element formation regions) by photo and etching processes, and insulation is created between these regions. A groove 2 is formed for this purpose. For etching, mask the required areas with 3i3N4 film, and
Using a solution having a composition of F:HNO3:CH3C00H=1:2:1, this was carried out at 22° C. for 30 seconds to form a groove 2 having a width of 500 μm and a depth of 5 μm.

(b) At the same time, a step of forming a silicon oxide film on the silicon substrate 1 in which the groove 2 is formed and filling the inside of the groove 2 with the silicon oxide film is performed at the same time. As a method for forming this oxide film, for example, a coating solution for forming an SiO2 film known as spin-on glass is mixed with 0CD (trade name: Tokyo Ohka Kouha Co., Ltd.) and an Si alkoxide represented by Sl (OR)4 is mixed with an organic solvent such as ethanol. A solution prepared by adding water and an acid or a jg group for hydrolysis as necessary to *b dissolved in a solvent is used.

For the former, for example, a solution with Si wt% of 5.9 is used, and for the latter, for example, a solution with the following solution distribution is used.

Ethyl silicate JL/Si (OC2Hs)4 1
sof water (H20) 500ca
3! ! m (HCI>0.02
sol ethanol 300o
(3) Note that this mixed solution is used after being refluxed at 90° C. for 2 hours to ensure uniformity.

The method for forming the oxide film that will become the dielectric is to first apply a coating solution for forming a SiO2 film using a spinner to cover the surface as uniformly as possible.

Thereafter, a heat treatment is performed to form oxide a (SiO2 film) inside the groove and on the gold body on the surface of the silicon substrate 1, and the conditions are as follows, for example.

OCD: 30 minutes at 150°C in a nitrogen atmosphere, then 9
00℃ for 30 minutes Si alkoxide solution... 30 minutes at 120℃ under nitrogen aeration
0 min, then 60 min at 600°C. Note that the latter is Si (OC2Hs)4 +4H20→Si (
SiO2 is formed by the reaction Of-1>4 +402 Hs 0H 8i (OH)4→Si O2+ 2 H20↑.

The oxide film 11 formed in this way fills the trench 2 and is formed to a thickness exceeding the depth of the trench 2, and is formed on the silicon substrate 1.
Coat the entire surface flatly.

(C) Silicon substrate 1 coated with silicon oxide film 11
On the other hand, another mirror-polished silicon substrate 4 that is formed and serves as a support for the element forming area is closely bonded in a clean room at room temperature.
A zygote is obtained by heating for a period of time. In addition to this method, there are other bonding methods, such as a method in which two silicon M plates are brought into close contact with each other through a normal liquid containing water, methanol, ethanol, acetic acid, aqueous ammonia, formic acid, etc., and then heated. It may be.

(d > After bonding, the back surface of the silicon substrate 1 is mirror-polished to expose the silicon oxide film 11 (see figure (d)
> (indicated by a dotted chain line), and an element formation region 5 partitioned by an oxide film is formed.

According to this embodiment, in addition to having the same effect as the first embodiment, after forming a groove on a silicon substrate, a silicon oxide film is formed to fill the groove and simultaneously coat the entire surface of the substrate. Therefore, since no polishing process is required, device separation can be performed at low cost and with high reliability.

In this example, after forming the groove on the silicon substrate,
As shown in FIG. 9<a>, for example, in an oxygen gas atmosphere,
After heating at 1000° C. to coat the silicon oxide film, the step of filling the grooves (FIG. 9(b)) may be performed.

In Examples 1 to 6, a silicon oxide film was used as the dielectric film, but the present invention is not limited to this. For example, other oxide films by CVD method, plasma CVD method, direct nitriding method etc. Any material that has good insulation properties such as the nitride film formed by the method and is heat resistant in the manufacturing process may be used.

[Advantageous Effects of the Invention 1] As explained above, the present invention has the advantage that a semiconductor substrate having a plurality of electrically completely isolated element formation regions can be formed with a reduced number of processes. be. Another advantage is that two types of element formation regions can be formed at the same time. Furthermore, since the semiconductor substrate itself is used as the element formation region without requiring any particular process such as single crystallization, there is an advantage that the element formation region has good crystallinity. Furthermore, the dielectric film formed at the bottom of the groove serves as a guide for the end point of substrate polishing. Therefore, it is possible to perform substrate polishing with high precision, which was difficult to detect the end point in the past, without increasing the number of steps.It also has the advantage that by controlling the depth of the groove, the thickness of the element forming area can be controlled with high precision. . Furthermore, the method of the present invention has the economical advantage that no special equipment is required and it can be manufactured at low cost.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an example of the manufacturing process of the first embodiment of the method for manufacturing a semiconductor substrate according to the present invention, FIG. 3 is a diagram showing a part of an example of the manufacturing process of the second embodiment, and FIG. 4 is a diagram showing a part of the manufacturing process example of the second embodiment.
FIG. 5 is an enlarged plan view of the substrate structure obtained by the third embodiment, and FIG. 6 is a part of the manufacturing process example of the fourth embodiment. Figure 7 shows an example of the manufacturing process of the fifth embodiment), Figure 8 shows an example of the manufacturing process of the embodiment of Figure 6, and Figure 9 shows another example of the manufacturing process of the sixth embodiment. It is a figure which shows a part of example of a manufacturing process. 1.4.7... Silicon substrate 2... Groove 3.6.9
．． 10.11...Silicon oxide film 5.8...Element formation area Fig. 1 (c) Agent Patent attorney Yasuo Miyoshi Fig. 1 (d) 2nd rI! U chest of drawers 3

Claims (5)

[Claims] (1) A step of forming a groove reaching the outer edge of the substrate on the mirror surface of the first semiconductor substrate, a step of forming a dielectric layer on the mirror surface on which the groove is formed, and a step of forming a groove between the surface on which the dielectric layer is formed and a second semiconductor substrate. A method for manufacturing a semiconductor substrate, comprising the steps of: bonding semiconductor mirror surfaces; and removing the first semiconductor substrate from the non-mirror surface side of the first semiconductor substrate until at least a dielectric layer is exposed. (2) forming a groove on the mirror surface of the first semiconductor substrate; forming a dielectric layer on the mirror surface with the groove; and filling the groove with the dielectric layer with polycrystalline silicon; , a step of bonding the surface of the first substrate on which the dielectric layer is formed and a second semiconductor mirror surface; 1. A method for manufacturing a semiconductor substrate, comprising: removing a first semiconductor substrate. (3) A semiconductor substrate structure characterized in that, in the step of removing the first semiconductor substrate, a semiconductor element is formed on the first semiconductor substrate that remains separated by a dielectric layer. (4) forming a groove reaching to the outer edge of the substrate on the mirror surface of the first semiconductor substrate; forming a dielectric layer on the mirror surface with the groove; and forming a groove between the surface on which the dielectric layer is formed and the second surface; a step of bonding semiconductor mirror surfaces; and a step of bonding semiconductor mirror surfaces;
a step of removing the first semiconductor substrate until the dielectric layer in the groove formed in the semiconductor substrate disappears and a mirror surface of the second semiconductor substrate is exposed. (5) In the step of removing the first semiconductor substrate, a semiconductor element is formed on the first semiconductor substrate that remains separated by the dielectric layer, and a current drive semiconductor is formed on the mirror surface of the exposed second semiconductor substrate. A semiconductor substrate structure characterized by forming an element.