JPH0245945A - Circuit board - Google Patents
Circuit boardInfo
- Publication number
- JPH0245945A JPH0245945A JP19648288A JP19648288A JPH0245945A JP H0245945 A JPH0245945 A JP H0245945A JP 19648288 A JP19648288 A JP 19648288A JP 19648288 A JP19648288 A JP 19648288A JP H0245945 A JPH0245945 A JP H0245945A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- circuit board
- electrical characteristics
- hoop
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002184 metal Substances 0.000 claims abstract description 11
- 239000004020 conductor Substances 0.000 claims abstract description 8
- 239000011347 resin Substances 0.000 claims description 8
- 229920005989 resin Polymers 0.000 claims description 8
- 239000000853 adhesive Substances 0.000 claims description 5
- 230000001070 adhesive effect Effects 0.000 claims description 5
- 239000000758 substrate Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 3
- 238000000465 moulding Methods 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】 ［産業上の利用分野］ 本発明はフープ状回路基板の構造に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to the structure of a hoop-shaped circuit board.
［従来の技術］
従来の金属導体のみからなるフープ状基板本体１のリー
ド２は第８図に示すように全て工Ｃチップ４上のバンプ
あるいはパッド部に接合され、そのリード２は工Ｃチッ
プ４内外間の電気信号伝達の為に使われる。[Prior Art] As shown in FIG. 8, all the leads 2 of the hoop-shaped substrate body 1 made of conventional metal conductors are bonded to bumps or pads on the engineered C chip 4. 4 Used for electrical signal transmission between inside and outside.
［発明が解決しようとする課題］
しかし前述の従来技術では、ギヤングポンディング後、
工Ｃチップの電気特性をみる際、ＩＣをリード部で切断
し、フープから取り出さなければＩＣの電気特性を調べ
ることはできず、その後の工程では、量産性に秀れる、
というフープ形状の利点を生かすことができないという
問題点を有する。そこで本発明はこのような問題点を解
決するもので、その目的とするところは７−プ状のまま
で工Ｏの電気特性を測定するところにある。[Problem to be solved by the invention] However, in the above-mentioned conventional technology, after gigantic bonding,
When looking at the electrical characteristics of a manufactured C chip, it is impossible to examine the electrical characteristics of the IC unless the IC is cut at the lead section and taken out from the hoop.
The problem is that the advantages of the hoop shape cannot be taken advantage of. The present invention is intended to solve these problems, and its purpose is to measure the electrical properties of a metal oxide while it is still in the 7-ply shape.
［課題を解決するための手段］
（１） 本発明の回路基板は、ＩＣの外部接続部と接
合するリードを有し金属導体のみよりなるフープ状回路
基板において、工Ｃの前記外部接続部と接合するリード
以外にも金属導体がリード状にＩＣ側へ伸び、そのリー
ド状金属がＩＣ上のダミーパッドあるいはダミーバンプ
と接合されていることを特徴とする。[Means for Solving the Problems] (1) The circuit board of the present invention is a hoop-shaped circuit board made of only a metal conductor and having leads that connect to the external connection part of an IC. In addition to the leads to be joined, a metal conductor extends toward the IC in the form of a lead, and the lead-like metal is joined to a dummy pad or dummy bump on the IC.
（２） 前記リード状金属が工Ｃとモールド樹脂ある
いは接着剤により接合されていることを特徴とする。(2) The lead-shaped metal is bonded to the workpiece C using a molding resin or an adhesive.
Ｃ実施例］
第１図は本発明の実施例を示すフープ状基板とＩＣチッ
プのギヤングボンディング後の平面図であって、第２図
はその断面図である。１はフープ状基板本体、２はリー
ド、３はＩＣ支持用リード４は工Ｃチップ、５はリード
側もしくはバンプ側に設けられたバンプである。ＩＣ，
チップ４とリード２、工Ｃ支持用リード６はバンプ５を
介して接合されている。第３図は第１図で示した基板を
フープ状のままで電気特性が測定できるようにリード２
を切断した平面図である。ＩＣの電気特性はり−ド２に
電気特性測定用端子を当てることにより測定でき、また
、工Ｃチップ４はＩＣ支持用リード６によりフープ状の
基板本体１に固定されている。したがってフープ状のま
まで実装したＩＯの電気特性をみることができる。C Embodiment] FIG. 1 is a plan view of a hoop-shaped substrate and an IC chip after gigantic bonding, showing an embodiment of the present invention, and FIG. 2 is a cross-sectional view thereof. 1 is a hoop-shaped substrate main body, 2 is a lead, 3 is an IC supporting lead 4 is an engineered C chip, and 5 is a bump provided on the lead side or the bump side. IC,
The chip 4, the leads 2, and the leads 6 for supporting the workpiece C are connected via bumps 5. Figure 3 shows how to measure the electrical characteristics of the board shown in Figure 1 while keeping it in a hoop shape.
FIG. The electrical characteristics of the IC can be measured by applying an electrical characteristics measuring terminal to the beam 2, and the IC chip 4 is fixed to the hoop-shaped substrate body 1 by IC supporting leads 6. Therefore, the electrical characteristics of the IO mounted in the hoop shape can be observed.
第４図は本発明の他の実施例を示す平面図で、第５図は
その断面図である。６はモールド樹脂又は接着剤である
。ＩＣ支持用リード３は工Ｃチップ５とモールド樹脂又
は接着剤６で固着されており、電気特性を測定する際、
ＩＣチップ４はＩＣ支持用リード６によりフープ状の基
板本体１に固定されている為、７−プ状のままで実装し
たＩＣの電気特性を調べることができる。またモールド
樹脂６でＩＣチップ４と工Ｃ支持用リード６を固着する
際、第６図に示す様に、モールド樹脂で工Ｃチップ５の
全体を覆えば、工Ｃチップ５と工Ｃ支持用リード６を固
着する工程と一般的なモールド樹脂コートの工程が同時
に行うことができるので作業能率が向上し、更にリード
２の工Ｃ側かモールド樹脂６で覆われることにより、工
０チップ４を電気特性測定のため、リード２を切断した
際リード２の機械的強度を向上させることができる。FIG. 4 is a plan view showing another embodiment of the present invention, and FIG. 5 is a sectional view thereof. 6 is molding resin or adhesive. The IC support lead 3 is fixed to the engineered C chip 5 using mold resin or adhesive 6, and when measuring electrical characteristics,
Since the IC chip 4 is fixed to the hoop-shaped substrate body 1 by the IC supporting leads 6, the electrical characteristics of the mounted IC can be examined while the IC chip 4 remains in the hoop shape. Furthermore, when fixing the IC chip 4 and the lead 6 for supporting the workpiece C with the mold resin 6, as shown in FIG. The process of fixing the lead 6 and the general mold resin coating process can be performed at the same time, improving work efficiency.Furthermore, since the process C side of the lead 2 is covered with the mold resin 6, the process 0 chip 4 can be easily removed. When the lead 2 is cut for measuring electrical characteristics, the mechanical strength of the lead 2 can be improved.
第７図は本発明における工Ｃ支持用リード３の他の形状
例を示す。第７図に示す様にＩＣ支持用リード３の形状
、大きさ、位置はＩＣを支持するという目的を達するも
のであれば任意でよい。FIG. 7 shows another example of the shape of the lead 3 for supporting the workpiece C in the present invention. As shown in FIG. 7, the shape, size, and position of the IC supporting lead 3 may be arbitrary as long as it achieves the purpose of supporting the IC.
［発明の効果］
以上述べたように本発明によれば、金属導体のみよりな
る７一ブ状回路基板において、基板が１０支持用リード
を有し、そのＩＣ支持用リードを工Ｏへ接合もしくは接
着することにより、回路基板がフープ状のままで、実装
した工０チップの電気特性を測定でき、量産性の向上が
はかられる。[Effects of the Invention] As described above, according to the present invention, in a 7-tube-shaped circuit board made only of metal conductors, the board has 10 supporting leads, and the IC supporting leads are joined or connected to the IC. By adhering, the electrical characteristics of the mounted chip can be measured while the circuit board remains hoop-shaped, improving mass productivity.
第１図は本発明の回路基板の一実施例を示す正面図。
第２図は第１図の主要断面図。
第３図は第１図のリード切断後の平面図。
第４図は本発明の回路基板の他の実施例を示す平面図。
第５図は第４図の主要断面図。
第６図は第４図においてＩＣチップとＩＣ支持用リード
を接合する接合の他の実施例を示す主要断面図。
第７図は本発明におけるＩＣ支持用リードの形状に関す
る他の実施例を示す平面図。
第８図は従来例の回路基板を示す平面図。
１・・・・・・・・・フープ状基板本体２・・・・・・
・・・リード
３・・・・・・・・・工Ｃ支持用リード４・・・・・・
・・・ＩＣチップ
５ ・・・ ・・・ ・・・ ノ（ン プロ・・・・・
・・・・モールド樹脂または接着剤以上
出願人 セイコーエプソン株式会社
代理人 弁理士 鈴木喜三部（他１名）口
口
口
第
■
図
第２図
第９図
ζ
第２
図
口
口
口
第７図FIG. 1 is a front view showing an embodiment of the circuit board of the present invention. FIG. 2 is a main sectional view of FIG. 1. FIG. 3 is a plan view of the lead shown in FIG. 1 after being cut. FIG. 4 is a plan view showing another embodiment of the circuit board of the present invention. FIG. 5 is a main sectional view of FIG. 4. FIG. 6 is a main cross-sectional view showing another embodiment of joining the IC chip and the IC support lead in FIG. 4. FIG. 7 is a plan view showing another embodiment of the shape of the IC supporting lead in the present invention. FIG. 8 is a plan view showing a conventional circuit board. 1... Hoop-shaped substrate body 2...
...Lead 3......Work C support lead 4...
・・・IC chip 5 ・・・ ・・・ ノ（ノ）・・・
... Mold resin or adhesive or more Applicant Seiko Epson Co., Ltd. Agent Patent attorney Kizobe Suzuki (and 1 other person) 口口口 No. 2 Figure 9 ζ 2 Figure 口口 7 figure
Claims (2)
導体のみよりなるフープ状回路基板において、ＩＣの前
記外部接続部と接合するリード以外にも金属導体がリー
ド状にＩＣ側に伸び、そのリード状金属がＩＣ上のダミ
ーパットあるいはダミーバンプと接合されていることを
特徴とする回路基板。(1) In a hoop-shaped circuit board that has a lead that connects to the external connection part of the IC and is made only of metal conductors, in addition to the lead that connects to the external connection part of the IC, the metal conductor extends in the form of a lead toward the IC side. A circuit board characterized in that the lead-shaped metal is bonded to a dummy pad or dummy bump on an IC.
接着剤により接合されていることを特徴とする請求項１
記載の回路基板。(2) Claim 1 characterized in that the lead-shaped metal is bonded to the IC using a mold resin or an adhesive.
The circuit board described.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19648288A JPH0245945A (en) | 1988-08-06 | 1988-08-06 | Circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19648288A JPH0245945A (en) | 1988-08-06 | 1988-08-06 | Circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0245945A true JPH0245945A (en) | 1990-02-15 |
Family
ID=16358521
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19648288A Pending JPH0245945A (en) | 1988-08-06 | 1988-08-06 | Circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0245945A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02155248A (en) * | 1988-12-07 | 1990-06-14 | Nec Corp | Structure of tab |
| JPH09199532A (en) * | 1996-01-12 | 1997-07-31 | Nec Corp | Mounting method and mounting structure of semiconductor circuit |
-
1988
- 1988-08-06 JP JP19648288A patent/JPH0245945A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02155248A (en) * | 1988-12-07 | 1990-06-14 | Nec Corp | Structure of tab |
| JPH09199532A (en) * | 1996-01-12 | 1997-07-31 | Nec Corp | Mounting method and mounting structure of semiconductor circuit |
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