JPH0244717A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH0244717A JPH0244717A JP19657088A JP19657088A JPH0244717A JP H0244717 A JPH0244717 A JP H0244717A JP 19657088 A JP19657088 A JP 19657088A JP 19657088 A JP19657088 A JP 19657088A JP H0244717 A JPH0244717 A JP H0244717A
- Authority
- JP
- Japan
- Prior art keywords
- impurity
- semiconductor substrate
- shallow
- laser
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 32
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000012535 impurity Substances 0.000 claims abstract description 56
- 239000000758 substrate Substances 0.000 claims abstract description 43
- 230000005284 excitation Effects 0.000 claims abstract description 6
- 230000001678 irradiating effect Effects 0.000 claims description 5
- 238000000034 method Methods 0.000 claims description 5
- 230000001590 oxidative effect Effects 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 abstract description 7
- 238000009792 diffusion process Methods 0.000 abstract description 4
- 238000002955 isolation Methods 0.000 abstract description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 2
- 229920005591 polysilicon Polymers 0.000 abstract description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 19
- 238000010586 diagram Methods 0.000 description 9
- 238000005468 ion implantation Methods 0.000 description 7
- 230000001133 acceleration Effects 0.000 description 5
- 239000010408 film Substances 0.000 description 4
- 239000010409 thin film Substances 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004093 laser heating Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 239000002689 soil Substances 0.000 description 1
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は半導体装置作成における浅い不純物の拡散方法
に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a shallow impurity diffusion method in the fabrication of semiconductor devices.
従来の技術
近年、MOSトランジスタなどでは微細化や高速化の傾
向にあり、そのため、不純物を浅く導入する必要がある
。BACKGROUND OF THE INVENTION In recent years, there has been a trend toward miniaturization and higher speed in MOS transistors, etc., and therefore it is necessary to introduce impurities shallowly.
従来、不純物層の形成にあたっては、イオン注入により
不純物を導入した後、熱処理を行なって不純物を活性化
し、不純物層を形成するのが主流であった。さらに、イ
オン注入の際に低加速エネルギーを用いる技術やBF森
などのイオン注入により、浅い不純物層を形成している
。また、他にも、プラズマドーピングやレーザードーピ
ングにより不純物層を形成する技術が開発されてきてい
る。Conventionally, in forming an impurity layer, the mainstream method has been to introduce the impurity by ion implantation and then perform heat treatment to activate the impurity to form the impurity layer. Furthermore, a shallow impurity layer is formed by a technique that uses low acceleration energy during ion implantation or by ion implantation such as BF Mori. In addition, other techniques have been developed for forming impurity layers by plasma doping or laser doping.
発明が解決しようとする課題 しかし、従来の技術では以下に記すような課題がある。Problems that the invention aims to solve However, the conventional technology has the following problems.
■ イオン注入により不純物を注入した後に熱処理を行
なうと、低加速エネルギーやBF2を用いて浅い注入を
行なったとしても、熱処理の際に不純物が活性化する温
度まで上げねばならず、この温度では不純物の拡散は避
けられない。つまり、不純物層が広がってしまい深くな
ってしまう。■ If heat treatment is performed after implanting impurities by ion implantation, even if shallow implantation is performed using low acceleration energy or BF2, the temperature must be raised to the point at which the impurities are activated during the heat treatment, and at this temperature, the impurities The spread of is inevitable. In other words, the impurity layer spreads and becomes deeper.
■ 通常のプラズマドーピングでは、半導体基板温度を
上昇させなければ不純物が導入されない場合や、ドーピ
ングの際の不純物イオンの加速エネルギーが不均一であ
ることや、熱処理による活性化を行なわねばならないた
め、上記に記したのと同様に不純物層は深くなってしま
う。■ In normal plasma doping, impurities cannot be introduced unless the temperature of the semiconductor substrate is increased, the acceleration energy of impurity ions during doping is non-uniform, and activation by heat treatment is required. As mentioned above, the impurity layer becomes deep.
■ レーザードーピングでは、半導体基板表面を高温に
加熱し、溶融するため、表面の溶融・再結晶時に結晶欠
陥ができやすい。また、気相中の不純物ガスを半導体基
板表面で熱分解し基板中に拡散させる場合は、不純物ド
ーピングの効率が悪いため実用的でない。また、半導体
基板表面に不純物薄膜を形成した後、表面のレーザー加
熱を行なって拡散する場合、不純物薄膜と半導体基板の
間で結晶欠陥ができやすいことと、不純物薄膜のみを除
去するのは困難であるという課題があった。■ Laser doping heats the semiconductor substrate surface to high temperatures and melts it, so crystal defects are likely to occur during the melting and recrystallization of the surface. Furthermore, it is not practical to thermally decompose impurity gas in the gas phase on the surface of the semiconductor substrate and diffuse it into the substrate because the efficiency of impurity doping is poor. Furthermore, when an impurity thin film is formed on the surface of a semiconductor substrate and then diffused by laser heating the surface, crystal defects are likely to occur between the impurity thin film and the semiconductor substrate, and it is difficult to remove only the impurity thin film. There was an issue.
課題を解決するための手段
本発明は、半導体基板の一主面にECRプラズマ励起に
より不純物を前記半導体基板表面内に導入する工程と、
前記半導体基板表面にエキシマレーザ−を所望の量照射
する工程により、前記不純物を均一に浅く拡散するもの
である。Means for Solving the Problems The present invention provides a step of introducing impurities into one principal surface of a semiconductor substrate by ECR plasma excitation;
By irradiating the surface of the semiconductor substrate with a desired amount of excimer laser, the impurities are uniformly and shallowly diffused.
作用
ECRプラズマ励起により半導体基板表面の極浅い領域
に不純物層を形成した後、エキシマレーザ−を照射する
。エキシマレーザ−は、波長が短かく半導体基板表面の
浅い層で吸収されてしまうことや、高いレーザーパワー
を得ることができるので、レーザーにより加熱された基
板の熱が深く拡散していく前に、表面温度を上げること
ができ、半導体基板表面のみを加熱することができ、不
純物はこの加熱された領域極めて浅い領域のみに拡散さ
れる。またエキシマレーザ−の波長により、吸収される
深さが異なるため、数十nm〜数百nmまでの範囲での
加熱が可能であり、これにより数十nm〜数百nmの深
さの不純物層の形成および不純物の活性化が行なえると
いうものである。After an impurity layer is formed in a very shallow region of the surface of the semiconductor substrate by ECR plasma excitation, excimer laser irradiation is performed. Excimer lasers have short wavelengths that are absorbed by shallow layers on the surface of semiconductor substrates, and can obtain high laser power, so that the heat of the substrate heated by the laser is absorbed before it is diffused deeply. The surface temperature can be increased, and only the surface of the semiconductor substrate can be heated, and impurities are diffused only into this heated region, which is extremely shallow. In addition, since the absorption depth differs depending on the wavelength of the excimer laser, it is possible to heat in the range of several tens of nanometers to several hundred nanometers, thereby creating an impurity layer with a depth of several tens of nanometers to several hundred nanometers. formation and activation of impurities.
実施例 本発明の実施例を以下に記す。Example Examples of the present invention are described below.
第1の実施例
第1図は本発明の第1の実施例を説明するための深さ方
向の不純物濃度プロファイルを示す図である。まず、第
5図に示すようなECRプラズマ発生装置内に半導体基
板としての(100)P型Si基板1を設置した後、A
s H3ガスを導入して、ECR条件下でEC,Rプ
ラズマを発生させる。First Embodiment FIG. 1 is a diagram showing an impurity concentration profile in the depth direction for explaining the first embodiment of the present invention. First, after installing a (100) P-type Si substrate 1 as a semiconductor substrate in an ECR plasma generator as shown in FIG.
s H3 gas is introduced to generate EC,R plasma under ECR conditions.
る。ECRプラズマにより励起されたAs+イオンは発
散磁場により導かれSi基板1の表面に導入される。第
1図は横軸はSi基板1表面からの深さで、縦軸はAs
砒素濃度を示しており、第1図aはECRプラズマによ
りAsを導入した時の状態を示している。第1図aでわ
かる様に、Asは表面より0.1μm程度の浅い領域に
導入されており、表面濃度は非常に高くなっている。次
に、Asの導入されたSi基板1にArFエキシマレー
ザ−(193nl11)をN2雰囲気あるいは真空中で
適量照射すると、Si基板1表面の数十nm〜数百nm
のみ加熱される。この時、Si基板1中に導入されてい
たAsは拡散し第1図すに示す様な−様な濃度分布とな
るほか、Asの拡散する領域はレーザーにより加熱され
ている表面付近であるため、Asの広がりは制限され、
浅い領域にAsも均一に拡散することができる。その上
、Asは活性化するため浅いN型領域が形成できる。Ru. As+ ions excited by the ECR plasma are guided by a divergent magnetic field and introduced into the surface of the Si substrate 1. In Figure 1, the horizontal axis is the depth from the surface of the Si substrate 1, and the vertical axis is the As
The arsenic concentration is shown, and FIG. 1a shows the state when As is introduced by ECR plasma. As can be seen in FIG. 1a, As is introduced into a shallow region of about 0.1 μm from the surface, and the surface concentration is extremely high. Next, when the Si substrate 1 into which As has been introduced is irradiated with an appropriate amount of ArF excimer laser (193nl11) in an N2 atmosphere or vacuum, the surface of the Si substrate 1 is irradiated by several tens of nanometers to several hundred nanometers.
heated only. At this time, the As introduced into the Si substrate 1 diffuses, resulting in a --like concentration distribution as shown in Figure 1, and because the region where As diffuses is near the surface heated by the laser. , the spread of As is limited,
As can also be uniformly diffused into the shallow region. Moreover, since As is activated, a shallow N-type region can be formed.
また、第1実施例では不純物としてAsを用いたが、こ
れはB(ボロン)やP(リン)などの他の不純物であっ
ても同様に浅い拡散層を形成できる。Furthermore, although As was used as the impurity in the first embodiment, other impurities such as B (boron) and P (phosphorus) can be used to form a shallow diffusion layer in the same way.
第2の実施例
第2図は本発明の第2の実施例を説明するための工程断
面図であり、半導体基板として第2図(イ)に示すよう
に素子間分離用の5iO222が形成され、n+ポリシ
リコンゲート23.サイドウオール酸化膜25が形成さ
れた基板上に、ECRプラズマドーピングによりAsを
浅く導入した後、全面にエキシマレーザ−を照射しAs
を活性化してn十 型のソース26.ドレイン27を得
る。この際、エキシマレーザを用い、レーザーの照射さ
れた浅い領域のみの温度を上げるため、Asは活性化し
n土層を形成するか、深さ方向や槓方向の拡散は小さく
することが可能である。Second Embodiment FIG. 2 is a process sectional view for explaining the second embodiment of the present invention, in which 5iO222 for isolation between elements is formed as a semiconductor substrate as shown in FIG. 2(A). , n+ polysilicon gate 23. After shallowly introducing As into the substrate on which the sidewall oxide film 25 is formed by ECR plasma doping, the entire surface is irradiated with an excimer laser to form As.
Activate the n-type source 26. Obtain drain 27. At this time, an excimer laser is used to raise the temperature only in the shallow area irradiated with the laser, so As can be activated and form an n-soil layer, or diffusion in the depth direction or in the direction of the slope can be reduced. .
第3の実施例
第3図は本発明の第3の実施例を説明するための深さ方
向の不純物濃度プロファイルを示す図であり、まず、第
1実施例とほぼ同様にして、ECRプラズマドーピング
によりB(ボロン)をSi基板1の表面のごく浅い層に
ドーピングした後、850℃以下の温度(Bがほとんど
拡散しない温度)で酸化する。第3図Cに酸化後のB濃
度プロファイルを示す。次に酸化膜を除去した後、エキ
シマレーザ−を照射し、表面層を加熱してBを活性化す
る。レーザー照射後のB濃度プロファイルを第3図dに
示す。以上のように、酸化した後に酸化膜を除去するこ
とにより、ECRプラズマドーピングによってできた表
面付近のBの高濃度層を除去した後、エキシマレーザ−
加熱により拡散することで、浅い領域で一定濃度の層を
形成することができる。Third Embodiment FIG. 3 is a diagram showing an impurity concentration profile in the depth direction for explaining the third embodiment of the present invention. After doping B (boron) into a very shallow layer on the surface of the Si substrate 1, it is oxidized at a temperature of 850° C. or lower (a temperature at which B hardly diffuses). FIG. 3C shows the B concentration profile after oxidation. Next, after removing the oxide film, the surface layer is heated by irradiation with an excimer laser to activate B. The B concentration profile after laser irradiation is shown in FIG. 3d. As described above, by removing the oxide film after oxidation, the high concentration layer of B near the surface created by ECR plasma doping is removed, and then the excimer laser
By diffusing through heating, a layer with a constant concentration can be formed in a shallow region.
第4の実施例
第4図は本発明の第4の実施例を説明するための深さ方
向の不純物濃度プロファイルを示す図であり、まず、S
i基板1を酸化した後、ECRプラズマドーピングによ
りBをドーピングする。第4図eにドーピング後のB濃
度のプロファイルを示す。その後、酸化膜を除去した後
エキシマレーザ−を照射し表面層を加熱してBを活性化
して第4図fに示すような浅く均一な濃度のB層を形成
する。Fourth Embodiment FIG. 4 is a diagram showing an impurity concentration profile in the depth direction for explaining the fourth embodiment of the present invention.
After oxidizing the i-substrate 1, it is doped with B by ECR plasma doping. FIG. 4e shows the B concentration profile after doping. Thereafter, after removing the oxide film, the surface layer is heated by irradiation with an excimer laser to activate B, thereby forming a shallow B layer having a uniform concentration as shown in FIG. 4f.
以上第]の実施例から第4の実施例で述べてきたように
、不純物のドーピングとしてECRプラズマによるドー
ピングを用いて説明したが、これは、20KeV以下(
例えば10 K e V )の加速エネルギーを用いた
B層書のイオン注入で行なってもよい。例えば第6図g
に示すように1OKeVで注入した時の不純物プロファ
イルはECRプラズマドープで行なったものとほぼ同じ
である。しかし第6図りに示したように30KeVで注
入すると不純物のピークは半導体基板中にあられれる。As described above in the fourth embodiment] to the fourth embodiment, the explanation has been made using ECR plasma doping as the impurity doping, but this is less than 20 KeV (
For example, ion implantation may be performed in the B layer using an acceleration energy of 10 K e V). For example, Figure 6g
As shown in FIG. 2, the impurity profile when implanted at 10 KeV is almost the same as that performed by ECR plasma doping. However, as shown in Figure 6, when implanted at 30 KeV, a peak of impurity appears in the semiconductor substrate.
よって、およそ20 K e V以下での注入を行えば
、ECRプラズマドープの代わりにイオン注入を用いた
不純物ドーピングでも非常に浅い不純物層の形成ができ
る。また、エキシマレーザ−によるSi基板の加熱の例
としてArFエキシマレーザ−(193r+m)を用い
たが、これは他の波長のものでも良(、レーザーのパワ
ーや照射量は、それぞれ目的(例えば不純物層の深さを
変える)に適合した波長で、適量照射すれば、同様の結
果を得ることができる。さらに、ECRプラズマ発生装
置として第5図に示す様な装置を用いたが、これは、R
F印加型の装置を用いて、直流バイアス電圧を印加する
型の装置であってもさしつかえはない。Therefore, if implantation is performed at approximately 20 K e V or less, a very shallow impurity layer can be formed even with impurity doping using ion implantation instead of ECR plasma doping. In addition, although an ArF excimer laser (193r+m) was used as an example of heating a Si substrate with an excimer laser, it may also be of other wavelengths (the laser power and irradiation amount may be adjusted depending on the purpose (for example, impurity layer Similar results can be obtained by irradiating an appropriate amount with a wavelength suited to the R
A device of the type that applies a direct current bias voltage using an F application type device may be used.
発明の効果
本発明によれば、半導体基板表面のごく浅い領域に不純
物を導入した後、エキシマレーザ−により、表面の浅い
領域のみを加熱し、不純物を拡散、活性化するため、非
常に浅い不純物層の形成ができ、高速、微細化のトラン
ジスターに応用できる。Effects of the Invention According to the present invention, after impurities are introduced into a very shallow region of the surface of a semiconductor substrate, an excimer laser is used to heat only the shallow region of the surface to diffuse and activate the impurities. It can form layers and can be applied to high-speed, miniaturized transistors.
第1図は、本発明の第1の実施例を説明するための深さ
方向の不純物濃度プロファイル図、第2図は本発明の第
2の実施例を説明するための製造工程断面図、第3図は
本発明の第3の実施例を説明するための深さ方向の不純
物濃度プロファイル図、第4図は本発明の第4の実施例
を説明するための深さ方向の不純物濃度プロファイル図
、第5図は本発明の実施例に用いたECRプラズマ発生
装置の概略図、第6図はイオン注入により、不純物を導
入した際の加速エネルギーの違いにより、プロファイル
が異なることを説明するための説明図である。
21・・・・・・Si基板、26・・・・・・ソース、
27・・・・・・ドレイン。
代理人の氏名 弁理士 粟野重孝 ほか1名第
図
?3ボッシリコンケート
so ttyo tso wD
課さ(11仇)
9 府 15θ Uり
深ざ (常→
深さ(デ帆)
5tt rtro tso mθ深さ(ル九)
第
図
5tl 106 ぶ Vθ
深さ(nfyL)
尺八・室−
osoiθθ ぷ 濁
シ誓(さ (りtw)
第
図
、、t8L
::2[
so ttv tso ztリ
ラ揖ミさ (ガン〃t)
、、:B1FIG. 1 is an impurity concentration profile diagram in the depth direction for explaining the first embodiment of the present invention, FIG. 2 is a sectional view of the manufacturing process for explaining the second embodiment of the present invention, and FIG. 3 is an impurity concentration profile diagram in the depth direction for explaining the third embodiment of the present invention, and FIG. 4 is an impurity concentration profile diagram in the depth direction for explaining the fourth embodiment of the present invention. , FIG. 5 is a schematic diagram of the ECR plasma generator used in the embodiment of the present invention, and FIG. 6 is a diagram for explaining that the profile differs due to the difference in acceleration energy when introducing impurities by ion implantation. It is an explanatory diagram. 21...Si substrate, 26...source,
27...Drain. Name of agent: Patent attorney Shigetaka Awano and one other person 3 Bossilicate so ttyo tso wD Imposition (11) 9 Fu 15θ Uri depth (normal → depth (de sail) 5tt rtro tso mθ depth (le 9) Fig. 5tl 106 Bu Vθ depth (nfyL) Shakuhachi room - osoiθθ pu turbidity oath (sa (ri tw) fig.,, t8L ::2 [ so ttv tso zt lira shimisa (gan〃t) ,,:B1
Claims (3)
不純物を前記半導体基板表面内に導入する工程と、前記
半導体基板表面にエキシマレーザーを所望の量照射する
工程により、前記不純物を均一に浅く拡散することを特
徴とする半導体装置の製造方法。(1) The impurities are uniformly and shallowly diffused by a step of introducing impurities into the surface of the semiconductor substrate by ECR plasma excitation on one main surface of the semiconductor substrate, and a step of irradiating the surface of the semiconductor substrate with a desired amount of excimer laser. A method for manufacturing a semiconductor device, characterized in that:
不純物を前記半導体基板表面内に導入する工程と、前記
半導体基板を、前記不純物がほとんど拡散しない温度で
酸化する工程と、前記半導体基板上の酸化膜を除去する
工程と、前記半導体基板表面にエキシマレーザーを所望
の量照射する工程により、前記不純物を均一に浅く拡散
することを特徴とする半導体装置の製造方法。(2) A step of introducing an impurity into the surface of the semiconductor substrate by ECR plasma excitation into one main surface of the semiconductor substrate, a step of oxidizing the semiconductor substrate at a temperature at which the impurity hardly diffuses, and a step of A method of manufacturing a semiconductor device, characterized in that the impurity is uniformly and shallowly diffused by a step of removing an oxide film and a step of irradiating the surface of the semiconductor substrate with a desired amount of excimer laser.
程と、ECRプラズマ励起により不純物を前記半導体基
板表面内に導入する工程と、前記半導体基板表面の酸化
膜を除去する工程と、前記半導体基板表面にエキシマレ
ーザーを所望の量照射する工程により、前記不純物を均
一に浅く拡散することを特徴とする半導体装置の製造方
法。(3) On one main surface of the semiconductor substrate, a step of oxidizing the surface, a step of introducing impurities into the surface of the semiconductor substrate by ECR plasma excitation, a step of removing an oxide film on the surface of the semiconductor substrate, and a step of oxidizing the surface of the semiconductor substrate. A method of manufacturing a semiconductor device, characterized in that the impurity is uniformly and shallowly diffused by a step of irradiating a substrate surface with a desired amount of excimer laser.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19657088A JPH0244717A (en) | 1988-08-05 | 1988-08-05 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19657088A JPH0244717A (en) | 1988-08-05 | 1988-08-05 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0244717A true JPH0244717A (en) | 1990-02-14 |
Family
ID=16359938
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19657088A Pending JPH0244717A (en) | 1988-08-05 | 1988-08-05 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0244717A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6489207B2 (en) | 1998-05-01 | 2002-12-03 | International Business Machines Corporation | Method of doping a gate and creating a very shallow source/drain extension and resulting semiconductor |
US7800204B2 (en) | 2008-07-31 | 2010-09-21 | Mitsubishi Electric Corporation | Semiconductor device and method of fabricating the same |
JP2016122769A (en) * | 2014-12-25 | 2016-07-07 | 東京エレクトロン株式会社 | Doping method and manufacturing method of semiconductor element |
-
1988
- 1988-08-05 JP JP19657088A patent/JPH0244717A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6489207B2 (en) | 1998-05-01 | 2002-12-03 | International Business Machines Corporation | Method of doping a gate and creating a very shallow source/drain extension and resulting semiconductor |
US7800204B2 (en) | 2008-07-31 | 2010-09-21 | Mitsubishi Electric Corporation | Semiconductor device and method of fabricating the same |
US8420496B2 (en) | 2008-07-31 | 2013-04-16 | Mitsubishi Electric Corporation | Semiconductor device and method of fabricating the same |
JP2016122769A (en) * | 2014-12-25 | 2016-07-07 | 東京エレクトロン株式会社 | Doping method and manufacturing method of semiconductor element |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR19990022636A (en) | Shallow Depth Formation Method | |
JPH0669149A (en) | Fabrication of semiconductor device | |
KR100766254B1 (en) | Method for forming of junction for solar cell | |
US20100015788A1 (en) | Method for manufacturing semiconductor device | |
JPH0244717A (en) | Manufacture of semiconductor device | |
JP3293567B2 (en) | Method for manufacturing semiconductor device | |
JPH04287332A (en) | Manufacture of semiconductor element | |
JPH0677155A (en) | Heat treatment method for semiconductor substrate | |
JP2002246329A (en) | Formation method for very shallow p-n junction of semiconductor substrate | |
JP2009176808A (en) | Method of manufacturing semiconductor device | |
JP2000077350A (en) | Power semiconductor device and manufacture thereof | |
US20010018258A1 (en) | Method for fabricating semiconductor device | |
JPH10189949A (en) | Mos semiconductor device and manufacture thereof | |
JP4363827B2 (en) | Impurity diffusion method, semiconductor device, and manufacturing method of semiconductor device | |
JP5103695B2 (en) | Method for manufacturing field-effect semiconductor device | |
JPH0526343B2 (en) | ||
KR19990059071A (en) | Manufacturing Method of Semiconductor Device | |
JP2663523B2 (en) | Method of forming semiconductor oxide thin film | |
JPH01256124A (en) | Manufacture of mos type semiconductor device | |
JPH0595000A (en) | Manufacture of semiconductor device | |
JPH10233457A (en) | Manufacture of semiconductor device | |
JPH08186082A (en) | Manufacture of semiconductor device | |
JP3525464B2 (en) | Semiconductor device and method of manufacturing semiconductor device | |
JPH0661234A (en) | Production of semiconductor device | |
JPH05152227A (en) | Manufacture of semiconductor device improved diffusion region formation means |