JPH0242710A - Electrostatic joining jig - Google Patents

Abstract

PURPOSE:To provide an electrostatic joining jig capable of preventing defective joints reliably and capable of completing electrostatic joining in a short period of time by starting application of a voltage to a voltage applied surface of an insulator wafer from a central region having a predetermined small diameter and enlarging the voltage applied region from the central region towards the periphral region with the lapse of time. CONSTITUTION:An electrostatic connecting jig according to the invention comprises a central electrode 31, peripheral electrodes 32, 33 and an electrode driving mechanism. The contact area in which the jig is in contact with a voltage applied surface 20a of a insulator wafer 20 to be electrostatically joined to a semiconductor wafer 10 is enlarged from the central region towards the peripheral region with the lapse of time from the start of application of a voltage. For example, the area where a voltage is applied to the material set on the jig is enlarged from the central region towards the peripheral region of the voltage applied surface with the lapse of time by switching electrodes to be driven among a plurality of electrodes arranged concentrically. Accordingly, it is possible to minimize defective joints which would be observed as bubbles in the joint interface 10b between the semiconductor wafer 10 and the insulator wafer 20 or local projections or cracks in the semiconductor wafer 10. As a result, a semiconductor product having high reliability can be obtained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an electrostatic bonding jig, particularly for improving the mechanical strength of a semiconductor material having an electrical circuit formed on its main surface and facilitating its handling. The present invention relates to an improvement in a voltage application mechanism in an electrostatic bonding jig for electrostatically bonding an insulating material to the semiconductor material.

[Prior art] An insulator material such as crystallized glass or glass, which acts as a solid electrolyte at high temperatures and has a coefficient of thermal expansion close to that of a semiconductor material, is layered on top of a semiconductor material and heated to around 400°C, so that the insulator material side An electrostatic bonding method (Japanese Patent Publication No. 53-287
47) is well known, and in recent years, electrostatic bonding between wafers has also been attempted.

FIG. 4 shows a setting diagram for electrostatic bonding of a semiconductor wafer and an insulator wafer according to a conventional method.

In the figure, a glass wafer 2 is placed as an insulating material on a semiconductor wafer 1 on which an electric circuit (not shown) is formed on the main surface 1a, and the two materials 1 and 2 have a smooth bonding surface 1b and a They are superimposed at 2b.

A bonding jig 3 is further placed on the voltage application surface 2a of the glass wafer 2, and the bonding jig 3 applies a negative voltage applied from a power source 4 to the entire voltage application surface 2a of the glass wafer 2. In order to apply the voltage evenly, the bonding surface 3a is larger than the glass wafer voltage application surface 2a.

After setting as described above, a strong bonding effect can be obtained by applying a voltage between the main surface 1a of the semiconductor wafer 1 and the bonding jig 3 while heating both materials to around 400°C. It will be done.

[Problems to be Solved by the Invention] However, when such a conventional electrostatic bonding method is implemented, FIG. 5 (A) showing a plan view of a bonded sample.
As is clearer, poor bonding areas 100 frequently occur,
There was a problem in that the yield of finished semiconductor products deteriorated.

FIG. 2B shows a side cross section of the bonded sample, and it is understood that the defective bonding area 100 appears as a local protrusion of the semiconductor wafer 1 at the bonding interface and can be observed from the main surface 1a side.

According to the inventors' investigation into the occurrence of such a poor bonding area 100, as long as the conventional mechanism shown in FIG. It has been found that if this is done, a poor bonding area 100 will occur in some way.

Conversely, if the heating temperature was set to a value higher than 450°C, such product defects would not occur, but semiconductor wafers have multiple electrical circuits formed using thermal diffusion and vapor deposition techniques. Therefore, bonding by applying a temperature exceeding 450°C and a voltage reaching the dielectric breakdown range for a long period of time leads to deterioration of the characteristics and reliability of the manufactured semiconductor products. is also not suitable.

The process of generating the poor bonding area 100 will be explained with reference to FIG.

Figure (A) shows a partial cross section of the joint between the semiconductor wafer 1 and the glass wafer 2 before voltage is applied, and shows both materials 1 and 2.
The bonding surfaces 1b and 2b are in contact with each other at at least three or more contact points C1 as a whole.

Next, in this state, when a voltage is applied between the semiconductor wafer 1 and the bonding jig 3 using the electric current [4], an electrostatic force acts instantaneously over the entire surface between the bonding surfaces 1b and 2b, and as shown in FIG.
), the electrostatic bonding action proceeds starting from the contact point C1, and the bonding action further develops from the resulting new contact point C2, and thus the electrostatic bonding progresses one after another from the new contact points.

However, since the distance between the contact points Cl and C2 is different between the semiconductor wafer 1 side and the glass wafer 2 side, when the electrostatic bonding action is finished, the distance between the contact points Cl and C2 is different from that on the semiconductor wafer 1 side, which has low rigidity, as shown in FIG. A poor bonding area 100, which can be observed as a localized protruding strain or, in some cases, as a crack in the semiconductor wafer 1, occurs. Furthermore, if the contact points C1 and C2 are located closer to the periphery of the bonding surfaces 1b and 2b, the poor bonding area 100 will be formed in an extremely large area at the center of the bonding surfaces.

On the other hand, if there are small areas of poor bonding that cannot be detected by simple observation, these minute areas are likely to be overlooked during the inspection process, and the reliability of manufactured and commercially available semiconductor products will be significantly impaired. It ends up.

According to the investigation results of the present inventors, the occurrence of the defective bonding area 100 becomes more pronounced in proportion to the increase in the diameter of the wafers to be bonded, and the determination of the presence or absence of the defective bonding area was conducted in accordance with Japanese Patent Laid-Open No. 58-1489495. It has been found that it is extremely difficult to detect from the quality of the monitor diagram of the current flowing during electrostatic bonding disclosed in the publication.

Purpose of the Invention The present invention has been made in view of the above-mentioned conventional problems, and its purpose is to minimize the occurrence of defective bonding areas during electrostatic bonding between a semiconductor material and an insulator material, and to manufacture a semiconductor material. The object of the present invention is to provide a new electrostatic bonding jig that can improve the reliability of finished semiconductor products and reduce costs.

[Background Art] The occurrence of bonding failure areas is caused by the voltage application being performed by placing a bonding jig 3 having a larger area than the voltage application surface 2a of the glass wafer, as shown in FIG. An electrostatic force acts almost instantaneously over the entire area between the bonding surface 1a of the glass wafer 2 and the bonding surface 2a of the glass wafer 2, and as a result, the electrostatic bonding at the bonding surface of the two materials progresses irregularly. It is caused by

Although the semiconductor wafer 1 and the glass wafer 2 are in a superposed state, since the glass wafer 2 is simply placed on the other semiconductor wafer 1, the bonding surfaces 1b and 2 are
b is not completely in contact with the entire surface.

If a voltage is momentarily applied over the entire area in this state, variations in the junction state will inevitably occur.

Therefore, in the present invention, such bonding failures can be minimized by setting the most important extremely narrow area from the bonding surface as the starting point for voltage application, firmly holding that point, and then gradually expanding the electrostatic bonding effect toward the end. We have found that this can be suppressed to a minimum.

That is, a configuration was adopted in which the electrostatic force upon voltage application was made to advance regularly from the center of the glass wafer 2 to the periphery.

This method focuses on the fact that the formation of a poor bonding region can be reliably suppressed by applying electrostatic force only to the central portion at least when voltage application is started, and then gradually expanding it to the peripheral portion as time passes.

In order to confirm the effect of this idea, the present inventors first improved the bonding jig 3 shown in FIG. is applied, that is, the voltage application surface 2b of the glass wafer 2
Using a bonding jig with a small area that contacts only the center, the following experiment revealed that electrostatic bonding actually progresses from the center to the periphery.

The setting diagram is shown in FIG. 7, in which a semiconductor wafer 1 and a glass wafer 2 are electrostatically bonded at a temperature of 360°C and a voltage of 800V.

Here, based on the above point of view, the electrostatic bonding jig 5 for applying the voltage from the power source 4 to the voltage application surface 2a of the glass wafer 2 is designed so that the contact surface to the glass wafer 2 is 5a is formed into an extremely thin cylindrical shape of about 4Ill12, and this electrostatic bonding jig 5 is attached to the glass wafer 2.
is placed at the center of the voltage application surface 2a. The electrostatic bonding jig 5 is made of stainless steel, and the semiconductor wafer 1 has a diameter of 76.2 mm (3 inches) and a thickness of 450 μm.
m N conductivity type silicon is used.

From this state, a voltage was applied for about 5 minutes to the voltage application surface 2a of the glass wafer 2 by the power supply 4 via the bonding jig 5. As a result, the bonding surfaces 1b and 2b of the semiconductor wafer 1 and the glass wafer 2 It was confirmed that the electrostatic bonding was extremely good without any poor bonding in the central region corresponding to the abutment position. It has also been found that by further extending the voltage application time, the desired bonding can be achieved up to the vicinity of the periphery without any problem.

However, in this method, since the diameter of the bonding jig 5 is extremely small, if the bonding jig 5 is only placed in the center, the electrostatic bonding effect will inevitably tend to weaken toward the periphery, and it will not be possible to complete the bonding completely. However, it is impossible to maintain a good bonding effect all the way to the peripheral edges of the bonding surfaces 1b and 2b of both members 1 and 2.

In addition, when the diameter of the semiconductor wafer and glass wafer is larger, the electrostatic bonding effect from the narrow bonding jig placed in the center propagates to the peripheral edge, and it takes time to complete the bonding effect. There is a problem in that it takes a long time and it becomes difficult to quickly complete the electrostatic bonding up to the peripheral edge.

In addition, when considering the problem of the apparatus according to FIG. 7, the time spent on electrostatic bonding can be somewhat reduced by increasing the area of the contact surface 5a of the bonding jig 5, and it is possible to reduce the time spent on electrostatic bonding from the center to the periphery. It is also possible to speculate that the bonding action may be performed well. However, the outer diameter of the joint surface 5a is 30I.
If it exceeds about IIIl, on the contrary, a small joint failure area tends to occur in the center of the joining jig, which is not appropriate.

In view of the above experimental results, the inventors of the present invention have developed a method to ensure that electrostatic bonding between a semiconductor wafer and a glass wafer progresses from the center toward the periphery in a short period of time while reliably eliminating the occurrence of bonding failure areas. With this problem in mind, the area of the insulator wafer in contact with the voltage application surface is expanded over time from the center to the periphery as described below, and an operating mechanism is provided for this purpose. Two types of electrostatic bonding jigs were proposed.

[Means for Solving the Problems] In order to achieve the above object, the present invention starts applying a voltage to the voltage application surface of an insulating wafer at a predetermined small diameter in the center, and gradually increases the voltage from the center with the passage of time. This is due to the expansion towards the periphery.

The electrostatic bonding jig according to the invention described in claim (1) of the present application includes:
In an electrostatic bonding jig for applying a voltage to an insulator wafer placed on a semiconductor wafer and electrostatically bonding the two, the insulator wafer is placed opposite to and in close proximity to the voltage-applied central portion of the insulator wafer. a central electrode disposed; at least one peripheral electrode formed in a ring shape so as to surround the central electrode; an electrode drive mechanism that switches the electrode in contact with the voltage application surface from the central electrode to the peripheral electrode;
It is characterized by including.

Further, the electrostatic bonding jig according to the invention described in claim (2) applies a voltage to an insulator wafer placed on a semiconductor wafer to electrostatically bond the two. In the jig, a metal diaphragm is held above the insulator wafer with a gap that prevents it from coming into suction contact with the voltage application surface of the insulator wafer due to electrostatic force generated when voltage is applied; The diaphragm is characterized by comprising a pressure adjustment means for pressurizing the diaphragm so that the area in contact with the voltage application surface of the insulator wafer expands over time from the center to the periphery. .

The specific detailed configuration will be explained below.

The electrostatic bonding jig according to the invention described in claim (1) of the present application includes a central electrode placed at the center of the voltage application surface of an insulating wafer, and a conductive material formed in a ring shape surrounding the central electrode. and at least one peripheral electrode, and further includes an electrode drive mechanism for switching the electrode in contact with the voltage application surface of the insulator wafer from the central electrode to the peripheral electrode over time during voltage application. include.

When applying a voltage, first, only the center electrode is brought into contact with the voltage application surface of the insulator wafer, and then, as time passes, the outer peripheral electrodes are brought into contact with the voltage application surface of the insulator wafer. I'll let you do it. At this time, in order to prevent the occurrence of a bonding failure area, the operating direction of the electrodes from the center to the periphery must be maintained, but when the outer periphery electrodes are contacted, the inner electrodes are not necessarily connected to the insulator wafer. There is no need to keep them in contact.

Further, as a drive mechanism for switching and driving each of the electrodes, either mechanical or electrical means can be used.

Next, the electrostatic bonding jig according to the invention described in claim (2) does not have a plurality of independently driven electrodes like the first type, but the amount of deflection increases when a voltage is applied to insulate the jig. A single diaphragm of flexible metallic material is used such that the area of contact with the energized surface of the body wafer increases from the center to the periphery.

This diaphragm is held at a predetermined gap so that it does not come into contact with the insulator wafer due to electrostatic attraction generated between the diaphragm and the insulator wafer when voltage is applied.

Also in this type of invention, a means for applying pressure to the diaphragm is provided, whereby a predetermined pressure is applied so that the diaphragm contacts the insulator wafer with a predetermined narrow area at the time when voltage application starts. is added to the diaphragm, and the contact area between the diaphragm and the voltage application surface can be expanded from the center toward the periphery over time.

[Function] According to the present invention configured as described above, only the center electrode or the center portion of the diaphragm contacts the voltage application of the insulator wafer with a predetermined narrow diameter of the circumscribed circle when voltage is applied. do not have. Therefore, the electrostatic force acting on the bonding surface is concentrated approximately at the center, and the area to be electrostatically bonded gradually progresses from the center toward the periphery. However, since no electric field acts on the center of the bonding surface, the speed at which the electrostatic bond progresses toward the periphery is rate-limited.

According to the invention described in claim (1) of the present application, the peripheral electrode located outside the center electrode contacts the voltage application surface, and in the invention described in claim (2), the pressure applied to the diaphragm is By increasing the area of the diaphragm in contact with the voltage application surface, the progress of the area where electrostatic bonding is made toward the periphery is again increased.

As time passes, in the first type of invention, the outer peripheral electrode is brought into contact with the voltage application surface, and in the second type of invention, the pressure applied to the diaphragm is further increased to apply the voltage. By further enlarging the area of the diaphragm in contact with the surface, it is possible to achieve a good electrostatic bonding area all the way to the peripheral edge without causing any non-bonding areas.

If it is determined that the electrostatic bond has reached the periphery, the voltage should be increased within a range that does not adversely affect the characteristics of the semiconductor product being manufactured to obtain a more reliable electrostatic bond. Needless to say, this is a good thing.

[Effects of the Invention] As explained above, according to the present invention, the contact area of the insulator wafer to the voltage application surface that is electrostatically bonded to the semiconductor wafer changes from the center to the periphery as the voltage application start time elapses. Since the configuration is such that the bonding area is expanded toward the bonding surface between the semiconductor wafer and the insulator wafer, the occurrence of non-bonded areas observed as bubbles or local protrusions or cracks on the semiconductor wafer at the bonding interface between the semiconductor wafer and the insulator wafer is minimized. This makes it possible to obtain extremely reliable semiconductor products.

Furthermore, the time spent on electrostatic bonding between a semiconductor wafer and an insulator wafer can be significantly reduced because it does not just passively wait for it to spread to the periphery as in conventional methods, and the semiconductor products manufactured It also has no effect on the cost.

[Example] Hereinafter, preferred embodiments of the present invention will be described based on the drawings.

FIG. 1 shows the setting state before the start of voltage application when electrostatically bonding a semiconductor wafer and a glass wafer, which is an insulating material, using an electrostatic bonding jig according to the first type of the present invention. (A) is a front view, and (B) is its I-1 = cross section.

In the figure, a silicon wafer 10 is placed on a positive electrode plate 30 made of stainless steel so as to be electrically connected to the electrode plate 30. The diameter is 76.2111 m (3 inches) and the thickness is 450. The czm N conductive silicon wafer 10 includes a plurality of electrical circuits (not shown) formed on its main surface 10a.

On the other hand, a Virex glass wafer 20 having a diameter of about 76.2 mm5 and a thickness of ILIlffl is placed so that its bonding surface 20b overlaps the bonding surface 10b of the silicon wafer 10.

The characteristic feature of this embodiment is that the voltage application to the materials to be welded set as described above is applied over time from the center of the voltage application surface to the periphery by switching drive of a plurality of concentrically arranged electrodes. The configuration is such that the voltage application area is expanded as time progresses.

That is, above the polymerized silicon wafer 10 and Pyrex glass wafer 20, there is a cylindrical center electrode 31 with a diameter of 10 mm, a first circumferential internal electrode 32 formed in a ring shape surrounding the center electrode, and a first peripheral inner electrode 32 formed in a ring shape to surround the center electrode. A concentric electrode portion having a three-stage configuration is provided, which includes a second circumferential internal electrode 33 formed further outside the single circumferential internal electrode 32 . Each of the three electrodes is made of stainless steel, and the inner box 1 and the peripheral electrode are provided with heat-resistant lead wires 310 to 3 that supply a negative voltage from the power source 50 to the three electrodes.
Holes 32s and 33s are formed for connecting 3c.

A single shaft 80 is provided through the center of the three concentric electrodes 31 to 33 and has collars 301 to 303 that engage with the respective electrodes.

A screw gear 88 is cut into the upper part of the shaft 80, and its upper end is elastically fixed to a support plate 200 via a coil spring 201.

A gear 89 operated by a lever 90 meshes with the shaft 80 on the side of the screw gear 88. When the lever 90 is operated in the direction of the arrow in the figure, the gear 89 rotates counterclockwise to move the shaft 80 downward, and each collar 301 to 303 is moved in accordance with the amount of operation.
The central electrodes 31 to 33 that engage with the voltage application surface 20a of the Pyrex glass wafer 20 come into contact with the voltage application surface 20a of the Pyrex glass wafer 20. Furthermore, if the lever 90 is operated in the opposite direction, each of the electrodes 31 to 33 will similarly move upward in accordance with the amount of operation.

Next, the operation will be explained.

First, when starting voltage application, the center electrode 31
Only the voltage application surface 20 of the Pyrex glass wafer 20
This is done by moving the lever 90 a predetermined amount in the direction of the arrow in the figure to move the shaft 80 downward, and until then the shaft 80 is kept away from the voltage application surface 20a by the flange 301 of the shaft 80. The central electrode 31, which had been held in contact, moves downward in the vertical direction, is no longer held by the collar 301, and is placed on the voltage application surface 20a as shown in the figure.

As a result, a voltage of approximately 1ooov is applied from the power supply 50 from the central electrode 31 to the voltage application surface 20 of the Pyrex glass wafer.
A, the silicon wafer 10 and the Pyrex glass wafer 20 are electrostatically bonded from the center and gradually move toward the periphery.

Note that at this time, the first peripheral electrode 32 and the second peripheral electrode 33
are held at the flanges 302 and 303 of the shaft 80, respectively, so as not to come into contact with the voltage application surface 20a.

Then, after about one minute has passed, the poor bonding area has become considerably larger than the surface 31a of the central electrode 31. From this state, the lever 90 is operated in the same direction again to move the shaft 80 further downward, thereby bringing the first peripheral electrode 32 into contact with the voltage application surface 24, expanding the area on which the electrostatic force acts, and further bonding. Expanding the area. At this time as well, the second peripheral electrode 33 is held by the cap 303 and is in a non-contact state with the voltage application surface 20g.

After approximately 1 minute has passed, the bonding region has progressed almost to the vicinity of the peripheral edge without forming a defective bonding area. Then, further operate the lever 90 to move the shaft 80 downward,
By bringing the surface 33a of the second circumferential internal electrode 33 into contact with the voltage application surface 24, the electrostatic bonding effect is completely spread to the peripheral edge of the bonding surface of both materials, and the electrostatic bonding effect is completely stabilized within about 3 minutes from the start of voltage application. Electrical bonding will be completed.

Although this example shows a mechanical method using gears as the electrode drive mechanism, it goes without saying that other mechanical or electrical methods can also be used as long as they achieve the same effect. do not have.

Further, in the illustrated example, a combination of a silicon wafer 10 with a diameter of 3 inches and a Pyrex glass wafer 20 is used as the material to be bonded, but there is no need to be particularly limited to these dimensions, and the center electrode can be adjusted according to the size of the materials. The shape and size of the peripheral electrodes and the number of peripheral electrodes can be changed as appropriate.

FIG. 2 shows an electrostatic bonding process between a silicon wafer 10 and a Pyrex glass wafer 20 using a second type of electrostatic bonding jig according to the present invention, similar to the first embodiment. Same figure (A)
is before voltage change, (B) is at the start of voltage application, and (C) is
indicates the state at the end of voltage application. Note that the temperature during electrostatic bonding, the voltage applied from m150, the material and shape of the positive electrode plate, etc. are the same as in the first embodiment, and therefore their explanation will be omitted.

A feature of this embodiment is that a single diaphragm bellows is used as a voltage supply means to the voltage application surface 20a of the Pyrex glass wafer 20 instead of the plurality of concentric electrodes in the first embodiment. That is, in the same figure (A), there is a distance Jl -1au above the superposed semiconductor wafer 10 and the Pyrex glass wafer 20.
A diaphragm bellows 41 made of a stainless steel material with a thickness of 50 μm is arranged across from the diaphragm bellows 41 with a collar portion 96 provided on a pile 95 made of a stainless steel material with an outer diameter of 100 mm and a wall thickness of about 2.5 mm. It is fixed by welding.

In the state before voltage application as shown in FIG. Even when a voltage is applied, the diaphragm bellows 41 and the voltage application surface 20a of the Pyrex glass wafer 20 do not come into contact due to the action of electrostatic force.

From this state, the voltage application start state shown in FIG. A pressure Pi of 1 kg-f/cm2 is applied.

As a result, the bonding region between the silicon wafer 10 and the Pyrex glass wafer 20 gradually moves from the center toward the periphery without causing a bonding failure area.

Then, the pressure applied to the diaphragm bellows 41 is increased, and at the end of the voltage application as shown in FIG. P2 was applied, and the operation was performed so that the contact portion between the diaphragm bellows 41 and the voltage application surface 20a had a diameter d2 - about 70 ma. As a result, it was confirmed that perfect electrostatic bonding could be achieved all the way to the periphery without any defective bonding areas.

As explained above, by using the electrostatic bonding jig of the present invention according to the above embodiments, the electrostatic bonding between the semiconductor wafer and the insulator wafer can be bonded with high reliability in a relatively short period of time without causing bonding failure. Bonding can be achieved.

FIG. 3 shows a modification of the electrostatic bonding jig according to the first type of the present invention. In the drawings, the same components as those in the first embodiment are denoted by the same reference numerals, and the explanation thereof will be omitted.

The characteristic feature of this embodiment is that instead of switching and driving the electrodes over time as in the first embodiment,
Multiple stages of concentrically arranged electrodes are placed on an insulator wafer in advance, and the electrodes to which voltage is applied are switched over time from the center to the periphery without moving the electrodes themselves. It has a configuration that can be switched by operation.

That is, in the figure, as in the first embodiment, a voltage applying means is provided in which a central electrode 31' and first and second peripheral electrodes 32' and 33' are combined concentrically.
These are already placed directly on the Pyrex glass wafer 20 before the voltage application starts. Of course, the material is also stainless steel. And each of these electrodes 31'' to 33
' are each electrically insulated from each other with a gap of approximately 2II11.

From this state, when starting voltage application, switch S1 is turned on so that a negative voltage is applied only to the central electrode 31'', and as a predetermined time elapses, switch S2 and switch S3 are turned on.
are turned on in order to cause electrostatic bonding to occur from the center to the periphery.

Therefore, in the first embodiment, the first type of electrostatic bonding jig of the present invention was described as having an actuation mechanism for sequentially bringing the center electrode and the peripheral electrode into contact with the glass wafer.
As in this example, the center electrode and all the peripheral electrodes are placed on the voltage application surface of the glass wafer prior to voltage change, and when the voltage changes, electrostatic bonding is effected by simple switching using an electrical method. Even if the structure is configured such that the area is expanded, it is possible to reliably suppress the occurrence of a defective bonding area, and the electrostatic bonding action can be completed in a short time.

[Brief explanation of the drawing]

FIG. 1 is a front view and a plan view showing a first embodiment of electrostatic bonding using an electrostatic bonding jig according to the first type of the present invention, and FIG. A process diagram showing a second embodiment of electrostatic bonding performed using an electrostatic bonding jig, FIG. 3 is a diagram showing a modification of the electrostatic bonding jig according to the first type of the present invention, and FIG. 4 is a diagram showing a conventional electrostatic bonding jig. Fig. 5 is a plan view and front view of a sample electrostatically bonded using a conventional electrostatic bonding jig, and Fig. 6 shows the problematic bonding defect area. FIG. 7 is a setting diagram of electrostatic bonding showing the point of view leading to the electrostatic bonding jig of the present invention. 10... Semiconductor wafer 10b... Electrostatic bonding surface 20 of semiconductor wafer...
- Glass wafer 20a... Voltage application surface 20b of glass wafer
... Electrostatic bonding surface 30 of glass wafer ... Positive electrode plate 31 ... Center electrode 32, 33 ... Peripheral electrode 41 ... Metal diaphragm bellows 50 ...
Power supply 80...Axle 90...Lever 95...Vibe 100...Poor connection area 200...Support plate 201...Coil spring kido or 2nd type Hitori Rinri Tsuden Mochiai Kata Jr.・2 Do static C
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Claims (2)

[Claims] (1) In an electrostatic bonding jig for applying a voltage to an insulator wafer placed on a semiconductor wafer and electrostatically bonding the two, a jig that faces the center of the voltage application surface of the insulator wafer. a central electrode disposed in close proximity to the central electrode; at least one peripheral electrode formed in a ring shape to surround the central electrode; an electrode drive mechanism that switches an electrode in contact with a voltage application surface of the body wafer from a central electrode to a peripheral electrode;
An electrostatic bonding jig characterized by comprising: (2) In an electrostatic bonding jig for applying a voltage to an insulator wafer placed on a semiconductor wafer to electrostatically bond the two, the voltage of the insulator wafer due to the electrostatic force generated when voltage is applied is A metallic diaphragm is held above the insulator wafer with a gap that does not come into suction contact with the application surface, and a region where the diaphragm contacts the voltage application surface of the insulator wafer when voltage is applied is changed over time. an electrostatic bonding jig, characterized in that it includes a pressure adjusting means for pressurizing the diaphragm so that the pressure increases from the center to the periphery of the diaphragm.