JPH0241540A - Interface diagnosing system - Google Patents

Abstract

PURPOSE:To immediately detect a fault of an interface by checking a driver and a receiver of a host device side, whenever one data is sent out, and subsequently, checking return data which has been brought to logical inversion from a subordinate device. CONSTITUTION:When a host device varies a sampling signal Sa to an 'L' level from 'H', a driver 1a is disabled, and also, a sampling signal Sb becomes an 'L' level, therefore, a driver 2b is enabled, and an 'L' level of return data Ob is sent out to a data bus B. Subsequently, an 'L' level is obtained in received data 1a through a receiver 1b. In this case, the host device can decide whether data has been transferred normally to a subordinate device or not in accordance with whether data which has been brought to logical inversion has been obtained or not. In such a way, the data transfer is executed, while confirming the data which has been returned by sending out the data to the subordinate device.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an interface diagnosis method for information processing devices, etc., and particularly to diagnosis of an output interface.

[Conventional technology]

Conventionally, diagnosis of this type of output interface has been performed only during initial diagnosis at the beginning of use or only when an abnormality occurs.

[Problem to be solved by the invention]

The above-described conventional output interface diagnostic method is limited to initial diagnosis or when an abnormality occurs, and therefore has the disadvantage that if a failure occurs during operation, it may become unrepairable.

[Means to solve the problem]

The configuration of the output interface of the present invention is such that, in a digital data output interface of 1 bit or more, a bidirectional bus is configured with a driver/receiver pair on both the upper device side and the lower device side, and the sampling signal from the upper device is triggered. It has a buffer that temporarily holds data as a buffer, and a negative circuit that logically inverts the output of the buffer and returns it to the upper device, and sends the data to the lower device and confirms the returned data. The feature is that data can be transferred while

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, in which a higher-level device and a lower-level device are connected.
is a driver, lb, 2a and 6 are receivers, 3 is a buffer, 4a and 4b are inverter circuits, and 7 is a delay circuit.

It is assumed that the buffer 3 is triggered by the rise of the sampling signal S0 and holds the state of the received data.

When the E terminal of the drivers 1a and 2b is at H” level,
■The terminal status shall be output.

Now, the output data ○, is H'', and the sampling signal S
When , is set to ゛°H'' level, it becomes a data bus.

B becomes 'H' level, and the received data 1. via receiver 1b becomes '' level. At this time, the host device is driver 1. , it becomes possible to diagnose the receiver 1b.

The data is transmitted to the lower device via the data bus B, and is transmitted to the receiver 2.
The received data Ib is at the "H" level.

On the other hand, the sampling signal Sa is a dry parameter, receiver 6
and a sampling signal S via a delay circuit 7. is H”
Using this rise as a trigger, the buffer 3 holds the received data Ib at the "H" level, and its output is passed through the NOT circuit 4a, and the return data O5 is logically inverted and becomes the "L" level.

Further, since the sampling signal Sb goes to the °'L°° level through the NOT circuit 4°, the driver 2b is disabled.

The host device changes the sampling signal Sa from “H° to” L
When the driver 1a is changed to the "L" level, the driver 1a is disabled and the sampling signal Sb becomes the L level, so that the driver 2. is enabled, and the "L" level of return data 05 is sent to data bus B.

Received data 1. through receiver 1b. The "L" level is obtained. At this time, the higher-level device can determine whether or not the data has been normally transferred to the lower-level device, depending on whether or not logically inverted data is obtained. The delay circuit 7 is for delaying the triggering of the buffer 3 until the received data Ib is determined.

〔Effect of the invention〕

As explained above, in the present invention, each time one piece of data is sent,
By checking the driver/receiver on the higher-level device side and then checking the logically inverted return data from the lower-level device, it is possible to diagnose the interface during operation, making it possible to immediately detect interface failures. Become.

B...Data bus, 1. , Ib... Received data, O
l...Output data, ○b...Return data, S,
.

Sb+So"' sampling signal, la, 2b, 5...
Driver, lb, 2a, 6...Receiver, 3...Buffer, 4a, 4b...Negation circuit, 7...Delay circuit.

Claims (1)

[Claims] In a digital data output interface of 1 bit or more, a bidirectional bus is configured with a driver/receiver pair on both the upper and lower device sides, and buffers and buffers that temporarily hold data triggered by a sampling signal from the upper device. The device has a negative circuit for logically inverting the output of the device and returning it to the upper device side, and data is transferred while sending data to the lower device and checking the returned data. Characteristic interface diagnosis method.