JPH02305459A - Hybrid integrated circuit device - Google Patents

Abstract

PURPOSE:To effectively connect an EPROM chip with a microcomputer and to enable a data wire not to be led around by a method wherein the electrode of an EPROM chip fixed onto a header formed on a primary face exposed outside of a board is connected to a lead-out lead connected to a conductive path through a bonding wire. CONSTITUTION:A header is provided at an optional position on a primary face exposed outside of a board 2, a non-volatile memory chip 6 is fixed onto the heater 4, the electrode of the memory chip 6 is connected to a lead-out lead 5b connected with a conductive path 5 through a bonding wire. By this setup, the mounting position of the non-volatile memory chip 6 can be optionally set, so that the EPROM chip 6 and a microcomputer can be effectively connected together. Moreover, as only the non-volatile memory chip 6 is fixed to the header 4 provided to the primary face exposed outside of the board 2 and all other elements 8 are housed in a sealed space 21 formed of the board 2 and a case material 9, a hybrid integrated circuit device of this design can be miniaturized.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field The present invention is an integrated circuit board equipped with a chip-type non-volatile memory, such as an EPROM built-in EFROM (ultraviolet erasable programmable read-only memory). The present invention relates to a type of hybrid integrated circuit device.

(b) Conventional technology An EP having an ultraviolet irradiation window that can erase and rewrite previously written memory information by irradiating it with ultraviolet rays.
ROM elements are favorably used in various electronic devices.

Currently, most of these EPROM elements are mounted on printed wiring boards together with control or driving integrated circuits, and in order to rewrite the information once written, they are usually mounted on easily removable printed wiring boards. has been done. For various electronic devices that require smaller size and lighter weight, a semiconductor integrated circuit (IC) chip is directly mounted on a printed wiring board using a technique called chip-on-board, and after the required wiring is done, this The IC chip, including the wiring portion, is covered with synthetic resin, making it extremely compact and lightweight.

On the other hand, EPROM chips that require an ultraviolet irradiation window cannot be made smaller and lighter because the irradiation window is a bottleneck and they are still manufactured in a cerdip package and mounted on a printed wiring board.

The mounting structure of such a conventional EPROM element will be explained with reference to FIG. 9. FIG. 9 is a perspective view with a partial cross section of a conventional EPROM element, in which a conductive wiring pattern (41) is formed on the main surface. Through holes (43) in an insulating substrate (42) made of glass, epoxy resin, etc.
) is incorporated in a cerdip type package and is equipped with an EPROM element (44). This EPROM element (4
4) has a header (45) and a cap (46), and the header (45) is bonded to the ceramic base material (47) with an external lead (48) or a low melting point glass material. In addition, this header (45) has an element mounting part (50
) is on the low melting point glass material or ceramic substrate (47)
The EPR is attached to the element mounting part (50).
The OM chip (51) is mounted with the ultraviolet irradiation surface facing up, and the electrode of this chip (51) and the external lead (4)
8) are connected by a thin metal wire (52). The cap (46) is a storage member, and the EPROM
A window (5) is provided in the part facing the ultraviolet irradiation surface of the chip (51).
3), the cap (46) is connected to the header (45) by a low melting point glass.
The EPROM chip (51) placed in the holder is hermetically sealed. EPR with EPROM chip (51) sealed like this
The OM element (44) is fixed by soldering by inserting the external lead (48) into the through hole (43) of the insulating substrate (42>).The through hole (43) is connected to the conductive wiring pattern (41). The required wiring is routed by the above method, and the male connector terminal portion (55) provided at the end of the insulating substrate is connected to a female connector (not shown).

Now, the mounting structure of such a conventional EPROM element is
Compared to the ROM chip (51), the package external size is extremely large, and not only the surface area occupancy is also three-dimensional, that is, the height is several times the height of the chip, which is extremely disadvantageous for making it into an I-type. Furthermore, after the external lead is inserted into the through hole (43), it is necessary to fix it with solder or the like. Another major drawback that should be noted is that EP
This involves assembling some ROM elements into a package. E
Since the PROM element has a window for irradiating ultraviolet rays, its package is assembled into a ceramic-based cerdip type package, but since this package is sealed with low-melting glass, it can be heated at high temperatures (400 to SOO℃). )
If the thin metal wires that serve as a seal and connect the electrodes (aluminum) of the EPROM chip and the external leads are not made of the same material, alloying will occur, resulting in increased wiring resistance and wire breakage. To avoid such a situation, thin aluminum wire is usually used, but this EPROM
Since the chip needs to have the substrate at ground potential, EP
The ground electrode of the ROM chip is connected by wire to the chip mounting portion formed of gold paste. Here, too, a secondary or multi-component alloy reaction progresses between the gold or metals such as foil in the gold paste and the aluminum, so a small piece of silicon whose head is coated with aluminum, called a ground die, is used. Separately from the EPROM chip, it is fixed to the chip mounting part made of the gold paste, and this ground die head and the EPR
Conventional mounting structures are unsatisfactory in terms of small size, light weight, and low cost, as they involve extremely complicated work of connecting the OM chip to the ground electrode.

In order to solve this problem, the EPROM shown in FIG.
There is an implementation structure.

The EPROM mounting structure shown in FIG. 10 will be explained below.

An insulating substrate (6
0> has a chip mounting area (60c) on which an EPROM chip (61) is placed, and the wiring pattern (60b)
) is routed from near the area on the main surface (60a) and connected to a male connector terminal portion (not shown).

The area (60c) contains an EPROM chip (61).
is mounted, and the surface electrode of this chip (61) and the wiring pattern (60b) are connected by a thin metal wire (62). Of course, one of the thin metal wires (62) is connected to the chip (
In order to connect to the substrate of 61), this chip (
61) is wired with the wiring pattern (60b) mounted thereon. On the ultraviolet irradiation surface (61a) of the EPROM chip (61) is an ultraviolet transparent resin (63).
(For example, manufactured by Toshisha Co., Ltd., model name TX-978), an ultraviolet-transparent window material (64) is fixed thereto. This window material (6
4) is a known ultraviolet transparent material such as quartz or transparent alumina. Then, the top surface (64a) of the window material (64)
) is the surface that introduces light to the ultraviolet irradiation surface of the EPROM chip (61), so the remaining window material (64) portion excluding this top surface (64a), the thin metal wire (62), and this metal The connecting portion between the thin wire (62) and the wiring pattern (60b) is made of synthetic resin (65) (for example, manufactured by Nitto Denko Corporation,
It is fully coated with model name MP-10). If the insulating substrate (60), the E P ROM chip (61) and the window material (6
If it is necessary to further reduce the total thickness including 4), the chip mounting area (60c) of the substrate (60) can be counterboreed to hold about half the thickness of the substrate (60). Also, if you make a counterbore hole like this, you can use synthetic resin (
65) is formed and acts effectively against the infiltration of moisture.

The EPROM mounting structure shown in FIGS. 9 and 10 is described in Japanese Patent Laid-Open No. 60-83393 (HO5K 1/18).

(c) Problems to be Solved by the Invention In the EPROM mounting structure shown in FIG. 10, the EPROM chip is die-bonded onto the printed circuit board, so it goes without saying that the size is reduced. The miniaturization referred to here is simply the miniaturization of the EPROM itself. In other words, although it is not clear from Figure 1O, since the microcomputer and its peripheral circuit elements fixed around the EFROM are composed of discrete electronic components, the When looking at the entire system as an integrated circuit, there is a problem in that the size of the printed circuit board increases as before, without any reduction in size, that is, the overall system increases in size.

Also, in the mounting structure shown in FIG. 9, as in FIG. 10, the peripheral circuits of the EFROM, that is, the circuit elements such as the microcomputer and its peripheral LSIs and ICs, are composed of discrete electronic components. However, there is a major problem in that the printed circuit board becomes larger, that is, the entire system becomes larger, making it impossible to provide an integrated circuit equipped with an EPROM that is light, thin, short, and small enough to meet the demands of users.

Furthermore, in the EPROM mounting structure shown in FIGS. 9 and 10, the entire system becomes larger as described above, and the conductive patterns that connect the EFROM and its surrounding circuit elements are exposed, which reduces reliability. There is a problem of deterioration.

Furthermore, in the EPROM mounting structure shown in FIGS. 9 and 10, the EPROM and surrounding circuit elements such as a microcomputer, IC, and LSI are completely exposed.
There is a problem that unevenness occurs on the upper surface of the substrate, making it difficult to handle and reducing workability.

(d) Means for Solving the Problems The present invention has been made in view of the above-mentioned problems, and includes providing a header at a desired position on the main surface exposed to the outside of the substrate,
A nonvolatile memory chip is fixed on the header, and the electrodes of the memory chip and the lead-out leads connected to the desired conductive paths are connected with bonding wires, and the microcomputer and all other circuit elements are connected to the board and case material. It is characterized by a structure that is sealed in a sealed space formed by.

Therefore, a hybrid integrated circuit equipped with an EPROM can be made extremely compact.

(f) Function As described above, according to the present invention, a header is provided at a desired position on the main surface exposed to the outside of the substrate, a nonvolatile memory chip is fixed on the header, and the electrodes of the memory chip and the desired position are fixed. Since the conductive path and the connected lead are connected with bonding wires, the mounting position of the nonvolatile memory chip can be set arbitrarily, and the electrical connection with the built-in microcomputer is taken into account, resulting in high efficiency. EPROM chip and microcomputer can be connected,
It is possible to eliminate the need for signal lines, that is, routing lines for conductive paths.

Furthermore, the most closely related microcomputer can be placed adjacent to the EPROM chip, and the data line for exchanging data between the EPROM chip and the microcomputer can be realized with the shortest or minimum distance. This minimizes the loss of data and enables high-density packaging.

Furthermore, in the present invention, only the nonvolatile memory chip is fixed to the bracket provided on the main surface exposed to the outside of the substrate, so all other circuit elements are placed within the sealed space formed by the substrate and case material. Since it is housed, it is possible to provide a compact and high-density mounted hybrid integrated circuit device.

Embodiments The hybrid integrated circuit device of the present invention will be explained in detail below based on the embodiments shown in FIGS. 1 to 815!3.

1 and 2 show a hybrid integrated circuit device (1) according to an embodiment of the present invention. This hybrid integrated circuit device (1) is used as an independent electronic component and is used as an integrated circuit having independent functions in a wide range of fields such as computers.

As shown in FIGS. 1 and 2, this hybrid integrated circuit device (1) includes an integrated circuit board (2) and a header provided at a desired position on the main surface exposed outside of the integrated circuit board (2). (
4), a conductive path (5) of a desired shape formed on the integrated circuit board (2), a nonvolatile memory chip (6) fixed on the header (4), and data from the memory chip (6). The microcomputer (7) is supplied with a microcomputer (7), its peripheral circuit elements (8), and a case material (9) that is integrated with the substrate (2).

The integrated circuit board (2) is a hard substrate made of ceramics, glass epoxy, metal, or the like, and in this embodiment, a metal substrate with excellent heat dissipation and mechanical strength is used.

As the metal substrate, for example, an aluminum substrate having a thickness of 0.5 to 1.011111 is used. As shown in FIG. 3, an aluminum oxide film (9') (alumite layer) is formed on the surface of the substrate (2) by well-known anodic oxidation.
An insulating resin layer (10) made of epoxy, polyimide, etc. with a thickness of 10 to 70 μm is adhered to the main surface side. Furthermore, an insulating resin layer (
On 1o), a copper foil (11) having a thickness of 10 to 70 μm is adhered simultaneously with the insulating resin layer (10) by means such as a roller or hot press.

On the surface of the copper foil (11) provided on the -main surface of the substrate (2), a conductive path of a desired shape is exposed by screen printing and masked with a resist, and a precious metal (gold, silver, platinum) plating layer is formed. The surface of the copper foil (11) is plated. After that, the resist was removed and copper foil (1
Etching step 1) is performed to form a desired conductive path (5). Here, the thinness of the conductive path (5) by screen printing is limited to 0.5al, so when an ultra-fine wiring pattern is required, the ultra-fine conductive path (5) up to about 2μ can be formed using well-known photo-etching technology. Formation becomes possible.

A header (4) is provided on the main surface exposed to the outside of the substrate (2), and a non-volatile memory chip (6) is mounted on the header (4).
microcomputer (7) supplied with data from
) and its peripheral circuit elements (8) are mounted.

Further, a conductive path (5) is extended to the negative side of the substrate (2) or to the peripheral edge of the opposite side, and a plurality of pads for fixing external lead terminals (12) are formed. An external lead terminal (12) is fixed to this pad by solder.
It is drawn out horizontally and bent at a substantially right angle at its center.

EPROM (Er
asable Programmable Read 0
(Hereinafter, the nonvolatile memory chip (6) will be referred to as an EPROM chip.) As is well known, this EPROM chip (6) is an EPROM chip.
Heavy molecules accumulated in the bloating gate formed in the pellet of chip (6) (program data)
It is an element that can be used by irradiating it with light to excite it, returning it to an unmemorized state, and rewriting it. The EPROM chip (6) is not limited as long as it is commercially available, and its description will be omitted here.

On the other hand, in the present invention, when the EPROM chip (6) is mounted on the substrate, it is fixed on the header (4) as described above. More specifically, the header (4) is provided at a desired position on the main surface exposed to the outside of the substrate (2), and the E
The electrodes of the PROM chip (6) are connected to lead-out leads (5b) connected to the conductive paths (5) by bonding wires.

Furthermore, in this embodiment, the header (4) to which the EPROM chip (6) is fixed is not placed directly on the substrate (2), but is placed on the substrate (2) via the header mounting body (4a). There is.

The header mounting body 4a) is made of an insulator such as ceramics, glass epoxy, or insulating resin, and is formed into a convex shape as shown in FIG. The header (4) is formed of a metal layer on the bottom surface of the mounting body (4a) formed in a convex shape, and a metal layer such as copper foil, gold, silver, etc. is used as the metal layer. In addition, the mounting body (4a) has a substrate (
2) - A metal lead-out lead (5b) is buried inside to connect the conductive path (5) formed on the main surface (inner surface side) and the electrode of the EPROM chip 7 board (6). It is integrally formed in a similar manner.

The header mounting body (4a) is fitted into a hole (5C) previously provided in the substrate (2) and integrated with the substrate (2). As a result, the header (4) formed on the mounting body (4a) is exposed to the outside of the substrate (2). The mounting body (4a) fitted into the hole (5C) of the substrate (2)
) One end of the lead-out lead (5b) embedded in the board (2)
It is connected to the conductive path (5) formed above by solder (or wire line), and the other end of the lead-out lead (5b) is connected to the EPROM chip (5) fixed on the header (4).
6) is connected to the electrode with a bonding wire.

Furthermore, a header (4a) is mounted on the top surface of the header mounting body (4a).
) and the auxiliary frame (4b) surrounding the wire line are mounted on the mounting body (
4a). The space surrounded by the auxiliary frame (4b) is filled with ultraviolet-transparent resin that transmits ultraviolet rays, and the EPROM chip (6) is fixed on the header (4).
) to cover and protect. The first layer of resin directly coated on the EPROM chip (6) is an ultraviolet transparent resin (21a) because it is necessary to transmit ultraviolet rays when erasing data on the EPROM chip (6). The ultraviolet-transparent resin (21a) is not limited as long as it is non-aromatic, and for example, methyl-based silicone rubber or silicone gel may be used.

In this embodiment, the second resin layer (21b) is filled on the first resin layer (21a). Unlike the first layer, the second resin layer uses an ultraviolet opaque resin (21b) that blocks ultraviolet rays to prevent erroneous erasing of the EPROM chip (6). This resin layer (21b) is not limited as long as it contains an aromatic ring (benzene ring),
For example, epoxy or polyimide resin is used.

On the other hand, the ICs, transistors, chip resistors, chip capacitors, etc. of the microcomputer (7) and its peripheral circuit elements (8), which are supplied by selecting the program data of the EPROM chip (6), are chip components that have the desired conductivity. The microcomputer (7) is attached to the path (5) by soldering or by a brazing material such as Ag paste.
and the circuit element (8) is bonded to a nearby conductive path (5). Furthermore, a carbon resistor by screen printing or a nickel-plated resistor by nickel plating is formed as a resistance element between the conductive paths (5).

The substrate (2) is fixedly integrated with the case material (9).

The case material (9) is made of thermoplastic resin as an insulating member, and as shown in FIG. 2, it is formed into a box shape so that a space is formed when it is fixed to the substrate (2). The peripheral edge of the box-shaped case material (9) is placed approximately at the peripheral edge of the substrate (2), and is coated with an adhesive sealant (J sheet: product name).
It is firmly fixed and integrated with the substrate (2). As a result, a predetermined sealed space (21) is formed between the substrate (2) and the case material (9).

By the way, the mounting body (4a) on which the header (4) is formed
When the board (2) is fitted into the hole provided in the board (2), the board (2)
) One end of a conductive path (5) extends around the hole, and the conductive path (5) and the lead-out lead (5b) of the mounting body (4a) are connected by solder or the like. A part of the other end of the conductive path (5) connected to the lead-out lead (5b) extends near the microcomputer (7) and is electrically connected to the chip-shaped microcomputer (7) with a bonding wire. There is.

Here, the positional relationship between the EPROM chip (6) and the microcomputer (7) will be described. A mounting body (4) on which an EPROM chip (6) is mounted via a header (4).
a) and the microcomputer (7) are connected via a large number of conductive paths (5), so in order to shorten the length of the conductive paths (5), a header is installed that carries an EPROM chip (6). (4) That is, the header mounting body 4a) and the microcomputer (7) are arranged so as to be adjacent to each other or as close as possible to each other. Therefore, the EPROM chip (6) and the microcomputer (7)
) and the conductive path (5) can be formed over the shortest distance, and the mounting area on the board can be used effectively. EPRO
A mounting body (4a) on which a header (4) carrying an M chip (6) is mounted and a chip-shaped microcomputer (7) placed near or adjacent to the mounting body (4a) are ) is extended near the conductive path (
5) E is connected by bonding to the tip part and wire wire.
It is electrically connected to the PROM chip (6>).

By the way, since the EPROM chip (6) is mounted via the header (4) provided on the main surface exposed to the outside of the board (2), only the EPROM chip (6) is mounted outside the board. The microcomputer (7) and its peripheral circuit elements (8) other than the EPROM chip (6) are arranged in a sealed space (21) formed by the substrate (2) and the case material (9). It turns out.

As mentioned above, the microcomputer (7) and its peripheral circuit elements (8) are connected to the EPROM chip (6).
) is set to be placed in a sealed space (21) formed by the substrate (2) and the case material (9).

More specifically, all elements such as chip-shaped electronic components and resistance elements such as printed resistors and plated resistors are located in the sealed space (21
).

In this embodiment, when data is to be erased from the EPROM chip (6), the ultraviolet opaque resin (21b) is peeled off and ultraviolet rays are irradiated, and when data is to be rewritten, the EPROM chip (
6) Peel off the UV-transparent resin (21a) on the top and apply the bonder.
A terminal such as a probe is brought into contact with the lead-out lead (5b) in the vicinity of the readout lead (5b), and data is written by the writing device. At this time, the UV-transparent tree Jl! ] (21a), the resin (21a) does not have very strong adhesive strength, so the wire will not be cut.

A specific example of a hybrid integrated circuit device for a modem using the present invention will be shown below.

What is a modem? A modem exists for data communication in which digitized data handled by a data terminal such as a personal computer is sent and received at a distance using a telephone line. The function of a modem is to modulate digitized data using the frequency that can be used on the telephone line, convert it into an analog signal, and send it on the telephone line, and to send an analog signal that is modulated with the data sent from the other party. It has the ability to demodulate and return to digitized data.

The modem will be briefly explained based on the block diagram shown in FIG.

FIG. 4 is a block diagram when the modem is mounted on the integrated circuit board (2).

The modem has a DTE interface (31) that stores data sent from the computer in its built-in memory and outputs the data, and a DTE interface (31).
A microcomputer (7) that outputs a predetermined output signal based on the data output from the microcomputer (7), and an EPR that contains data addressed by the microcomputer (7).
The output signals from the OM chip (6) and the microcomputer (7) are modulated and demodulated to the NCU (NETWORK C0).
the first and second modulation/demodulation circuits (32) (33) that output to the microcomputer (7); 34).

The DTE interface (31) is, for example, 5TC961.
0 (Seiko Epson), etc., and as shown in Figure 5, there is a part of the transmitting memory (35 ), a receiving memory part (36) that stores signals supplied with output signals from the microcomputer (7) in the built-in memory and outputs them to the personal computer (38), a transmitting memory part (35), and a receiving memory part (35). It consists of a control section (37) that switches the respective signals outputted via the memory part (36), and has a predetermined function for connecting the personal computer (3g) and the microcomputer (7). be.

The microcomputer (7) is, for example, 5TC9620 (
It consists of ICs such as Seiko Epson), as shown in Figure 6.
A command recognition unit that recognizes the output signal that can be output from the DTE interface (31), a command decoding unit that decodes the output signal recognized by the command recognition unit, and a command decoding unit that decodes a part of the memory based on the signal decoded by the command decoding unit When incorrect data is supplied to the command execution unit as a result of comparing the data of the command execution unit and the data of the command decoding unit and the data in the memory part, the DTE interface (31) and a response code generation section that outputs an output signal.

The modulation/demodulation circuit (38) converts the digital signal sent from the microcomputer (7) into an analog signal and sends it to the NC
Send to U department. On the other hand, it converts the analog signal sent from the NCU section into a digital signal and sends it to the microcomputer (7), and includes low-speed and medium-speed circuits. First modulation/demodulation circuit (32
) is a 300 bps low speed modulation/demodulation circuit, and the second modulation/demodulation circuit (33) is a 1200 bps medium speed modulation/demodulation circuit. Respective first and second modulation/demodulation circuits (32) (3
3), one of the modulation and demodulation circuits is selected by the microcomputer (7).

DTMF generator (34) is a microcomputer (7)
The incorrect data output from the command execution part of COL, RO
A predetermined DTMF signal is generated by inputting it to the input terminal of each W, and is output to the transmitting AMP (39) to supply the signal to the telephone line.

Program data for setting various modes of the modem is stored in the EPROM chip (6) and is supplied to the microcomputer (7) based on the address of the microcomputer (7).

Next, the operation of the modem will be briefly explained.

First, to start communication with a personal computer, the control switch (40) operates based on a read signal from the microcomputer (38), and predetermined address data is read from the EFRO.
EPRO supplied to M(7) and based on its address
The program data of the M chip (6) is supplied to the microcomputer (7), and the communication standard (BELL/CCITT standard) and communication speed (30
0/1200 bps), data format matching, and various modes such as depth switch mode switching are checked.

Assuming the various modes match, enter the answering modem's phone number into your computer.

The phone number is the DT for interfacing with the computer.
E-interface (31) and forwarded to the microcomputer (7) for decoding the telephone number.

Send the decoded result to the DTMF generator (34),
A DTMF signal is transmitted from the DTMF generator (34), and the signal is sent to the transmitting AMP (39) and the line transformer (41).
transferred to a regular telephone line.

The transferred DTMF signal sends a paging signal to the modem on the responding side, and the modem on the responding side receives the paging signal and automatically receives the call. Then, the modem on the responding side sends an answer tone for the connection procedure to the modem on the calling side.

The modem on the calling side passes through a line transformer (41) and a receiving amplifier (42), and a low-speed modulation/demodulation circuit (32) determines whether or not the answer tone is a predetermined answer tone for the modem on the calling side. To detect. If it is a predetermined answer tone, the communication state is entered.

When communication is established, parallel data from the PC is input to the DTE interface (31) based on a predetermined key manual signal from the keyboard of the calling PC, and the data is transferred to the microcomputer (7). .Here, parallel data is converted to serial data.

The digital signal that has been converted into serial data is sent to the low-speed modulation/demodulation circuit (32). Here, the digital signal is converted to an analog signal, and based on the corresponding communication standard, the digital signal is converted to an analog signal.
frequency modulation FSX and transmit A M P (39),
It can be transmitted to the responding modem via the line transformer (41).

On the other hand, the frequency-modulated analog signal sent by the key input signal side of the personal computer on the responding side is sent to the modem on the calling side, and is sent to the line transformer (41) and the receiving AM P (42).
) is input to the low-speed modulation/demodulation circuit (32). Here, the analog signal is converted to a digital signal and input to the DTE interface (31), and the serial digital signal is converted to a parallel digital signal and input to the calling side personal computer. As a result, full duplex communication between the calling side personal computer and the responding side personal computer becomes possible, and personal computer communication is realized.

FIG. 7 is a plan view of the modem circuit shown in FIG. 4 mounted on the substrate (2) used in this embodiment, and the mounted circuit elements are designated by the same reference numerals. The connection between the EPROM chip (6) and the microcomputer (7) is shown by a pass line. Note that the conductive paths connecting the plurality of circuit elements are omitted because they are complicated.

As shown in FIG. 7, a plurality of fixing pads (5a) to which external lead terminals (12) are fixed are provided at opposing peripheral ends of the substrate (2). A plurality of circuit elements (
8) and a mounting body (4a) on which a header (4) on which an EPROM chip (6) is mounted is fitted.

On such a substrate (2), there are a plurality of circuit elements (8) including a microcomputer (7) other than an EPROM chip (6).
are fixed, (31) is the DTE interface, (32) and (33) are the first and second modulation/demodulation circuits, (
34) is a DTMF generation circuit, (40) is a control switch that controls the EPROM chip (6), (7) is a microcomputer, and (8) is a chip component such as a capacitor.

As shown in FIG. 7, a mounting body (4a) to which a header (4) for mounting an EPROM chip (6) is fixed is placed near or adjacent to the microcomputer (7). The EPROM chip (6) and header (
4) by placing it through a microcomputer (7
) and the EPROM chip (6), that is, the distance of the routing line of the conductive path (6) can be routed at the shortest possible distance, making it possible to effectively use other mounting patterns and achieving high density. Can be implemented. Note that the area surrounded by the dashed line indicates the area to which the case material (9) is fixed with the adhesive sheet.

Figure 8 shows a case material (9) placed on the board (2) shown in Figure 7.
FIG. 2 is a plan view of the completed hybrid integrated circuit device for modem when it is fixed, and from the top surface of the board (2), you can see the header mounting body (on which the header (4) on which the EPROM chip (6) is mounted is formed). 4a) and the ultraviolet opaque resin (21b) filled in the auxiliary frame (4b) are exposed.

That is, all other elements other than the EPROM chip (6) are placed in the sealed space (2) formed by the case material (9) and the substrate (2).
1), and only the EPROM chip (6) is mounted outside the board.

According to the present invention, the header (4) is provided at a desired position on the main surface exposed to the outside of the substrate (2), and the header (4)
), and connect the electrode of the EPROM chip (6) and the lead-out lead (5b) connected to the conductive path (5) with a bonding wire, and then
) and the case material (9). The microcomputer (7) and other circuit elements (
8) By arranging hybrid integrated circuit and EPROM
It is possible to provide a system that is integrated with a chip and is extremely miniaturized.

(G) Effects of the Invention As detailed above, according to the present invention, firstly, the substrate (2
) on the header (4) provided on the main surface exposed to the outside.
Fix the PROM chip (6) and then attach the EPROM chip (6).
) and the lead-out lead (5b) connected to the conductive path (5).
) is connected with a bonding wire, so the EPR
This has the advantage that the placement position of the OM chip (6) can be selected arbitrarily. For this purpose, a built-in microcomputer (7)
Considering the electrical connection between
The most closely related microcomputer (7) can be placed adjacent to the OM chip 7 block (6), and as a result, the EPR
The data line for exchanging data between the OM chip (6) and the microcomputer (7) can be realized with the shortest distance or the easiest layout, and loss in packaging density due to data line routing can be minimized.

Second, by improving the mounting density of the microcomputer and its peripheral circuit elements on the integrated circuit board (2), it is possible to eliminate the printed circuit board that was previously required.
A hybrid integrated circuit device incorporating one miniaturized EPROM chip (6) can be realized.

Thirdly, by using a metal substrate as the integrated circuit board (2), its heat dissipation effect can be greatly improved compared to that of a printed circuit board, which can further contribute to an improvement in packaging density. Furthermore, by using copper foil (11) as the conductive path (5), the resistance value of the conductive path (5) can be significantly reduced compared to conductive paste, and the circuit to be mounted can be expanded to the same level or more than that of a printed circuit board.

Fourth, the microcomputer (7) and its peripheral circuit elements (8) connected to the EPROM chip (6) are placed in a sealed space (21) formed by the case material (9) and the integrated circuit board (2). Since it is assembled in the form of a die or chip, it occupies an extremely small area compared to a conventional printed circuit board molded with resin, and has the advantage of greatly improving packaging density.

Fifth, by substantially matching the peripheral edges of the case material (9) and the integrated circuit board (2), almost the entire surface of the integrated circuit board (2) can be used as a sealed space (21), which reduces the packaging density. Combined with this improvement, an extremely compact hybrid integrated circuit device can be realized.

Sixthly, the external lead terminals (12) can be led out from the negative side or the opposite side of the integrated circuit board (2), which has the advantage of realizing a hybrid integrated circuit device with an extremely large number of pins.

[Brief explanation of the drawing]

Fig. 1 is a perspective view showing this embodiment, and Fig. 2 is an I-
I cross-sectional view, Figure 3 is a cross-sectional view of the substrate used in this example, and Figure 4 is a cross-sectional view of the substrate used in this example.
The figure is a block diagram showing the modem circuit used in this embodiment, Figure 5 is a block diagram showing the DTE interface of the modem shown in Figure 4, and Figure 6 is a block diagram showing the microcomputer of the modem shown in Figure 4. 7 is a plan view when the block diagram shown in FIG. 4 is mounted on a board,
Figure 8 is a plan view of the case material fixed on the board shown in Figure 7, and Figures 9 and 10 are of conventional EFROM.
FIG. 3 is a perspective view showing the mounting structure. (1)...Hybrid integrated circuit device, (2)...Integrated circuit board, (5)...Conducting path, (6)...EF
ROM chip, (7)...microcomputer,
(8)...Circuit element, (4)...Header, (9)
...Case material, (4a)...Header mounting body, (
21a) - UV transparency mm, (21b)...UV opaque resin.

Claims (9)

[Claims] (1) An integrated circuit board, a conductive path having a desired pattern formed on the substrate, a nonvolatile memory chip connected to the conductive path, and a conductive path supplied with data from the memory and on the substrate. a microcomputer and its peripheral circuit elements connected to the substrate, and a case material integrated with the substrate, a header provided at a desired position on the main surface exposed to the outside of the substrate, and a header provided on the header with the non-volatile fix the sexual memory chip,
The electrodes of the nonvolatile memory chip and the lead-out leads connected to the desired conductive paths are connected with bonding wires, and the microcomputer and its peripheral circuit elements are placed in a sealed space formed by the substrate and the case material. A hybrid integrated circuit device characterized in that: (2) The hybrid integrated circuit device according to claim 1, wherein a metal substrate whose surface is insulated is used as the integrated circuit board. (3) The hybrid integrated circuit device according to claim 1, wherein the shapes of both the substrates are substantially the same. (4) The hybrid integrated circuit device according to claim 1, wherein copper foil is used as the conductive path. (5) The hybrid integrated circuit device according to claim 1, wherein the microcomputer is incorporated in the form of a die on the conductive surface. (6) The hybrid integrated circuit device according to claim 1, wherein a chip resistor or a chip capacitor is used as the peripheral circuit element. (7) The hybrid integrated circuit device according to claim 1, wherein the case material is substantially aligned with a peripheral edge of the substrate. (8) An auxiliary frame surrounding the header is provided, and a sealing resin layer that transmits ultraviolet rays is injected into the auxiliary frame to seal the nonvolatile memory chip.
The hybrid integrated circuit device described. (9) The hybrid integrated circuit device according to claim 8, wherein a sealing resin that blocks ultraviolet rays is provided on the sealing resin layer in the header.