JPH02299258A - Hybrid integrated circuit device - Google Patents

Abstract

PURPOSE:Not only to make a circuit device of this design small in size but also to improve it in handling properties by a method wherein a microcomputer and its peripheral circuit elements are hermetically sealed off with a case material, and only an EPROM chip is exposed through a recess provided to the peripheral side of the case material. CONSTITUTION:An EPROM(Erasable Programmable Read Only Memory) chip is used as a nonvolatile memory chip 4, a recess 7 is provided at a prescribed position on the peripheral side of a case material 8, and the EPROM 4 is mounted on a conductive path 3 on a board 2 exposed through the recess 7 and connected to the conductive path 3 through a wire. A microcomputer 5 supplied with data from the EPROM chip 4 and its peripheral elements are mounted at the prescribed position on the conductive path 3 and housed in a sealed space 14 formed of the case material 8 and the board 2. By this setup, a hybrid integrated circuit device 1 small in size and excellent in handling qualities can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field The present invention is an integrated circuit board equipped with a chip-type non-volatile memory, such as an EPROM built-in EFROM (ultraviolet erasable programmable read-only memory). The present invention relates to a type of hybrid integrated circuit device.

(b) Conventional technology An EP having an ultraviolet irradiation window that can erase and rewrite previously written memory information by irradiating it with ultraviolet rays.
ROM elements are favorably used in various electronic devices.

Currently, most of these EPROM elements are mounted on printed wiring boards together with control or driving integrated circuits, and in order to rewrite the information once written, they are usually mounted on easily removable printed wiring boards. has been done. For various electronic devices that require smaller size and lighter weight, a semiconductor integrated circuit (IC) chip is directly mounted on a printed wiring board using a technique called chip-on-board, and after the required wiring is done, this The IC chip, including the wiring portion, is covered with synthetic resin, making it extremely compact and lightweight.

On the other hand, EPROM chips that require an ultraviolet irradiation window cannot be made smaller and lighter because the irradiation window is a bottleneck and they are still manufactured in a cerdip package and mounted on a printed wiring board.

The mounting structure of such a conventional EPROM element will be explained with reference to FIG. 10. FIG. 10 is a perspective view with a partial cross section of a conventional EPROM element, in which a conductive wiring pattern (41) is formed on the main surface. E is incorporated into a cerdip type package into a through hole (43) of an insulating substrate (42) made of glass, epoxy, etc.
A PROM element (44) is mounted. This EPRO
The M element (44) is connected to the header (45) and the cap (4
6), and the header (45) has a ceramic base material (
47) with an external lead (48) or a low melting point glass material. Further, in this header (45), an element mounting part (50) made of sintered so-called gold paste, which is glass mixed with a large amount of gold powder, is bonded on the low melting point glass material or ceramic base material (47), This element mounting part (50
), an EPROM chip (51) is mounted with the ultraviolet irradiation surface facing upward, and the electrodes of this chip (51) and the external leads (48) are connected by thin metal wires (52). The cap (46) is a storage member and includes a ceramic base material (54) having a window (53) in a portion facing the ultraviolet irradiation surface of the EPROM chip (51). The glass seals the EPROM chip (51) placed in the header (45). The EPROM element (44) in which the EPROM chip (51) is sealed in this way is connected to the insulating substrate (42).
) The external lead (48) is inserted through the through hole (43) and fixed with solder. This through hole (
43) is provided with the required wiring through a conductive wiring pattern (41), and is connected from a male connector terminal portion (55) provided at the end of the insulating substrate to a female connector (not shown). .

Now, the mounting structure of such a conventional EPROM element is
Compared to the ROM chip (51), the package external shape is extremely large, and while the surface occupation rate is limited, it is also three-dimensional, that is, the height is several times the height of the chip, which is extremely disadvantageous for thinning. Furthermore, after the external lead is inserted into the through hole (43), it is necessary to fix it with solder or the like. Another major drawback that should be noted is that EP
This involves assembling a ROM element into a -H package. E
Since each PROM has a window for irradiating ultraviolet rays, its package is assembled into a cerdip-type package made of ceramics, but since this package is sealed with low-melting glass, it can withstand high temperatures (400~SOO ℃)
If the thin metal wires that serve as a seal and connect the electrodes (aluminum) of the EPROM chip and the external leads are not made of the same material, alloying will occur, resulting in an increase in wiring resistance or disconnection. To avoid such a situation, thin aluminum wire is usually used, but this EPROM
Since the chip needs to have the substrate at ground potential, EP
The ground electrode of the ROM chip is connected by wire to the chip mounting portion formed of gold paste. Here, too, a secondary or multi-component alloy reaction progresses between the gold or metals such as foil in the gold paste and the aluminum, so a small piece of silicon whose head is coated with aluminum, called a ground die, is used. Separately from the EPROM chip, it is fixed to the chip mounting part made of the gold paste, and this ground die head and the EPR
Conventional mounting structures are unsatisfactory in terms of small size, light weight, and low cost, as they involve extremely complicated work of connecting the OM chip to the ground electrode.

In order to solve the problem of refusal, the EPROM shown in Fig. 11 is used.
There is an implementation structure.

The EPROM mounting structure shown in FIG. 11 will be explained below.

An insulating substrate (6
0) has a chip mounting area (60c) on which an EPROM chip (61) is placed, and the wiring pattern (60b)
) is routed from near this area on the main surface (60a) and connected to a male connector terminal portion (not shown).

The area (60c) contains an EPROM chip (61).
is mounted, and the surface electrode of this chip (61) and the wiring pattern (60b) are connected by a thin metal wire (62). Of course, one of the thin metal wires (62) is connected to the chip (
In order to connect to the substrate of 61), this chip (
61) is wired with the wiring pattern (60b) mounted thereon. A UV-transparent resin (63) is placed on the UV-irradiated surface (61a) of the EPROM chip (61).
(For example, manufactured by Toshisha Co., Ltd., model name TX-978), an ultraviolet-transparent window material (64) is fixed thereto. This window material (6
4) is a known ultraviolet transparent material such as quartz or transparent alumina. Then, the top surface (64a) of the window material (64)
) is the surface that introduces light to the ultraviolet irradiation surface of the EPROM chip (61), so the remaining window material (64) portion excluding this top surface (64a), the thin metal wire (62), and this metal The connecting portion between the thin wire (62) and the wiring pattern (60b) is made of synthetic resin (65) (for example, manufactured by Nitto Denko Corporation,
It is coated with model name MP-10). If the insulating substrate (60), EPROM chip (61) and window material (64)
If it is necessary to further reduce the total thickness dimension including
It is sufficient to hold the chip mounting area (60c) of the substrate (60) as a counterbored hole and grip the substrate (60) by about half its thickness. Also, if you make a counterbored hole like this, you can create a synthetic tree Jfl (
65) is formed and acts effectively against the infiltration of moisture.

The EPROM mounting structure shown in FIGS. 10 and 11 is disclosed in Japanese Patent Application Laid-Open No. 60-83393 (l05K 1/18).
It is described in.

(8) Problem to be solved by the invention In the EPROM mounting structure shown in FIG.
Needless to say, the chip is die-bonded onto the printed circuit board, resulting in a smaller size. However, the miniaturization referred to here is only the miniaturization of the EPROM itself. In other words, although it is not clear from FIG. 11, the microcomputer and its peripheral circuit elements that are fixed around the EFROM are composed of discrete electronic components, so the printed circuit board equipped with the EPROM is When looking at the entire system as an integrated circuit, there is a problem in that the size of the printed circuit board increases as before, without any reduction in size, that is, the overall system increases in size.

Also, in the mounting structure shown in FIG. 10, the peripheral circuits of the EPROM, that is, the microcomputer, its peripheral LSI, and the circuit elements of the Ice, are composed of discrete electronic components, as in FIG. There is a major problem in that the size of the printed circuit board, that is, the size of the entire system, makes it impossible to provide integrated circuits equipped with EPROMs that are light, thin, short, and small as required by users.

Furthermore, in the EFROM mounting structure shown in FIGS. 10 and 11, the overall system becomes larger as described above, and the conductive patterns that connect the EPROM and its surrounding circuit elements are exposed, which reduces reliability. There is a problem of deterioration.

Furthermore, in the EFROM mounting structure shown in FIGS. 10 and 11, the EPROM and surrounding circuit elements such as microcomputers, ICs, and LSIs are exposed, which creates unevenness on the top surface of the board, making it difficult to handle and work. There is a problem of deterioration.

(d) Means for Solving the Problems The present invention has been made in view of the above-mentioned problems, and includes a chip-type EFROM mounted on a substrate and an EP
A microcomputer connected to the ROM chip and its peripheral circuit elements are mounted, and the microcomputer and all its peripheral circuit elements are hermetically sealed by the case material, so that only the EPROM chip is located at the desired edge of the case material. It is characterized by having a structure mounted on a substrate exposed by a recess provided at a location.

Therefore, it is possible to provide a hybrid integrated circuit device with a built-in EPROM chip, which allows the hybrid integrated circuit equipped with an EPROM chip to be extremely miniaturized, and in which the EPROM chip can be easily erased.

(*) Effect As described above, according to the present invention, a depression is provided at a predetermined position on the peripheral edge of the case material, and the conductive path on the substrate exposed by the depression is
Since the PROM chip is connected and connected to the adjacent conductive path by a wire, the mounting position of the EPROM chip can be set arbitrarily, so considering the electrical connection with the built-in microcomputer, efficient < EFROM and a microcomputer, making it possible to eliminate the need for routing signal lines, that is, conductive paths. Furthermore, EPROM
The most closely related microcomputers can be placed adjacent to each other on the chip, and the data lines for exchanging data between the EPROM chip and the microcomputer can be kept at the shortest or minimum distance, reducing packaging density loss due to data line routing. This allows for high-density packaging.

Furthermore, the present invention provides a hybrid integrated circuit device that is compact and easy to handle because all elements other than the EPROM chip are in the form of chips and are housed in a sealed space formed by the case material and the substrate. I can do it.

(F) Embodiments Below, the hybrid integrated circuit device of the present invention will be explained in detail based on the embodiments shown in FIGS. 1 to 9.

1 and 2 show a hybrid integrated circuit device (1) according to an embodiment of the present invention. This hybrid integrated circuit device (1) is used as an independent electronic component and is used as an integrated circuit having independent functions in a wide range of fields such as computers.

As shown in FIGS. 1 and 2, this hybrid integrated circuit device (1) includes an integrated circuit board (2), a conductive path (3) of a desired shape formed on the integrated circuit board (2), Conductive path (3)
a non-volatile memory chip (4) connected to the microcomputer (5), which is supplied with data from the memory chip (4) and connected to the conductive path (3) on the substrate (2).
) and its peripheral circuit elements (6), and a case material (8) that is integrated with the substrate (2) and has depressions (7) at predetermined positions on the peripheral edge.

The integrated circuit board (2) is a hard substrate made of ceramics, glass epoxy, metal, or the like, and in this embodiment, a metal substrate with excellent heat dissipation and mechanical strength is used.

As a metal substrate, for example, 0.5 to 1. An aluminum substrate with a thickness of OITIm is used. As shown in Figure 3, an aluminum oxide film (9) (alumite layer) is formed on the surface of the substrate (2) by well-known anodic oxidation, and a 10-70μ thick epoxy or polyimide film is formed on the main surface side. An insulating resin layer (10) is attached. Furthermore, the insulation tree Jf [(
10) A copper foil (11) having a thickness of 10 to 70 μm is adhered thereon simultaneously with the insulating resin layer (10) by means of a roller or hot press.

On the surface of the copper foil (11) provided on the -main surface of the substrate (2), a conductive path of a desired shape is exposed by screen printing and masked with a resist, and a precious metal (gold, silver, platinum) plating layer is formed. The surface of the copper foil (11) is plated. After that, the resist is removed and a copper foil (
Etching step 11) is performed to form a desired conductive path (3). Here, the thinness of the conductive path (3) by screen printing is limited to 0.51 [111], so when an ultra-fine wiring pattern is required, a well-known photo-etching technique is used to make the conductive path (3) approximately 2 μm thick.
It is possible to form ultrafine conductive paths (3) up to

At predetermined positions on the conductive path (3) are a nonvolatile memory chip (4), a microcomputer (5) to which data is supplied from the memory chip (4), and its peripheral circuit elements (
6) is mounted and connected to the conductive path (3). The conductive path (3) is formed to extend over substantially the entire surface of the substrate (2).
) A lead fixing pad is formed at the tip of the conductive path (3) extending around the peripheral edge of the conductive path (3), and an external lead terminal (12) is fixed to the pad. The external lead (12) is bent at a substantially right angle for attachment to the board.

E F ROM (
Erasable Programmable Read
As is well known, this EPROM chip (4) uses a non-volatile memory chip (4) (hereinafter referred to as an EPROM chip).
This is an element that can be used by irradiating the electrons (program data) stored in the floating gate with light to excite them and returning them to the pellet in an unmemorized state for rewriting. EP
The ROM chip (4) is commercially available, and its shape is not limited as long as it is a chip type, and a description of the EPROM chip (4) will be omitted in this embodiment.

On the other hand, the case material (8) is made of thermoplastic resin as an insulating member, and is formed into a box shape so that a space is formed when it is fixed to the substrate (2). The box-shaped case material (
The peripheral end portion of 8) is disposed substantially at the peripheral end portion of the substrate (2) and is firmly fixed and integrated with the substrate (2) using an adhesive sealant (J sheet: trade name). As a result, the substrate (2
) and the case material (8), a predetermined sealed space (14) is formed between the case material (8). Furthermore, a recess (7) is provided at a predetermined position on the peripheral edge of the case material (8) of this embodiment.

The recess (7) is the EPROM chip (4) and the EPR
The size is such that the bonding wire connecting the OM chip (4) and the conductive path (3) is exposed.

That is, it is formed larger than the EPROM chip (4).

The EPROM chip (4) is fixedly mounted on the conductive path (3) on the substrate (2) exposed by the recess (7) provided at the peripheral edge of the case material (8) using a brazing material such as Ag paste or solder. EP is applied to the substrate (2) exposed in the recess (7).
One end of a plurality of conductive paths (3) connected to the ROM chip (4) is formed.One end of the conductive path (3) and the EPRO
Ultrasonic bonding is performed with the M chip (4) using a bonding wire such as an A1 wire. The other end of the conductive path (3) bonded to the EPROM chip (4) is efficiently routed near the microcomputer (5) connected to the EPROM chip (4) and connected to the chip-shaped microcomputer (5). 5) and A! Ultrasonic connections are made using bonding wires to connect to electricity.

Here, the positional relationship between the EPROM chip (4) and the microcomputer (5) will be described. As shown in Figure 1, an EPROM chip (4) and a microcomputer (5)
) are connected via multiple conductive paths (3),
In order to shorten the wiring of the conductive path (3),
The chip (4) and the microcomputer (5) are arranged adjacent to each other or as close as possible to each other. Therefore, the electrically conductive path (3) between the EPROM chip (4) and the microcomputer (5) can be formed in the shortest distance, and the mounting area on the board can be used effectively.

EPROM chip (4) and a chip-shaped microcomputer (5) placed near or adjacent to it
As shown in Fig. 1, the conductive path extends near the microcomputer (5), and the tip of (3) is connected by ultrasonic bonding with a wire such as AP, and is electrically connected to the EPROM chip (4). be done.

As is clear from FIGS. 1 and 2, the EPROM chip (4) is inserted into the recess (7) provided on the peripheral edge of the case material (8).
It is mounted on the exposed board (2) and its recess (7)
It has a structure surrounded by walls 7a in three directions forming a structure. More specifically, what is surrounded by the walls (7a) in three directions is the EPROM chip (4) and its EP.
The ROM chip (4) and the nearby conductive path (3) and the wire line that makes the bonding connection are surrounded.

Furthermore, in the space (7b) surrounded by the wall (7a), 1
It is filled with more than one layer of resin, and the EPROM chip 4) and wire lines are completely covered with the resin. The first layer of resin directly coated on the EPROM chip (4) is an ultraviolet transparent resin (15a) because it is necessary to transmit ultraviolet rays when erasing data on the EPROM chip (4).

The ultraviolet-transparent resin (15a) is not limited as long as it is non-aromatic, and for example, methyl-based silicone rubber or silicone gel may be used.

In this example, the first J! J-th UV-transparent resin (15
a) A second resin layer (15b) is filled on top. Unlike the first layer, the second resin layer uses an ultraviolet opaque resin (15b) that blocks ultraviolet rays in order to prevent the EPROM chip (4) from being erroneously erased. This ultraviolet opaque resin series 1 (15b) is not limited to any resin as long as it contains an aromatic ring (benzene ring). For example, an epoxy or polyimide resin is used, and the upper surface of the case material (8) is approximately Filled until matched.

Therefore, only the EPROM chip (4) is surrounded by the wall (7a) and coated with resin, and the other microcomputer (5) and its peripheral circuit elements (6) are surrounded by the case material (8> and the board (2)). It will be placed in a sealed space (14) formed by.

As described above, the microcomputer (5) connected to the EPROM chip (4) and its peripheral circuit elements (6)
is set to be placed in a sealed space (14) formed by the substrate (2) and the case material (8). That is, all elements, including chip-shaped electronic components and resistance elements such as printed resistors and plated resistors, are provided within the sealed space (14).

By the way, in this embodiment, the space (
7b) consists of a two-layer resin structure of an ultraviolet-transparent resin (15a) and an impermeable resin (15b), but the impermeable resin J
As shown in Fig. 4, instead of IW (L5b), even if a light-shielding sealant (16) is glued onto the recess (7) of the case material (8), the same effect as with the impermeable wood JM (15b) will be obtained. It can completely block UV rays.

In this embodiment, when erasing data on the EPROM chip (4), the ultraviolet opaque resin (15b) or sealing material (16) is peeled off and ultraviolet rays are irradiated, and when rewriting data, the data on the EPROM chip (4) is removed. UV-transparent resin (15a
) is also peeled off and a terminal such as a probe is brought into contact with the bonded conductive path (3), and data is written by the writing device. When removing the ultraviolet-transparent resin (15a), use the tree JI
W (15a) has a weak adhesive force so that the wire will not be cut.

A specific example of a hybrid integrated circuit device for a modem using the present invention will be shown below.

What is a modem? A modem exists for data communication in which digitized data handled by a data terminal such as a personal computer is sent and received at a distance using a telephone line. The function of a modem is to modulate digitized data using the frequency that can be used on the telephone line, convert it into an analog signal, and send it on the telephone line, and to send an analog signal that is modulated with the data sent from the other party. It has the ability to demodulate and return to digitized data.

The modem will be briefly explained based on the block diagram shown in FIG.

FIG. 5 is a block diagram when the modem is mounted on the integrated circuit board (2).

The modem has a DTE interface (21) that stores data sent from the computer in its built-in memory and outputs the data, and a DTE interface (21).
A microcomputer (5) that outputs a predetermined output signal based on the data output from the microcomputer (5), and an E
The output signals from the ROM (4) and the microcomputer (5) are modulated and demodulated to the NCU (NETWORK C0N).
The first and second modulation/demodulation circuits (22) and (23) output to the microcomputer (TR0L UNIT).
5) and a DTMF generator (24) that generates a desired DTMF signal (tone signal) in response to the output signal from the DTMF generator (24).

The DTE interface consists of an IC such as 5TC9610 (Seiko Epson), and as shown in Figure 6, it has a transmitting memory that supplies output signals from the personal computer, stores the output signals in built-in memory, and outputs them to the microcomputer (5). Part (25) and microcomputer (5)
a receiving memory part (26) that accumulates the signal supplied with the output signal from the built-in memory and outputs it to the personal computer;
Part of transmitting memory (25) and part of receiving memory (26)
A control unit (2) that switches each signal input and output via
7>, and has a predetermined function of connecting the personal computer (28) and the microcomputer (5).

The microcomputer (5) is, for example, 5TC9620 (
It consists of ICs such as Seiko Epson), as shown in Figure 7.
A command recognition section that recognizes the output signal output from the DTE interface (21), a command decoding section that decodes the output signal recognized by the command recognition section, and a part of memory that decodes the signal decoded by the command decoding section. The DTE interface (21 ) and a response code generation unit that outputs an output signal to the output signal.

The modulation/demodulation circuit (28) converts the digital signal sent from the microcomputer (5) into an analog signal, and converts it into an analog signal.
Send to CU section. On the other hand, it converts the analog signal sent from the NCU section into a digital signal and sends it to the microcomputer (5), and includes low-speed and medium-speed circuits. First modulation/demodulation circuit
22) is a 300 bps low speed modulation/demodulation circuit, and the second modulation/demodulation circuit (23) is a 1200 bps medium speed modulation/demodulation circuit. Respective first and second modulation/demodulation circuits (22) (
23), one of the modulation and demodulation circuits is selected by the microcomputer (5).

DTMF generator (24) is a microcomputer (5)
The data output from the 5 cloak execution part of COL, RO
A predetermined DTMF signal is generated by inputting it to each input terminal of W, and is output to the transmitting A M P (29a) to supply the signal to the telephone line.

Program data for setting various modes of the modem is stored in the EPROM chip (4), and is supplied to the microcomputer (5) based on the address of the microcomputer (5).

Next, the operation of the modem will be briefly explained.

First, to start communication with a personal computer, the control switch (29d) operates based on a read signal from the microcomputer (<5), and predetermined address data is read from EPRO.
M chip (4) and based on its address E
The program data in the PROM chip (4) is supplied to the microcomputer (5), and the communication standard (BELL/CCI TT standard), communication speed (300/1200 bps), and data format of each modem that performs communication is supplied to the microcomputer (5). It is checked whether various modes such as matching and switching of depth switch mode match.

Assuming the various modes match, enter the answering modem's phone number into your computer.

The phone number is the DT for interfacing with the computer.
It is input to the E-interface (21) and transferred to the microcomputer (5) for decoding the episode number.

Send the decoded result to the DTMF generator (24),
A DTMF signal is transmitted from the DTMF generator (24) and transferred to the general telephone line via the transmitting A M P (29a) and the line transformer (29c).

The transferred DTMF signal sends a paging signal to the modem on the responding side, and the modem on the responding side receives the paging signal and automatically receives the call. Then, the modem on the responding side sends an answer tone for the connection procedure to the modem on the calling side.

In the modem on the calling side, the answer tone passes through a line transformer (29c) and a receiving amplifier (29b), and is sent to the low-speed modulation/demodulation circuit (22) as a predetermined answer to the modem on the calling side.
Detect whether it is a tone or not. If it is a predetermined answer tone, the communication state is entered.

When the communication state is established, parallel data from the PC is input to the DTE interface (21) based on predetermined key manual signals from the keyboard of the calling party's PC,
The data is transferred to the microcomputer (5).

Here, parallel data is converted to serial data. The digital signal converted into serial data is sent to a low-speed modulation/demodulation circuit (22). Here, the digital signal is converted into an analog signal, subjected to frequency modulation FSX based on the corresponding communication standard, and transmitted to the modem on the responding side via the transmission A M P (29) and line transformer (32).

On the other hand, the frequency-modulated analog signal sent by the key input signal of the personal computer on the responding side is sent to the modem on the calling side, and is sent to the line transformer (29c) and the receiving A M P (2
9b) to the low-speed modulation/demodulation circuit <22).

Here, the analog signal is converted to a digital signal and input to the DTE interface (21), and the serial digital signal is converted to a parallel digital signal and input to the calling side personal computer. As a result, full duplex communication between the calling side personal computer and the responding side personal computer becomes possible, and personal computer communication is realized.

FIG. 8 is a plan view when the modem circuit shown in FIG. 4 is mounted on the substrate (2) used in this embodiment, and the circuit elements to be mounted have the same figure numbers. The connection between the EPROM chip (4) and the microcomputer (5) is shown by a pass line. Note that the conductive paths connecting the plurality of circuit elements are omitted because they are complicated.

As shown in FIG. 8, a plurality of fixing pads (3a) to which external lead terminals (12) are fixed are provided on opposing peripheral edges of the substrate (2). A plurality of circuit elements and an EPROM chip (4) are fixed to the conductive path 3) extending from the fixing pad (3a) at the superposition position. As mentioned above, a plurality of circuit elements including an EPROM chip (4) and a microcomputer (5) are fixed on the substrate <2), and (21) is a DTE interface,
(22) (23) are the first and second modulation/demodulation circuits, (
24) is the DTMF generation circuit, (29a) is the E PRO
A control switch controls M(4), (5) is a microcomputer, and (6) is a chip component such as a capacitor.

As shown in FIG. 8, an EPROM chip (4) is fixed near or adjacent to the microcomputer (5). By fixing the EPROM chip (4) near or adjacent to the microcomputer (5), the microcomputer (5) and the EPROM chip 4 can be connected.
), that is, the wiring line of the conductive path (3) can be routed at the shortest possible distance, and other mounting patterns can be used effectively and high-density packaging can be achieved. Note that the area surrounded by the dashed line indicates the area to which the case material (8) is fixed with the adhesive sheet.

Figure 9 shows a case material (8) on the board (2) shown in Figure 8.
It is a plan view of the completed product of the hybrid integrated circuit device for a modem when the EPRO
Second resin layer (15b) coated on M chip (4)
Only the top surface of the is exposed. That is, EFROM
All other elements except (4) are the case material (8) and the board (2).
) is sealed within a sealed space (14) formed by.

According to the present invention, a recess (7) is provided at a desired position on the peripheral edge of the case material (8), and an EPROM chip is inserted into the conductive path (3) on the substrate (2) exposed by the recess (7). (4)
is connected to the adjacent conductive path (3) by a wire line, and the sealed space (1) formed by the substrate (2) and the case material (8) is connected.
By fixing a microcomputer (5) and other circuit elements (6) to 4), a hybrid integrated circuit and an EPRO
The device integrated with the M chip (4) has the great feature of being extremely compact.

(G) Effects of the Invention As detailed in Section F, according to the present invention, firstly, a recess (7) is provided at a desired position on the peripheral edge of the case material (8), and the recess (7>) Since the EPROM chip (4) is connected to the conductive path (3) on the exposed substrate (2), the E P
This has the advantage that the mounting position of the ROM (4) can be arbitrarily selected. Therefore, considering the electrical connection with the built-in microcomputer, the EPROM chip (4) and the microcomputer (5) can be efficiently connected, making it unnecessary to route signal lines. To explain in more detail, the EPROM chip (
The most closely related microcomputer (5) can be placed adjacent to the EPROM chip (4).
) and the microcomputer (5) can be realized with the shortest distance or the easiest layout, and loss in packaging density due to data line routing can be minimized.

Second, make a depression (7) at a desired position on the peripheral edge of the case material (8).
) by arranging the EPROM chip (4) and improving the mounting density of the microcomputer and its peripheral circuit elements on the integrated circuit board (2).
The conventionally required printed circuit board can be eliminated, and a hybrid integrated circuit device incorporating an extremely miniaturized EPROM chip (4) can be realized.

Thirdly, by using a metal substrate as the integrated circuit board (2), its heat dissipation effect can be greatly improved compared to that of a printed circuit board, which can further contribute to an improvement in packaging density. Furthermore, by using copper foil (11) as the conductive path (3), the resistance value of the conductive path (3) can be significantly reduced compared to conductive paste, and the circuit to be mounted can be expanded to the same level or more than that of a printed circuit board.

Fourth, the microcomputer (5) connected to the EPROM chip (4) and its peripheral circuit elements (6) are placed in a sealed space (14) formed by the case material (8) and the integrated circuit board (2). Since it is incorporated in the shape of a stick or chip, it occupies an extremely small area compared to a conventional printed circuit board molded with resin, and has the advantage of greatly improving packaging density.

Fifth, by substantially matching the peripheral edges of the case material (8) and the integrated circuit board (2), almost the entire surface of the integrated circuit board (2) can be used as a sealed space (14), which reduces the packaging density. Combined with this improvement, an extremely compact hybrid integrated circuit device can be realized.

Sixth, there is a light shielding tree JIi on the EPROM chip (4).
Since the groove (15b) is provided, it has the advantage of being able to protect the EPROM chip (4), shielding from light, and sealing the gap between the EPROM chip (4) and the recess (7).

Seventhly, the external lead (12) can be led out from the negative side or the opposite side of the integrated circuit board (2), which has the advantage of realizing a hybrid integrated circuit device with an extremely large number of bins.

[Brief explanation of the drawing]

Fig. 1 is a perspective view showing this embodiment, and Fig. 2 is an I-
I sectional view, Figure 3 is a sectional view of the substrate used in the example,
The figure is a sectional view showing another embodiment, FIG. 5 is a block diagram showing the modem used in this embodiment, FIG. 6 is a block diagram showing the DTE interface of the modem shown in FIG. 5, and FIG.
The figure is a block diagram showing the microcomputer of the modem shown in Fig. 5, Fig. 8 is a plan view of the block diagram shown in Fig. 5 mounted on a board, and Fig. 9 is the block diagram shown in Fig. 8. A plan view when the case material is fixed on the board, and FIGS. 10 and 11 are cross-sectional views showing a conventional EFROM mounting structure. (1)...Hybrid integrated circuit device, (2)...Integrated circuit board, (3)...Conducting path, (4)...EPR
OM chip, (5)...microcomputer, (
6)...Circuit element, (7)...Indentation, (7a)
... Wall body, (8) ... Case material, (15a) ...
- UV-transparent resin, (15b)...UV-impermeable resin.

Claims (11)

[Claims] (1) An integrated circuit board, a conductive path having a desired pattern formed on the substrate, a non-volatile memory chip connected to the conductive path, and a conductive path on the substrate that is supplied with data from the memory. a microcomputer and its peripheral circuit elements connected to a circuit, and a case material integrated with the substrate, a recess being provided at a desired position on a peripheral edge of the case material, and the substrate exposed in the recess. The nonvolatile memory chip is fixed to the conductive path on the top, and the electrodes of the nonvolatile memory chip and the desired conductive path are connected with bonding wires, and the A hybrid integrated circuit device characterized by arranging a microcomputer and its peripheral circuit elements. (2) The hybrid integrated circuit device according to claim 1, wherein a metal substrate whose surface is insulated is used as the integrated circuit board. (3) The hybrid integrated circuit device according to claim 1, wherein copper foil is used as the conductive path. (4) The hybrid integrated circuit device according to claim 1, wherein the nonvolatile memory chip is sealed with a sealing resin layer in which a resin that transmits ultraviolet rays is injected into the recess. (5) The hybrid integrated circuit device according to claim 4, characterized in that a sealing resin layer for blocking ultraviolet rays is provided on the sealing resin layer in the recess. (6) The hybrid integrated circuit device according to claim 5, wherein the upper surface of the sealing resin layer and the upper surface of the case material are substantially aligned. (7) The hybrid integrated circuit device according to claim 4, wherein a sealing material is adhered to the upper surface of the case material so as to cover the recess. (8) The hybrid integrated circuit device according to claim 1, wherein the microcomputer is incorporated in the form of a die on the conductive surface. (9) The hybrid integrated circuit device according to claim 1, wherein a chip resistor or a chip capacitor is used as the peripheral circuit element. (10) The hybrid integrated circuit device according to claim 1, wherein the peripheral edge of the case material substantially coincides with the peripheral edge of the substrate except for the recess. (11) The hybrid integrated circuit device according to claim 1, wherein the external lead is led out from one side excluding the side where the recess is provided.