JPH02303150A - Hybrid integrated circuit device - Google Patents

Abstract

PURPOSE:To arbitrarily select a mounting position of an EPROM chip by a method wherein a hollow is formed in a desired position at a peripheral end part of one substrate and the EPROM is connected to conductive paths on the other substrate exposed by the hollow. CONSTITUTION:A hollow 4 is formed in a prescribed position at a peripheral end side of one substrate 2 out of two substrates 2, 3. These substrates 2, 3 are fixed and bonded by using a case material 9 so as to keep a prescribed distance. During this process, an EPROM chip 6 is fixed and bonded, by using a brazing material such as an Ag paste, a solder or the like, onto conductive paths 5 on the other substrate 3 exposed by the hollow 4 formed at the peripheral end side of one substrate 2; ends, at one side, of a plurality of conductive paths 5 connected to the EPROM chip 6 are extended on the other substrate 3 exposed by the hollow 4. The conductive paths 5 and the EPROM 6 are ultrasonically bonded and connected by using Al wires. The case material 9 and both substrates 2, 3 are united; a resin layer at connection parts is exposed; the exposed connection parts are sealed completely with a lid body 20.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Industrial Application Field The present invention relates to a built-in EPROM in which a chip-type non-volatile memory, such as an EFROM (ultraviolet erasable programmable read-only memory) is mounted on an integrated circuit board. The present invention relates to a type of hybrid integrated circuit device.

(b) Conventional technology An EP having an ultraviolet irradiation window that can erase and rewrite previously written memory information by irradiating it with ultraviolet rays.
ROM elements are favorably used in various electronic devices.

Currently, most of these EPROM elements are mounted on printed wiring boards together with control or driving integrated circuits, and in order to rewrite the information once written, they are usually mounted on easily removable printed wiring boards. Implemented. For various types of electronic equipment that are required to be smaller and lighter, a semiconductor integrated circuit (IC) chip is directly mounted on a printed wiring board using a technique called chip-on-board, and after the required wiring is done, this wiring is removed. The IC chip, including its parts, is coated with a synthetic resin, making it extremely compact and lightweight.

On the other hand, EPROM chips that require an ultraviolet irradiation window cannot be made smaller and lighter because the irradiation window is a bottleneck and they are still manufactured in a cerdip package and mounted on a printed wiring board.

The mounting structure of such a conventional EPROM element will be explained with reference to FIG. 11. FIG. 11 is a perspective view with a partial cross section of a conventional EPROM element, in which a conductive wiring pattern (41) is formed on the main surface. Through holes (
43) is incorporated into a cerdip type package and the EPRO
An M element (44) is mounted. This EPROM element (44) has a header (45) and a cap (46), said header (45) having a ceramic substrate (47).
An external lead (48) or a low melting point glass material is bonded to the external lead (48). Also, this header (45) is made of an element mounting part (45) made by sintering so-called gold paste, which is glass mixed with a large amount of gold powder.
50) on the low melting point glass material or the ceramic substrate (4
7) is glued on the top, and the E
A PROM chip (51) is mounted with the ultraviolet irradiation surface facing upward, and the electrodes of this chip (51) and the external leads (48) are connected by thin metal wires (52). The cap (46) is a gusset member, and the EPR
The cap (46) includes a ceramic base material (54) having a window (53) in a portion facing the ultraviolet irradiation surface of the OM chip (51), and the cap (46) is connected to the header (4) by a low melting point glass.
5) is sealed. The EPROM chip (51) is sealed in this way.
The PROM element <44) is fixed by soldering by inserting an external lead (48) into the through hole (43) of the insulating substrate (42). This through hole (43)
The conductive wiring pattern (41) provides the required wiring, and the male connector terminal portion (55) provided at the end of the insulating substrate is connected to a female connector (not shown).

Now, the mounting structure of such a conventional EPROM element is
Compared to the ROM chip (51), the package external shape is extremely large, and not only the surface area is occupied, but the chip is also three-dimensional, that is, the height is several times the height of the chip, which is extremely disadvantageous for thinning. Furthermore, after inserting the external lead through the through pole (43), it becomes necessary to fix it with solder. Another major drawback that should be noted is that EP
The process involves assembling the ROM element into a package once. E
Since the PROM element has a window for irradiating ultraviolet rays, its package is assembled into a ceramic-based cerdip-type package, but since this package is sealed with low-melting glass, it cannot be heated to high temperatures (400 to 500°C). )
If the thin metal wires that serve as a seal and connect the electrodes (aluminum) of the EPROM chip and the external leads are not made of the same material, alloying will occur, resulting in an increase in wiring resistance or disconnection. To avoid such a situation, thin aluminum wire is usually used, but this EPROM
Since the chip needs to have the substrate at ground potential, EP
The ground electrode of the ROM chip is connected by wire to the chip mounting portion formed of gold paste. Here, too, a secondary or multi-component alloy reaction progresses between the gold or metals such as foil in the gold paste and the aluminum, so a small piece of silicon whose head is coated with aluminum, called a ground die, is used. Separately from the EPROM chip, it is fixed to the chip mounting part made of the gold paste, and this ground die head and the EPR
Conventional mounting structures are unsatisfactory in terms of small size, light weight, and low cost, as they involve extremely complicated work of connecting the OM chip to the ground electrode.

In order to solve this problem, the EPROM shown in FIG.
There is an implementation structure.

The EPROM mounting structure shown in FIG. 12 will be explained below.

An insulating substrate (6
0) has a chip mounting area (60c) on which an EPROM chip (61> is mounted, and the wiring pattern (60b)
) is routed from near this area on the main surface (60a) and connected to a male connector terminal portion (not shown).

The area (60c) has an EPROM step (61).
is mounted, and the surface electrode of this chip (61>) and the wiring pattern <60b) are connected by a thin metal wire (62). Of course, one of the thin metal wires (62) is connected to the tip <
In order to connect to the substrate of 61), this chip (
61) is wired with the wiring pattern (60b) mounted thereon. A UV-transparent resin (63) is placed on the UV-irradiated surface (61a) of the EPROM chip (61).
(for example, manufactured by Toshisha Co., Ltd., model name TX-978), an ultraviolet-transparent window material (64) is fixed thereto. This window material (
64) is a known ultraviolet transparent material such as quartz or transparent alumina. Then, the top surface (64) of the window material (64)
Since a) is the surface that introduces light to the ultraviolet irradiation surface of the EPROM chip (61), the remaining window material (64) portion excluding this top surface (64a), the thin metal wire (62), and this The connection portion between the thin metal wire 62) and the wiring pattern (60b) is covered with a synthetic resin (65) (for example, manufactured by Nitto Denko, model name MP-10). If the insulating substrate (60), EPROM chip (61) and window material (64)
) If it is necessary to further reduce the total thickness dimension including the above, the chip mounting area (60c) of the substrate (60) can be counterbored and gripped by about half the thickness of the substrate (60). Also, if you make counterbore holes like this, synthetic resin (6
5) The flow stop dam is formed and acts effectively against the infiltration of moisture.

The EPROM mounting structure shown in Fig. 11 and Fig. 12 is disclosed in Japanese Patent Application Laid-Open No. 60-83393 (1/18 to 1405).
It is described in.

(c) Problems to be Solved by the Invention In the EPROM mounting structure shown in FIG. 12, since the EPROM chip is die-bonded onto the printed circuit board, it goes without saying that it is miniaturized. However, the miniaturization referred to here is only the miniaturization of the EPROM itself. In other words, although it is not clear from FIG. 12, the microcomputer and its peripheral circuit elements fixed around the EPROM are composed of discrete electronic components, so the printed circuit board equipped with the EPROM is When looking at the entire system as an integrated circuit, there is a problem in that the size of the printed circuit board increases as before, without any reduction in size, that is, the overall system increases in size. Also,
In the mounting structure shown in FIG. 11, as in FIG. 14, the peripheral circuits of the EPROM, that is, the circuit elements such as the microcomputer and its peripheral LSIs and ICs, are composed of discrete electronic components. There is a major problem in that the size of the substrate becomes large, that is, the entire system becomes large, making it impossible to provide integrated circuits equipped with EFROM that are light, thin, short, and small as required by users.

Furthermore, in the EPROM mounting structure shown in FIGS. 11 and 12, the entire system becomes larger as described above, and the conductive patterns that connect the EFROM and its surrounding circuit elements are exposed, which reduces reliability. There is a problem of deterioration.

Furthermore, in the EPROM mounting structure shown in FIGS. 11 and 12, the EFROM and surrounding circuit elements such as microcomputers, ICs, and LSIs are exposed, which creates unevenness on the top surface of the board, making it difficult to handle and work. There is a problem of deterioration.

Furthermore, in the EPROM mounting structure shown in FIG. 11 and FIG. 1-2, all the elements of the microcomputer and its peripheral circuit elements consisting of the EFROM and discrete components are mounted on a single printed circuit board. This poses a major problem in terms of miniaturization of the system itself.

(d) Means for Solving the Problems The present invention has been made in view of the above-mentioned problems, and includes a chip-type EPROM and a microcomputer mounted on one of two substrates, and a chip-type EPROM and a microcomputer mounted on the other substrate. All other circuit elements are mounted on the top or one of the substrates, and the EPROM is
It is characterized by a structure in which only the chip is mounted on an exposed substrate, and the microcomputer and all other circuit elements are sealed in a sealed space formed by two substrates and a case material.

Therefore, a hybrid integrated circuit equipped with an EPROM chip can be extremely miniaturized, circuit elements can be mounted on two substrates, and a hybrid integrated circuit device with a built-in EPROM that can be mounted with high density can be provided.

(E) Function As described above, according to the present invention, a depression is provided at a predetermined position on the peripheral edge of one of the two substrates, and an EPROM chip is inserted into the conductive path on the other substrate exposed by the depression. Since the EPROM chip is connected, the mounting position of the EPROM chip can be set arbitrarily, so considering the electrical connection with the built-in microcomputer, it is possible to efficiently connect the EPROM and the microcomputer, and the signal line, i.e. It is possible to eliminate the need for a lead line for a conductive path.

Furthermore, the most closely related microcomputer can be placed adjacent to the EPROM chip, and the data line for exchanging data between the EPROM chip and the microcomputer can be realized with the shortest or minimum distance. This minimizes the loss of data and enables high-density packaging.

Furthermore, in the present invention, all circuit elements other than the EPROM chip are mounted as chips on one of the two substrates, and are housed in a sealed space formed by the two substrates and the case material. Therefore, it is possible to provide a hybrid integrated circuit device that is of the IJX type, can be mounted at high density, and is easy to handle.

(F) Embodiments Below, the hybrid integrated circuit device of the present invention will be explained in detail based on the embodiments shown in FIGS. 1 to 10.

1 and 2 show a hybrid integrated circuit device (1) according to an embodiment of the present invention. This hybrid integrated circuit device 1) is used as an independent electronic component and is used as an integrated circuit having independent functions in a wide range of fields such as a computer.

As shown in Figures 1 and 2, this hybrid integrated circuit device (1>) consists of two integrated circuit boards (2) <3) and one of the two integrated circuit boards (2) <3). A recess (4) provided at a predetermined position on the peripheral edge of the substrate (2), and a conductive path (5) of a desired shape formed on the two integrated circuit boards (2) and (3).
), a nonvolatile memory chip (6) connected to the conductive path (5), and the other substrate (3) to which data is supplied from the memory chip (6) and on which the nonvolatile memory chip (6) is mounted. A microcomputer (7) connected to the conductive path (5) on the top, and peripheral circuit elements (8) connected to the conductive path (5) on the two substrates (2><3).
It consists of a case material (9) that separates and integrates two substrates (2) and (3).

Two integrated circuit boards <2) (3) A hard substrate such as ceramic, glass epoxy, or metal is used, and in this embodiment, a metal substrate with excellent heat dissipation and mechanical strength is used.

As the metal substrate, for example, an aluminum substrate with a thickness of 0.5 to 1.01 m1 is used. As shown in FIG. 4, an aluminum oxide film (9) (alumite layer) is formed on the surfaces of the two substrates (2) and (3) by well-known anodic oxidation. A flexible insulating resin layer (10) made of thick polyimide or the like is pasted. Further, on the insulating resin layer (10) is a copper foil (11) with a thickness of 10 to 70 μm.
) is attached simultaneously with the insulating resin layer (10) by means of a roller, hot press, or the like. By the way, the two substrates (2) and (3) are in a state where they are separated by a predetermined distance by the flexible insulating resin layer (10) and are fully connected.

Copper foil (
11) A conductive path of a desired shape is exposed on the surface by screen printing and masked with a resist, and a noble metal (gold, silver, platinum) plating layer is plated on the surface of the copper foil (11).

After that, the resist is removed and the copper foil (11) is etched using the precious metal plating layer as a mask to form the desired conductive path (5).
) is formed. Here, conductive paths (
Since the limit of the thinness of 5) is 0.511 Tll, when an ultra-fine wiring pattern is required, it is possible to form an ultra-fine conductive path (5) with a thickness of up to about 2 μm using the well-known photolithographic technique.

A nonvolatile memory chip (6) and a microcomputer (7) to which data is supplied from the memory chip (6) are mounted on the conductive path (5) on one of the substrates (3).
Conductive paths on one substrate (3) and the other substrate (2) (
5), peripheral circuit elements (8) are mounted thereon. In addition, a conductive path (5) is extended to the negative side of both substrates (2) <3> or to the peripheral edge of the opposing side, and an external lead terminal (12) is provided.
A plurality of pads are formed for fixing (13). External lead terminals (12) and (13) are firmly fixed to this pad by solder, led out horizontally, and bent at a substantially right angle at the center thereof. In addition, the conductive path (5) formed on both substrates (2) and (3) is connected to the flexible resin layer (
10) Since it is formed on two substrates (2) (3)
Both substrates (2) and (3) can be connected at predetermined positions and at any desired position.

EPROM chip (Erasable Programmable Rea) as a non-volatile memory chip (6)
dOnlyMemory) is used (hereinafter the non-volatile memory chip (6) is referred to as an EPROM chip).
. As is well known, this EPROM (6) is made by irradiating light to excite the electrons (program data) stored in the floating gate formed in the pellet of the EPROM chip (6) to form a pellet in an unmemorized state. This is an element that can be rewritten and reused. The EPROM chip (6) is commercially available, and its shape is not limited as long as it is a chip type, and a description of the EPROM chip (6) will be omitted in this embodiment.

On the other hand, in the present invention, a depression (4) is provided at a predetermined position on the peripheral edge of one of the two substrates (2) and (3). Both substrates (2) and (3) are made of case material (9), which will be described later.
) for a predetermined interval. At this time, the EPROM chip (6) is coated with Ag paste, solder, etc. on the conductive path (5) on the other substrate (3) exposed through the recess 4) provided on the peripheral edge of one substrate (2). On the other substrate (3), which is fixed by soldering material and exposed in the recess (4), there are a plurality of conductive paths <5> that can be connected to the EPROM chip (6).
) is extended at one end. The conductive path (5) and EPR
An ultrasonic bonding connection is made to the OM chip (6) using an A wire wire.

The microcomputer (7), which can selectively supply program data to the EPROM chip (6), and its peripheral circuit elements (8), such as ICs, transistors, chip resistors, and chip capacitors, are chip components that can be connected to desired conductive paths (5). ) by soldering or a brazing material such as Ag paste, and the microcomputer (7) and circuit element (8) are connected to the nearby conductive path (5) by ultrasonic bonding. Furthermore, a carbon resistor by screen printing or a nickel-plated resistor by nickel plating is formed as a resistance element between the conductive paths (5).

More specifically, the EPROM chip (6) and the microcomputer (7) are connected to the conductive path (5) on the other substrate (3) where the recess (4) is not provided, and all other circuit elements (8) ) are one and the other board (2) (3)
is attached on the conductive path (5) at a predetermined position.

The case material (9) is made of thermoplastic resin as an insulating member, and as shown in FIG. It is formed. The case material (9) is brought into contact with the periphery of a recess (4) provided at the peripheral edge of one board 2) and the periphery of the surface of the other board (3) exposed by the recess 4). A frame (18) having a constant thickness is provided. This frame (18) is formed to be recessed along the recess (4) provided in the substrate (2). In addition, - of the case material (9)
The side edges are formed in an arc shape so that the film resin layer (10) can be easily bent when both the substrates (2) and (3) are arranged.

The case material (9) and the two substrates (2) and (3) are fixed together using an adhesive sheet, and both substrates (2) and (3) are connected by the film resin layer (10) so that the case material is less than 9. It is fixed in such a way that it sandwiches the circuit elements and the mounted circuit elements face each other. At this time, the film resin layer (10) connecting both substrates (2>(3)) is brought into contact with the arc-shaped part provided on the case material (9) and bent, so that the bent part becomes conductive. There is no risk that the path (5) will be cut when bent.After the case material (9) and both substrates (2) and (3) are integrated, the resin layer (10) of the connection part is exposed, so the main In the embodiment, the exposed connecting portion is completely sealed with the lid 20). The lid body 20) is made of the same material as the case material 9), and its adhesion is achieved by a predetermined means such as the above-mentioned adhesive sheet.

One end of a plurality of conductive paths (5) connected to the EPROM chip (EPROM chip) is formed on the other substrate (3) exposed through the recess (4) provided on the peripheral edge of one substrate (2). An EPROM chip (6) is fixed to the tip of the conductive path (5). A conductive path (
5> The other end is efficiently routed near the microcomputer (7) and a chip-shaped microcomputer (7)
and are connected together with a bonding wire.

Here, EPROM (6) and microcomputer (7)
I will explain the positional relationship with. As shown in Fig. 1, since they are connected via a large number of conductive paths (5), the EPROM chip (7) and the microcomputer (7) are each adjacent to each other in order to shorten the length of the conductive paths (5). The location is located at or as close to the location as possible.

Therefore, the conductive path (5) between the EPROM chip (6) and the microcomputer (7) can be formed in the shortest distance, and the mounting area on the board can be used effectively. EP
As shown in Figure 7, the ROM chip (6) and a chip-shaped microcomputer (7) placed near or adjacent to it are connected to the tip of a conductive path (5) extending near the microcomputer (7). It is electrically connected to the EPROM chip (6) by bonding and wire lines.

As is clear from Figures 1 and 2, the EPROM chip can be mounted on the other substrate (3) exposed through the recess (4) provided in one substrate (2), and the frame of the case material (9) The structure is surrounded by (18). More specifically, what is surrounded by the frame 18) is the EPROM chip (6) and the wire line connecting the EPROM chip (6) and the nearby conductive path (5).

Furthermore, the space (18a) formed by the frame (18) is filled with one or more layers of resin, and the EPROM chip (6)
and the wire line is completely covered with the resin layer. The first layer of resin directly coated on the EPROM chip (6) is an ultraviolet-transparent resin (21a) because it is necessary to transmit ultraviolet rays when erasing data on the EPROM chip (6).

The ultraviolet-transparent resin (21a) is not limited as long as it is non-aromatic, and for example, methyl-based silicone rubber or silicone gel may be used.

In this embodiment, the second resin layer (21b) is filled on the first resin m (21a). Unlike the first layer, the second resin layer uses an ultraviolet opaque resin (21b) that blocks ultraviolet rays in order to prevent the EPROM chip (6) from being erased accidentally.This resin layer (21b) is not limited as long as it is a resin containing an aromatic ring (benzene ring),
For example, an epoxy or polyimide resin is used, and the resin is filled until it substantially coincides with the top surface of one substrate (2).

Therefore, only the EPROM chip (6) is surrounded by the frame (18) and covered with two layers of resin, and the other microcomputer (7) and other circuit elements (8) are surrounded by both substrates (2) and (3). and the case material (9).

As mentioned above, the microcomputer (7) and its peripheral circuit elements (8) are connected to the EPROM chip (6).
) is set to be placed in a sealed space (21) formed by two substrates (2) and (3) and a case material (9). That is, all elements, including chip-shaped electronic components and resistance elements such as printed resistors and plated resistors, are provided within the sealed space (14).

By the way, in this embodiment, the space (1) surrounded by the frame (18) is
9a), a light-shielding sealing material (21b), as shown in FIG. Even if 22) is adhered onto the recess (4) of one substrate (2), it can completely block ultraviolet rays in the same way as the non-transparent resin (21b).

In this embodiment, when data is to be erased from the EPROM chip (6), the ultraviolet-transparent resin wrap 21b) or sealing material (22) is peeled off and ultraviolet rays are irradiated, and when data is to be rewritten, the EPROM chip (6) is UV-transparent resin on top (
21a) is also peeled off and a terminal such as a probe is brought into contact with the conductive path (5) in the vicinity where it is bonded, and data is written by the writing device. At this time, UV-transparent resin (2
When removing 1a), the resin (21g) does not have very strong adhesive strength, so the wire will not be cut.

A specific example of a hybrid integrated circuit device for a modem using the present invention will be shown below.

What is a modem? A modem exists for data communication in which digitized data handled by a data terminal such as a personal computer is sent and received at a distance using a telephone line. The function of a modem is to modulate digitized data using the frequency that can be used on the telephone line, convert it into an analog signal, and send it on the telephone line, and to send an analog signal that is modulated with the data sent from the other party. It has the ability to demodulate and return to digitized data.

The modem will be briefly explained based on the block diagram shown in FIG.

FIG. 6 is a block diagram when a modem is mounted on the integrated circuit board (2).

The modem has a DTE interface (31) that stores data sent from the computer in its built-in memory and outputs the data, and a DTE interface (31).
A microcomputer (7) that outputs a predetermined output signal based on the data output from the microcomputer (7), and an EPR that contains data addressed by the microcomputer (7).
The output signals from the OM (6) and the microcomputer (7) are modulated and demodulated to the NCU (NETWORK C0NTR).
0L UN, IT), the first and second modulation/demodulation circuits (32) (33), and the microcomputer (
and a DTMF generator (34) that generates a desired DTMF signal (tone signal) according to the output signal from 7).

The DTE interface (31) is, for example, STC961.
0 (Seiko Epson), etc., and as shown in Figure 7, there is a part of the transmitting memory (35 ), a receiving memory part (36) that stores signals supplied with output signals from the microcomputer (7) in the built-in memory and outputs them to the personal computer (38), a transmitting memory part (35), and a receiving memory part (35). It consists of a control section (37) that switches each signal input and output through a part of memory (36), and has a predetermined function for connecting a personal computer (38) and a microcomputer (7). be.

The microcomputer (7) is, for example, STC9620 (
- Seiko Epson), etc., as shown in Figure 8, a command recognition unit that recognizes the output signal output from the DTE interface (31), and a command decoding unit that decodes the output signal recognized by the command recognition unit. and,
Based on the signal decoded by the command decoding part, the command execution part compares the data with the data in a part of the memory and supplies the data to the modulation/demodulation circuit, and the result of comparing the data of the command decoding part with the data in the part of the memory is incorrect data. and a response code generation section that outputs an output signal to the DTE interface (31) when the command is supplied to the command execution section.

The modulation/demodulation circuit (38) converts the digital signal sent from the microcomputer (7) into an analog signal and sends it to the NC
Send to U department. On the other hand, it converts the analog signal sent from the NCU section into a digital signal and sends it to the microcomputer (7), and is equipped with low-speed and medium-speed circuits.The first modulation/demodulation circuit (3
2) is a 300 bps low speed modulation/demodulation circuit, and the second modulation/demodulation circuit (33) is a 1200 bps medium speed modulation/demodulation circuit. Respective first and second modulation/demodulation circuits (32) (3
3), one of the modulation and demodulation circuits is selected by the microcomputer (7).

DTMF generator (34) is a microcomputer (7)
The data output from the command execution part of COL, RO
A predetermined DTMF signal is generated by inputting it to the input terminal of each W, and is output to the transmitting A M P (39) to supply the signal to the telephone line.

Program data for setting various modes of the modem is stored in the EPROM (6) and is supplied to the microcomputer (7) based on the address of the microcomputer (7).

Next, the operation of the modem will be briefly explained.

First, to start communication with a personal computer, the control switch (40) operates based on a read signal from the microcomputer (38), and predetermined address data is read from E P
EP is supplied to ROM (7) and based on its address.
The program data in the ROM (6) is supplied to the microcomputer (7), and the communication standard (BELL/CCITT standard) and communication speed (300
/1200 bps), data format matching, and various modes such as depth switch mode switching are checked.

Assuming the various modes match, enter the answering modem's phone number into your computer.

The phone number is the DT for interfacing with the computer.
E-interface (31) and forwarded to the microcomputer (7) for decoding the telephone number.

Send the decoded result to the DTMF generator (34),
A DTMF signal is transmitted from the DTMF generator (34), and the signal is sent to the transmitting AMP (39) and the line transformer (41).
transferred to a regular telephone line.

The transferred DTMF signal sends a paging signal to the modem on the responding side, and the modem on the responding side receives the paging signal and automatically receives the call. Then, the response No. 1 modem sends an answer tone for the connection procedure to the modem on the calling side.

The modem on the calling side passes through a line transformer (41) and a receiving amplifier (42), and a low-speed modulation/demodulation circuit (32) determines whether or not the answer tone is a predetermined answer tone for the modem on the calling side. To detect. If it is a predetermined answer tone, the communication state is entered.

When the communication state is established, parallel data from the PC is input to the DTE interface (31) based on predetermined key manual signals from the keyboard of the calling party's PC,
The data is transferred to the microcomputer (7).

Here, the 75 parallel data is converted into serial data.

The digital signal converted into serial data is sent to a low-speed modulation/demodulation circuit (32). Here, the digital signal can be converted into an analog signal, frequency modulated by FSK based on the corresponding communication standard, and transmitted by A M P (39).
It is sent to the responding modem via the line transformer (41).

On the other hand, the frequency-modulated analog signal sent by the key input signal from the responding PC is sent to the modem on the calling side, and is sent to the line transformer (41) and the receiving AM P (42).
The signal is inputted to the low-speed modulation/demodulation circuit (32) via. Here, the analog signal is converted to a digital signal and input to the DTE interface (31), and the serial digital signal is converted to a parallel digital signal and input to the calling side's computer.As a result, the calling side's computer and the responding side's PCs became capable of full-duplex communication, making bass communication possible.

FIG. 9 is a plan view when the modem circuit shown in FIG. 6 is mounted on the other board (3) used in this example, and the numbers of the circuit elements to be mounted are the same. . EPRO
The connection between the M chip (6) and the microcomputer (7) is shown by a pass line. Note that the conductive paths connecting the plurality of circuit elements are omitted because they are complicated.

As shown in FIG. 9, a plurality of fixing pads (5a) to which external lead terminals (13) are fixed are provided at the opposing peripheral edges of the other board (3).Fixing pads (5a)
A socket (16) in which a plurality of circuit elements (8) and an EPROM (6) are mounted is fixed at a fixed position above a conductive path (5) extending from the conductive path (5). On such a board <3) there is EPRO
A plurality of circuit elements (8) including a microcomputer (7) other than the M chip (<6) are fixed, (31) is a DTE interface, (32) and (33) are first and second modulation/demodulation circuits, (34) is a DTMF generation circuit,
(40) is a control switch that controls the EPROM chip (6), 7) is a microcomputer, and (8) is a chip component such as a capacitor. Note that the substrate (2) is coated with a substrate 3 via a film resin layer (10) such as polyimide.
), a plurality of conductive paths (5>) extend from the substrate (2).
> Optional circuits or some circuits necessary for the modem are placed above.

As shown in FIG. 9, an EPROM chip (6) is fixed near or adjacent to the microcomputer (7). By fixing the EPROM chip <6) near or adjacent to the microcomputer (7), the microcomputer <7) and the EPROM chip (6)
), that is, the path line of the conductive path (5) can be routed at the shortest possible distance, and other mounting patterns can be used effectively and high-density packaging can be achieved. Note that the area surrounded by the dashed line indicates the area to which the case material (9) is fixed with the adhesive sheet.

Figure 10 shows the case material (9) on the board (3) shown in Figure 9.
) is a plan view of a completed product of a hybrid integrated circuit device for a modem when one substrate (2) is fixed to the EPROM chip (6) through the upper surface of the one substrate (2). Only the upper surface of the resin layer (21b) is exposed. That is, all the other elements other than the EPROM chip (6) are sealed within a sealed space <21) formed by the case material (9) and the two substrates (2) and (3).

According to the present invention, a recess (4) is provided at a desired position on the peripheral edge of one substrate (2), and a conductive path (5) on the other substrate (3) exposed in the recess (4) is provided. ) and connect the EPROM chip (6) to both boards (2) and (3) and the case material (9).
) By fixing the microcomputer (7) and other circuit elements (8) in the sealed space (21) formed by the can.

(G) Effects of the Invention As detailed above, according to the present invention, firstly, a recess (4) is provided at a desired position on the peripheral edge of one substrate <2), and the recess (4) exposes the The conductive path (
Since the EPROM chip (6>) is connected to 5), E
This has the advantage that the mounting position of the PROM chip (6) can be arbitrarily selected. For this reason, the built-in microcomputer (
7) Considering the electrical connection with
The chip (6) and the microcomputer (7) can be connected, making it unnecessary to route signal lines. To elaborate further, E
The most closely related microcomputer (7) can be placed adjacent to the PROM chip (6), resulting in
The data line for exchanging data between the ROM chip (6) and the microcomputer (7) can be realized with the shortest distance or the easiest layout, and loss in packaging density due to data line routing can be minimized. Furthermore, since it is formed from two substrates (2) and (3), it is possible to provide a high-density and compact hybrid integrated circuit device.

Second, make a recess (4) at a desired position on the peripheral edge of one substrate (2).
) By arranging the E P ROM (6) and improving the mounting density of the microcomputer and its peripheral circuit elements on the two integrated circuit boards (2) and (3), the printed circuit board that was previously required can be improved. can be eliminated, and a hybrid integrated circuit device incorporating an extremely miniaturized EPROM chip (6) can be realized.

Thirdly, by using a metal substrate as the integrated circuit board (2) (3), its heat dissipation effect can be greatly improved compared to a printed circuit board, which can further contribute to an improvement in packaging density. In addition, by using @ foil (11) as the conductive path (5),
The resistance value of the conductive path (3) can be significantly reduced compared to conductive paste, and the circuit to be mounted can be expanded to the same level or more than that of a printed circuit board.

Fourth, the microcomputer (7) and its peripheral circuit elements (8) connected to the EPROM chip (6) are sealed by a case material (9) and two integrated circuit boards (3). Since it is incorporated into the stop space (21) in the form of a die or chip, it occupies an extremely small area compared to a conventional printed circuit board molded with resin, and has the advantage of greatly improving packaging density.

Fifth, the case material (9) and two integrated circuit boards (2) (3)
) by substantially matching the peripheral edges of the integrated circuit boards (2) and (3), almost the entire surface of the integrated circuit boards (2) and (3) can be used as the sealed space (21), which, together with improved packaging density, makes it possible to create an extremely compact hybrid integrated circuit device. realizable.

Sixth, there is a light-shielding resin layer (
Since the EPROM chip (21b) is provided, the EPROM chip (6
) and can protect EPROM chips (6
), and the gap between the EPROM chip (6) and one of the substrates 2) can be sealed.

Seventh, it has the advantage that the external leads (12) and (13) can be derived from the negative sides or opposing sides of the two integrated circuit boards (2 and 3), making it possible to realize a hybrid integrated circuit device with an extremely large number of bins. .

[Brief explanation of the drawing]

Fig. 1 is a perspective view showing this embodiment, and Fig. 2 is an I-
3 is a perspective view showing the case material used in this embodiment, FIG. 4 is a sectional view of the substrate used in this embodiment, FIG. 5 is a sectional view showing another embodiment, and FIG. The figure is a block diagram showing the modem used in this embodiment, Figure 7 is a block diagram showing the DTE interface of the modem shown in Figure 6, and Figure 8 is a block diagram showing the microcomputer of the modem shown in Figure 6. 9 is a plan view when the block diagram shown in FIG. 6 is mounted on the board, FIG. 10 is a plan view when the case material is fixed on the board shown in FIG. 9, and FIG. This figure and FIG. 12 are cross-sectional views showing a conventional EPROM mounting structure. (1)...Hybrid integrated circuit device, (2)(3)...
Integrated circuit board, (5)... conductive path, (6)...
EPROM chip, (7)...microcomputer, (8)...circuit element, (4)...dent, (
9)...Case material, (21a)...UV-transparent resin, (21b)...UV-opaque resin, Ri2
2)...Sealing material.

Claims (12)

[Claims] (1) two integrated circuit boards arranged to face each other, a conductive path having a desired pattern formed on opposing main surfaces of the substrates, and a nonvolatile memory chip connected to the conductive path; a microcomputer and its peripheral circuit elements supplied with data from the memory and connected to a conductive path on the substrate; and a case material integrated between the substrates, and a desired area around the one substrate. A recess is provided at the position, the nonvolatile memory chip is fixed to the conductive path on the other substrate exposed in the recess, the electrode of the nonvolatile memory chip and the desired conductive path are connected with a bonding wire, and the A hybrid integrated circuit device, characterized in that the microcomputer and its peripheral circuit elements are arranged in a sealed space formed by both substrates and the case material. (2) The hybrid integrated circuit device according to claim 1, wherein a metal substrate whose surface is insulated is used as the integrated circuit board. (3) The hybrid integrated circuit device according to claim 1, wherein the shapes of both the substrates are substantially the same. (4) The hybrid integrated circuit device according to claim 1, wherein copper foil is used as the conductive path. (5) The hybrid integrated circuit device according to claim 1, wherein the microcomputer is incorporated in the form of a die on the conductive surface. (6) The hybrid integrated circuit device according to claim 1, wherein a chip resistor or a chip capacitor is used as the peripheral circuit element. (7) The hybrid integrated circuit device according to claim 1, further comprising a frame having a constant thickness so that the case material substantially coincides with peripheral edges of both the substrates. (8) The hybrid integrated circuit device according to claim 7, wherein the frame body is arranged between the two substrates along the periphery of the recess provided in the one substrate. (9) The hybrid integrated circuit device according to claim 1, wherein the nonvolatile memory chip is sealed with a sealing resin layer in which a resin that transmits ultraviolet rays is injected into the hole. (10) The hybrid integrated circuit device according to claim 9, further comprising a sealing resin layer for blocking ultraviolet rays provided on the sealing resin layer in the hole. (11) The hybrid integrated circuit device according to claim 10, wherein the upper surface of the sealing resin layer and the upper surface of the case material are substantially aligned. (12) The hybrid integrated circuit device according to claim 1, wherein a light-shielding sealant is adhered to the upper surface of the one substrate so as to cover the recess.