JPH02302071A - Hybrid integrated circuit device - Google Patents

Abstract

PURPOSE:To provide a hybrid integrated circuit device wherein an EPROM chip of high density package is built by providing a hole to a desired position of one substrate, by connecting an electrode of a non-volatile memory chip which is fixed to a conductive path on the other substrate exposed by the hole to the conductive path through a bonding wire, and by arranging a microcomputer and its peripheral circuit element inside a sealed space formed by both substrates and a case material. CONSTITUTION:A hole 4 is provided to a specified position of a peripheral edge side of one substrate of two substrates 2, 3. An EPROM chip 6 is mounted on a conductive path 5 on the other substrate which is exposed by the hole, and connected to an adjacent conductive path. Therefore, it is possible to set a mount position of the chip 6 arbitrarily, to connect the chip 6 and a microcomputer 7 effectively, and to make a taking-around line of a conductive path unnecessary. According to this constitution, it is possible to arrange the microcomputer 7 which is most related to a position adjacent to the chip 6 to realize a data line between them at a minimum distance, thereby minimizing a loss of package density and realizing package of high density.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field The present invention is a non-volatile memory, such as an EFROM (ultraviolet erasable programmable read-only memory), which is formed by mounting a chip-type non-volatile memory on an integrated circuit board. The present invention relates to a type of hybrid integrated circuit device.

(b) Conventional technology An EP having an ultraviolet irradiation window that can erase and rewrite previously written memory information by irradiating it with ultraviolet rays.
ROM elements are favorably used in various electronic devices.

Currently, most of these EPROM elements are mounted on printed wiring boards together with control or driving integrated circuits, and in order to rewrite the information once written, they are usually mounted on easily removable printed wiring boards. has been done. For various electronic devices that require smaller size and lighter weight, a semiconductor integrated circuit (IC) chip is directly mounted on a printed wiring board using a technique called chip-on-board, and after the required wiring is done, this The IC chip, including the wiring portion, is covered with synthetic resin, making it extremely compact and lightweight.

On the other hand, EPROM chips that require an ultraviolet irradiation window cannot be made smaller and lighter because the irradiation window is a bottleneck and they are still manufactured in a cerdip package and mounted on a printed wiring board.

The mounting structure of such a conventional EPROM element will be explained with reference to FIG. 11. FIG. 11 is a perspective view with a partial cross section of a conventional EPROM element, in which a conductive wiring pattern (41) is formed on the main surface. Through holes (
EPRO is incorporated into a cerdip type package in 43〉.
An M element (44) is mounted. This EPROM element (44) is connected to a header (45) and a cap (46).
The header (4S) has a ceramic base material (47
) is bonded to the external lead (48) or a low melting point glass material. In addition, this header (45) has an element mounting part (50) made of sintered gold paste, which is glass mixed with a large amount of gold powder, on the low melting point glass material or on the ceramic base material (
47), and an EPROM chip (51) is mounted on this element mounting part (50) with the ultraviolet irradiation side facing up, and the electrodes of this chip (51) and the external lead-out leads (48) They are connected by a thin metal wire (52). The cap (46) is a storage member, and the EP
The cap (46) includes a ceramic base material (54) having a window (53) in the portion facing the ultraviolet irradiation surface of the ROM chip (51), and the cap (46) is connected to the header (
45) is sealed. The EPROM element (44) with the EPROM chip (51) sealed in this manner is fixed by soldering by inserting the external lead (48) into the through hole (43) of the insulating substrate (42). This through hole〈43
) is provided with necessary wiring through a conductive wiring pattern (41), and is connected from a male connector terminal portion (55) provided at the end of the insulating substrate to a female connector (not shown).

Now, the mounting structure of such a conventional EPROM element is
Compared to the ROM chip (51), the package external shape is extremely large, and not only the surface area is occupied but also three-dimensional, that is, the height is several times the height of the chip, which is extremely disadvantageous for thinning. Furthermore, after the external lead is inserted into the through hole (43), it is necessary to fix it with solder or the like. Another major drawback that should be noted is that EF is not performed before mounting on an insulating board.
The process involves assembling the ROM element into a package once. E
Since the FROM element has a window for irradiating ultraviolet rays, its package is assembled into a ceramic-based cerdip-type package, but since this package is sealed with low-melting glass, it cannot be heated to high temperatures (400 to 500°C). )
If the thin metal wires that serve as a seal and connect the electrodes (aluminum) of the EPROM chip and the external leads are not made of the same material, alloying will occur, resulting in an increase in wiring resistance or disconnection. To avoid such a situation, thin aluminum wire is usually used, but this EPROM
Since the chip needs to have the substrate at ground potential, EP
The ground electrode of the ROM chip is connected by wire to the chip mounting portion formed of gold paste. Here, too, a secondary or multi-component alloy reaction progresses between the gold or metals such as foil in the gold paste and the aluminum, so a small piece of silicon whose head is coated with aluminum, called a ground die, is used. Separately from the EPROM chip, it is fixed to the chip mounting part made of the gold paste, and this ground die head and the EPR
Conventional mounting structures are unsatisfactory in terms of small size, light weight, and low cost, as they involve extremely complicated work of connecting the OM chip to the ground electrode.

In order to solve this problem, the EPROM shown in FIG.
There is an implementation structure.

The EPROM mounting structure shown in FIG. 12 will be explained below.

An insulating substrate (6
0> has a chip mounting area (60c) on which an EPROM chip (61) is placed, and the wiring pattern (60b)
) is routed from near this area on the main surface (60a) and connected to a male connector terminal portion (not shown).

The area (60c) contains an EPROM chip 1)
is mounted, and the surface electrode of this chip (61) and the wiring pattern (60b) are connected by a thin metal wire (62). Of course, one of the thin metal wires (62) is connected to the chip (
In order to connect to the substrate of 61), this chip (
61) is wired with the wiring pattern (sob) on which it is mounted. A UV-transparent resin (63) is placed on the UV-irradiated surface (61a) of the EPROM chip (61).
(For example, manufactured by Toshisha Co., Ltd., model name TX-978), an ultraviolet-transparent window material (64) is fixed thereto. This window material (6
4) is a known ultraviolet transparent material such as quartz or transparent alumina. Then, the top surface (64a) of the window material (64)
) is the surface that introduces light to the ultraviolet irradiation surface of the EPROM chip black 1), so the remaining window material (64) portion excluding this top surface (64a), the thin metal wire (62〉), and the thin metal wire (62) and the connection part with the wiring pattern (sob) are covered with a synthetic resin (65) (for example, manufactured by Nitto Denko Corporation, model name MP-10).If the insulating substrate (
60), the EPROM chip (61>, and the window material (64)), if it is necessary to further reduce the total thickness dimension, the chip mounting area (60c) of the board (60) can be counterbored and this board can be used. You only need to grip it about half the thickness of (60).Also, if you make a counterbored hole like this, you can use synthetic resin (65).
A flow-stopping dam is formed, which effectively prevents moisture from entering.

The EPROM mounting structure shown in Fig. 11 and Fig. 12 is disclosed in Japanese Patent Application Laid-Open No. 60-83393 () 105, 1/18).
It is described in.

(c) Problems to be Solved by the Invention In the EPROM mounting structure shown in FIG. 12, since the EFROM chip is die-bonded onto the printed circuit board, it goes without saying that it is miniaturized. However, the miniaturization referred to here only refers to the EPROM itself.
It is a formalization. In other words, although it is not clear from Fig. 12, the microcomputer and its peripheral circuit elements fixed around the EFROM are composed of discrete electronic components, so the printed circuit board equipped with the EPROM is When looking at the entire system as an integrated circuit, there is a problem in that the size of the printed circuit board increases as before, without any reduction in size, that is, the overall system increases in size.

Furthermore, in the mounting structure shown in FIG. 11, as in FIG. 12, the peripheral circuits of the EFROM, that is, the circuit elements such as the microcomputer and its peripheral LSIs and ICs, are composed of discrete electronic components. However, there is a major problem in that the size of the printed circuit board, that is, the size of the entire system, makes it impossible to provide integrated circuits equipped with EFROM that are light, thin, short, and small as required by users.

Furthermore, in the EFROM mounting structure shown in FIGS. 11 and 12, the overall system becomes larger as described above, and the conductive patterns that connect the EPROM and its surrounding circuit elements are exposed, which reduces reliability. There is a problem of deterioration.

Furthermore, in the EFROM mounting structure shown in FIGS. 11 and 12, the EFROM and surrounding circuit elements such as microcomputers, ICs, and LSIs are exposed, which creates unevenness on the top surface of the board, making it difficult to handle and work. There is a problem of deterioration.

Furthermore, in the EFROM mounting structure shown in FIGS. 11 and 12, all the elements of the microcomputer and its peripheral circuit elements consisting of the EFROM and discrete components are mounted on a single printed circuit board, so as mentioned above, This poses a major problem in terms of miniaturization of the system itself.

(d) Means for Solving the Problems The present invention has been made in view of the above-mentioned problems, and includes a chip-type EPROM chip and a microcomputer mounted on one of two substrates, and a chip-type EPROM chip and a microcomputer mounted on one of the two substrates. The microcomputer and all other circuits are mounted on a substrate, or on one substrate with all other circuit elements, and on the other substrate with only the EPROM chip exposed through a hole in a predetermined position. It is characterized by a structure in which the device is sealed in a sealed space formed by two substrates and a case material.

Therefore, a hybrid integrated circuit equipped with an EPROM chip can be extremely miniaturized, circuit elements can be mounted on two substrates, and a hybrid integrated circuit device with a built-in EPROM chip that can be mounted with high density can be provided.

(*) Function As described above, according to the present invention, a hole is provided at a predetermined position on the peripheral edge of the other of two substrates, and an EPROM chip is inserted into the conductive path on one of the substrates exposed through the hole. Since the EPROM chip is installed and connected to the adjacent conductive path, the mounting position of the EPROM chip can be set arbitrarily, so it is possible to efficiently connect the EPROM chip and the microcomputer by considering the electrical connection with the built-in microcomputer. This makes it possible to eliminate the need for signal lines, that is, routing lines for conductive paths.

Furthermore, the most closely related microcomputer can be placed adjacent to the EPROM chip, and the data line for exchanging data between the EPROM chip and the microcomputer can be realized with the shortest distance or the shortest distance, making it possible to route the data line. This minimizes the loss in packaging density due to this, allowing high-density packaging.

Furthermore, in the present invention, all circuit elements other than the EPROM chip are mounted as chips on one of the two substrates, and are housed in a sealed space formed by the two substrates and the case material. Therefore, it is possible to provide a hybrid integrated circuit device that is compact, can be mounted at high density, and is easy to handle.

(F) Embodiments The hybrid integrated circuit device of the present invention will be explained in detail below based on the embodiments shown in FIGS. 1 to 10.

1 and 2 show a hybrid integrated circuit device <1) according to an embodiment of the present invention. This hybrid integrated circuit device <1) is used as an independent electronic component and is used as an integrated circuit having independent functions in a wide range of fields such as computers.

As shown in Figures 1 and 2, this hybrid integrated circuit device (1) consists of two integrated circuit boards (2) and (3), and the other of the two integrated circuit boards (2) and (3). A hole (4) provided at a predetermined position of the board (2) and two integrated circuit boards (203
) and a nonvolatile memory chip (6) connected to one of the conductive paths (5).
and a microcomputer (7) connected to a conductive path (5) on one substrate (3) on which a nonvolatile memory chip (6) is mounted and which is supplied with data from the memory chip (6). The conductive path (on the board 2) (3)
5), a peripheral circuit element (8) connected to the circuit board 5), and a case material (9) that separates and integrates the two substrates (2) and (3).

The two integrated circuit boards (2) and (3) are made of hard substrates such as ceramics, glass epoxy, or metal, and in this embodiment, metal substrates with excellent heat dissipation and mechanical strength are used.

As the metal substrate, for example, an aluminum substrate with a thickness of 0.5 to 1.0 rIn is used. As shown in FIG. 4, an aluminum oxide film (9) (alumite layer) is formed on the surfaces of the two substrates (2) and (3) by well-known anodic oxidation. A flexible insulating resin layer (10) made of thick polyimide or the like is pasted. Further, on the insulating resin layer (10) is a copper foil (11) with a thickness of 10 to 70 μm.
) is attached simultaneously with the insulating resin layer (10) by means of a roller, hot press, or the like. By the way, the two substrates (2) and (3) are connected to each other with a predetermined distance separated by a flexible insulating resin, W (10).

On the surface of the copper foil plate (11) provided on the -main surfaces of the two substrates (2) and (3), a conductive path of a desired shape is exposed by screen printing and masked with a resist. , platinum) plating layer is plated on the copper foil 11) surface.

After that, the resist is removed and the copper foil (11) is etched using the precious metal plating layer as a mask to form the desired conductive path (5).
) is formed. Here, conductive paths (
5) Since the thinness of 0.5- is the limit, when an ultra-fine wiring pattern is required, the thinness of about 2
It becomes possible to form ultrafine conductive paths (5) up to μ.

A conductive path (5) on one of the substrates (3) is equipped with a non-volatile memory chip (6) and a microcomputer (7) that is supplied with data from the memory chip (6).
Conductive paths on one substrate (3) and the other substrate (2) (
5), peripheral circuit elements (8) are mounted thereon. In addition, a conductive path (5) is extended to the - side of the side substrate (2) <3> or to the peripheral edge of the opposing side, and an external lead terminal (12) is provided.
A plurality of pads are formed for fixing <13). External lead terminals (12) and (13) are fixed to these pads by solder, led out horizontally, and bent at a substantially right angle at the center thereof. In addition, the conductive paths (5) formed on the side substrates (2) and (3) are connected to the flexible resin layer (
10) Since it is formed on two substrates (2) (3)
The side substrates (2) and (3) can be connected at predetermined positions and optionally by patterning so as to cross the sides.

EPROM (Er
asable Programmable Read 0
(hereinafter, the nonvolatile memory chip (6) will be referred to as an EPROM chip). As is well known, this EPROM chip <6) can be used by irradiating the electrons (program data) stored in the bloating gate with light to excite them and rewriting them back to the unstored state. It is element. EPRO
The M chip (6) is commercially available, and its shape is not limited as long as it is a chip type, and a description of the EPROM chip (6) will be omitted in this embodiment.

On the other hand, in the present invention, the other substrate (
A hole (4) is provided at a predetermined position of 2>. These side substrates (2) and (3) are fixed at a predetermined interval by a case material (9) which will be described later. At this time, the conductive path on one substrate (3) exposed through the hole 4) provided in the other substrate 2)
5) An EPROM chip (6) is fixedly mounted on the top with an Ag base and a brazing material such as solder, and on one substrate exposed through the hole 4), a plurality of EPROM chips (6) are connected to the EPROM chip (6). One end of the conductive path (5) is extended.

The conductive path (5) and the EPROM chip (6) are Af!
, ultrasonic bonding connections are made with wire lines.

The microcomputer 7) to which the program data of the EPROM chip (6) is selected and supplied and its peripheral circuit elements (8) such as ICs, transistors, chip resistors, and chip capacitors are chip components that are connected to desired conductive paths. The microcomputer (7) and the circuit element (8) are attached to the conductive path (5) by soldering or a brazing material such as Ag paste, and are connected to the nearby conductive path (5) by ultrasonic bonding. Further, between the conductive paths (5), a carbon resistor by screen printing or a nickel-plated resistor by nickel plating is formed as a resistance element.

More specifically, the EPROM chip (6) and the microcomputer (7) are connected to the conductive path (5) on one of the substrates (3) where the hole (4) is not provided, and all other circuit elements (8) are connected. ) are attached on the conductive paths (5) at predetermined positions on one and the other substrates (2) and (3).

The case material (9) is made of an insulating material made of resin, and as shown in FIG. is formed. The case material (9) includes the area around the hole (4) provided in one substrate (2) and the other substrate (
3) An auxiliary frame <18) having a certain thickness that comes into contact with the periphery of the surface is provided. This auxiliary frame (18) is integrally formed by a case material (9) and a connecting bar (19). Also, the negative side of the case material (9) is connected to both substrates (2) (
3) is formed in an arcuate shape so that the film resin layer (10) can be easily bent when placed.

The case material (9) and the two substrates (2) and (3) are fixed together using an adhesive sheet, and the case material (9) is bonded to both substrates (2) and (3) connected by the film resin layer (10). It is fixed in such a way that it sandwiches the circuit elements and the mounted circuit elements face each other. At this time, the film resin layer (10) that connects both substrates (2) and (3) is brought into contact with the arcuate portion provided on the case material (9) and bent, so that the bent portion is conductive. There is no risk that the path (5) will break when bending. After the case material (9) and both substrates (2) and (3) are integrated, the resin layer (10) of the connection part is exposed, so in this example, the connection part exposed by the lid body (20) is It shall be completely sealed. The lid (20) is made of the same material as the case material (9), and is adhered by a predetermined means such as the above-mentioned adhesive sheet.

One substrate exposed in the hole (4) of the other substrate (2) <3
) is formed with one end of a plurality of conductive paths (5) that can be connected to the EPROM chip (6), and the EPROM chip (6) is fixed to the tip of the conductive path (5). EPROM
The other end of the conductive path 5) to which the chip (6) is fixed is efficiently routed near the microcomputer (7) and electrically and ultrasonically connected to the chip-shaped microcomputer 7) by a bonding wire.

Here, EPROM (6) and microcomputer tough 7)
I will explain the positional relationship with. As shown in FIG. 1, the EPROM chip (6
) and the microcomputer (7) are arranged adjacent to each other or as close as possible.

Therefore, the conductive path (5) between the EPROM chip (6) and the microcomputer <7) can be formed in the shortest distance, and the mounting area on the board can be used effectively. EP
As shown in Figure 1, the chip-shaped microcomputer (7) placed near or adjacent to the ROM chip (7) is connected to the tip of the conductive path (5) extending near the microcomputer (7). It is connected to the EPROM chip (6) by ultrasonic bonding using a wire.

As is clear from FIGS. 1 and 2, the EPROM chip (6) is mounted on one substrate (3) exposed through a hole (4) formed in the other substrate (2), and is mounted on the case material (9). The structure is surrounded by an auxiliary frame (19). More specifically, what is surrounded by the auxiliary frame (18) is the EPROM chip (
6) and its EPROM chip (6) and nearby conductive path 3
> and the wire line to be bonded.

Furthermore, the space (19a) surrounded by the auxiliary frame (18) is filled with one or more layers of resin, and the EPROM chip (6)
and the wire line is completely covered with the resin layer. The first layer of resin that can be directly coated on the EPROM chip (6) is an ultraviolet-transparent resin (21a) because it is necessary to transmit ultraviolet rays when erasing data on the EPROM chip (6). UV-transparent tree Jl (21
A) is not limited as long as it is non-aromatic, and for example, methyl silicone rubber or silicone gel may be used.

In this embodiment, the second resin layer (21b) is filled on the first resin layer (21a). Unlike the first layer, the second resin layer uses an ultraviolet opaque resin (21b) that blocks ultraviolet rays in order to prevent erroneous erasure of the EPROM chip. This resin (21b> is not limited as long as it contains an aromatic ring (benzene ring), and for example, an epoxy or polyimide resin can be used,
It is filled until it substantially coincides with the top surface of the other substrate (2).

Therefore, only the EPROM chip (6) is surrounded by the auxiliary frame (18) and covered with two layers of resin, and the other microcomputer (7) and other circuit elements (8) are surrounded by the side substrates (2) and (3). It will be placed in a sealed space (21) formed with the case material (9).

As mentioned above, the microcomputer (7) connected to the EPROM chip (6) and its peripheral circuit elements (8)
) is set to be placed in a sealed space (21) formed by two substrates (2) and (3) and a case material (9). That is, all elements, including chip-shaped electronic components and resistance elements such as printed resistors and plated resistors, are provided within the sealed space (14).

By the way, in this embodiment, the space surrounded by the auxiliary frame (18) (
19a) has a two-layer resin structure of an ultraviolet-transparent resin (21a) and an impermeable resin (21b>), but instead of the impermeable resin (21b>), a sealing material for light shielding is used as shown in FIG. Even if the material 22) is adhered onto the hole (4) of the other substrate (2), ultraviolet rays can be completely blocked in the same way as the impermeable material m<21b).

In this embodiment, when data is to be erased from the EPROM chip (6), the ultraviolet opaque resin (21b) or sealing material (22) is peeled off and ultraviolet rays are irradiated, and when data is to be rewritten, the EPROM chip (6) is UV-transparent resin on top (
21a) is also peeled off and bonded nearby conductive path (5
) with a terminal such as a probe, and write data using a writing device. At this time, ultraviolet-transparent resin (21a
), the resin (21a) does not have very strong adhesive strength, so the wire will not be cut.

A specific example of a hybrid integrated circuit device for a modem using the present invention will be shown below.

First, what is a modem? A modem exists for data communication in which digitized data handled by a data terminal such as a personal computer is sent and received at a distance using a telephone line. The function of a modem is to modulate digitized data using the frequency that can be used on the telephone line, convert it into an analog signal, and send it on the telephone line, and to send an analog signal that is modulated with the data sent from the other party. It has the ability to demodulate and return to digitized data.

The modem will be briefly explained based on the block diagram shown in FIG.

FIG. 6 is a block diagram when the modem is mounted on the integrated circuit board (2).

The modem has a DTE interface (31) that stores data sent from the computer in its built-in memory and outputs the data, and a DTE interface (31).
a microcomputer (7) that outputs a predetermined output signal based on the data output from the microcomputer (7), and an EPR that contains data addressed by the microcomputer (7).
The output signals from the OM (6> and the microcomputer (7) are modulated and demodulated to the NCU (NETWORK C0NTR).
0L UN! first and second modulation/demodulation circuits (32) (33) outputting to T), microcomputer (7)
The DTMF generator 34) generates a desired DTMF signal (tone signal) according to the output signal from the DTMF generator 34).

DTE interface <31> is, for example, STC961
0 (Seiko Epson), etc., and as shown in Figure 7, there is a part of the transmitting memory (35 ), a receiving memory part (36) that stores signals supplied with output signals from the microcomputer (7) in the built-in memory and outputs them to the personal computer (38), a transmitting memory part (35), and a receiving memory part (35). It consists of a control section (37) that switches each signal input and output through a part of memory (36), and has a predetermined function for connecting a personal computer (38) and a microcomputer (7). be.

The microcomputer (7) is, for example, 5TC9620 (
It consists of ICs such as Seiko Epson), as shown in Figure 8.
A command recognition unit that recognizes an output signal output from the DTE interface (31), a command decoding unit that decodes the output signal recognized by the command recognition unit, and a part of memory based on the signal decoded by the command decoding unit. The DTE interface (31 ) and a response code generation unit that outputs an output signal to the output signal.

The modulation/demodulation circuit (38) converts the digital signal sent from the microcomputer (7) into an analog signal and sends it to the NC
Send to U department. On the other hand, it converts the analog signal sent from the NCU section into a digital signal and sends it to the microcomputer (7), and includes low-speed and medium-speed circuits. First modulation/demodulation circuit (32
) is a 300 bps low speed modulation/demodulation circuit, and the second modulation/demodulation circuit (33) is a 1200 bps medium speed modulation/demodulation circuit. Respective first and second modulation/demodulation circuits (32) (33
), one of the modulation and demodulation circuits is selected by the microcomputer (7).

DTMF generator (34) is a microcomputer (7)
The data output from the command execution part of COL, RO
A predetermined DTMF signal is generated by inputting it to the input terminal of each W, and is output to the transmitting A M P (39) to supply the signal to the telephone line.

Program data for setting various modes of the modem is stored in the EFROM (6) and is supplied to the microcomputer (7) based on the address of the microcomputer (7).

Next, the operation of the modem will be briefly explained.

First, to start communication with a personal computer, the control switch (40) is operated based on a read signal from the microcomputer (38), and predetermined address data is read from E.P.
EF based on the address supplied to the ROM (7)
The program data in the ROM (6) is supplied to the microcomputer (7), and the communication standard (BELL/CCITT standard) and communication speed (300
/1200bpS)% You can check whether various modes such as data format matching and depth switch mode switching match.

Assuming the various modes match, enter the answering modem's phone number into your computer.

The phone number is the DT for interfacing with the computer.
E-interface (31) and forwarded to the microcomputer (7) for decoding the telephone number.

Send the decoded result to the DTMF generator (34),
A DTMF signal is transmitted from the DTMF generator (34), and the signal is sent to the transmitter AMP (39) and the line transformer (34).
41) to the general telephone line.

The transferred DTMF signal sends a paging signal to the modem on the responding side, and the modem on the responding side receives the paging signal and automatically receives the call. Then, the modem on the responding side sends an answer tone for the connection procedure to the modem on the calling side.

The modem on the calling side passes through a line transformer (41) and a receiving amplifier (42), and a low-speed modulation/demodulation circuit (32) determines whether or not the answer tone is a predetermined answer tone for the modem on the calling side. Detection.If a predetermined answer tone is detected, the communication state is entered.

When the communication state is established, parallel data from the PC is input to the DTE interface (31) based on predetermined key manual signals from the keyboard of the calling party's PC,
The data is transferred to the microcomputer (7).

Here, parallel data is converted to serial data. The digital signal converted into a serial 7'-data is sent to a low-speed modulation/demodulation circuit (32). Here, the digital signal is converted into an analog signal, subjected to frequency modulation (FSK) based on the corresponding communication standard, and transmitted to the responding modem via the transmission AMP (39) and line transformer (41).

On the other hand, the frequency-modulated analog signal sent by the key input signal of the personal computer on the responding side is completely sent to the modem on the calling side, and the line transformer (41) is connected to the '5-signal AM P <4.
2) to the low-speed modulation/demodulation circuit (32). Here, the analog signal is converted to digital i and inputted to the DTE interface (31), and the serial digital signal is converted to a parallel digital signal and inputted to the calling side personal computer. As a result, the PC on the calling side and the PC on the responding side can perform full-duplex communication, realizing uniform PC communication.

Figure 9 is a plan view when the modem circuit shown in Figure 6 is mounted on one of the boards 3) used in this example, and the number of figures of the circuit elements to be mounted is the same. . EPRO
The connection between the M chip (6) and the microcomputer (7) is shown by a pass line. Note that the conductive paths connecting the plurality of circuit elements are omitted because they are complicated.

As shown in FIG. 9, a plurality of fixing pads (5a) to which external lead terminals (13) are fixed are provided at opposing peripheral ends of one substrate (3). Sticking pad (5a
) A plurality of circuit elements (8) and an EPROM chip (6) are fixed at predetermined positions of a conductive path (5) extending from the conductive path (5). On such a substrate (3) are a plurality of circuit elements (including a microcomputer <7) other than the EPROM chip (6).
8) is fixed, (31) is the DTE interface, (32) and (33) are the first and second modulation/demodulation circuits, (34) is the DTMF generation circuit, and (40) is the EPROM.
A control switch for controlling the chip <6), 7) is a microcomputer, and (8) is a chip component such as a capacitor. In addition, a plurality of conductive paths (
5) is extended, and optional circuits or some circuits necessary for the modem are arranged on the board (3).

As shown in FIG. 9, an EPROM chip (6) is fixed near or adjacent to the microcomputer (7). By fixing the EPROM chip (6) near or adjacent to the microcomputer (7), the microcomputer (7) and the EPROM chip (6) can be connected.
), that is, the routing line of the conductive path (5) can be routed at the shortest possible distance, and other mounting patterns can be used effectively and high-density mounting can be achieved. Note that the area surrounded by the dashed line indicates the area to which the case material (9) is fixed with the adhesive sheet.

FIG. 10 is a plan view of the completed hybrid integrated circuit device for modem when the other board (2) is fixed on one board (3) shown in FIG. 9 through the case material (9). Thus, from the top surface of the other substrate (2), only the top surface of the resin layer (21b) coated on the EPROM chip is exposed. That is, all the other elements other than the EPROM chip (6) are sealed within a sealed space (21) formed by the case material (9) and the two substrates (2) and (3).

According to the present invention, a hole (4) is provided at a desired position on the other substrate (2), and one substrate (3) exposed through the hole (4) is provided.
) conductive path <5>! :: EP ROM f y
The microcomputer is connected to the conductive path (5) and the adjacent conductive path (5) by a wire, and is placed in the sealed space (21) formed by the peripheral substrate (2) (3) and the case material (9). By fixing (7) and other circuit elements (8), an integrated device of a hybrid integrated circuit and an EPROM chip is created.

(G) Effects of the Invention As detailed above, according to the present invention, firstly, a hole (4) is provided at a desired position on the other substrate 2), and one substrate exposed through the hole (4) is (3) Since the EPROM chip (6) is connected to the upper conductive path (5), there is an advantage that the mounting position of the EPROM chip (6) can be arbitrarily selected. Therefore, in consideration of the electrical connection with the built-in microcomputer (7), the EPROM chip (6) and the microcomputer (7) can be connected efficiently, making it unnecessary to route signal lines. More specifically, the most closely related microcomputer (7) can be placed adjacent to the EPROM chip (6), and as a result, the EPROM chip (6)
6) and the microcomputer (7) can be realized with the shortest distance or the easiest layout, and loss in packaging density due to data line routing can be minimized. Two more boards<2)(
3) Since it is formed from a plurality of layers, it is possible to provide a high-density and compact hybrid integrated circuit device.

Second, apply EPR to the hole (4) at the desired position of the other substrate (2).
Place the OM (6) and two integrated circuit boards (2).
(3) By improving the packaging density of the microcomputer and its peripheral circuit elements, the previously required printed circuit board can be eliminated, resulting in an extremely compact EP.
A hybrid integrated circuit device incorporating a ROM chip (6) can be realized.

Thirdly, by using a metal substrate as the integrated circuit board (2) (3), its heat dissipation effect can be greatly improved compared to a printed circuit board, which can further contribute to an improvement in packaging density. In addition, by using copper foil (11) as the conductive path (5),
The resistance value of the conductive path (3) can be significantly reduced compared to conductive paste, and the circuit to be mounted can be expanded to the same level or more than that of a printed circuit board.

Fourth, the microcomputer 7) connected to the EPROM chip (6) and its peripheral circuit elements (8) are sealed with a case material (9) and two integrated circuit boards (2) and (3). Since it is incorporated into the stop space (21) in a gooey or chip shape, it occupies an extremely small area compared to a conventional printed circuit board molded with resin, and has the advantage of greatly improving packaging density.

Fifth, the case material (9) and two integrated circuit boards (2) (3)
) by substantially matching the peripheral edges of the integrated circuit boards (2) and (3), almost the entire surface of the integrated circuit boards (2) and (3) can be used as the sealed space (21), which, together with improved packaging density, makes it possible to create an extremely compact hybrid integrated circuit device. realizable.

Sixth, there is a light-shielding resin layer on the EPROM chip (6).
21b) is provided, so the EPROM chip (6
> can protect EFROM, chip (
6), and the gap between the E F ROM chip (6) and one of the substrates (2) can be sealed.

Seventh, it has the advantage that the external leads (12) and (13) can be derived from the negative sides or opposing sides of the two integrated circuit boards (2 and 3), making it possible to realize a hybrid integrated circuit device with an extremely large number of bins. .

[Brief explanation of the drawing]

Fig. 1 is a perspective view showing this embodiment, and Fig. 2 is an I-
I sectional view, FIG. 3 is a perspective view showing the wooce material used in this example, FIG. 4 is a sectional view of the substrate used in this example, FIG. 5 is a sectional view showing another example, and FIG. The figure is a block diagram showing the modem used in this embodiment, Figure 7 is a block diagram showing the DTE interface of the modem shown in Figure 6, and Figure 8 is a block diagram showing the microcomputer of the modem shown in Figure 6. 9 is a plan view when the block diagram shown in FIG. 6 is mounted on the board, FIG. 10 is a plan view when the case material is fixed on the board shown in FIG. 9, and FIG. This figure and FIG. 12 are cross-sectional views showing a conventional EPROM mounting structure. (1)...Hybrid integrated circuit device, (2)(3)...
Integrated circuit board, (5)... conductive path, (6)...
EPROM chip, (7)...microcomputer, (8)...circuit element, 4)...hole, (
9)...Case material, (21a)...Ultraviolet-transparent resin, (21b)...Ultraviolet-opaque resin, (
22〉...Sealing material.

Claims (11)

[Claims] (1) two integrated circuit boards arranged to face each other, a conductive path having a desired pattern formed on opposing main surfaces of the substrates, and a nonvolatile memory chip connected to the conductive path; A microcomputer and its peripheral circuit elements supplied with data from the memory and connected to conductive paths on the substrate, and a case material integrated between the substrates, and placed at a desired position on the one substrate. A hole is provided, the nonvolatile memory chip is fixed to the conductive path on the other substrate exposed through the hole, the electrode of the nonvolatile memory chip and the desired conductive path are connected with a bonding wire, and the both substrates are bonded. and a hybrid integrated circuit device, wherein the microcomputer and its peripheral circuit elements are arranged in a sealed space formed by the case material. (2) The hybrid integrated circuit device according to claim 1, wherein a metal substrate whose surface is insulated is used as the integrated circuit board. (3) The hybrid integrated circuit device according to claim 1, wherein the shapes of both the substrates are substantially the same. (4) The hybrid integrated circuit device according to claim 1, wherein copper foil is used as the conductive path. (5) The hybrid integrated circuit device according to claim 1, wherein the microcomputer is incorporated in the form of a die on the conductive surface. (6) The hybrid integrated circuit device according to claim 1, wherein a chip resistor or a chip capacitor is used as the peripheral circuit element. (7) The hybrid integrated circuit device according to claim 1, further comprising a frame having a constant thickness so that the case material substantially coincides with peripheral edges of both the substrates. (8) The hybrid integrated circuit device according to claim 7, further comprising an auxiliary frame arranged between the two substrates around the hole provided in the one substrate and provided as a part of the frame body. . (9) The hybrid integrated circuit device according to claim 1, wherein the nonvolatile memory chip is sealed with a sealing resin layer in which a resin that transmits ultraviolet rays is injected into the hole. (10) The hybrid integrated circuit device according to claim 9, further comprising a sealing resin layer for blocking ultraviolet rays provided on the sealing resin layer in the hole. (11) The hybrid integrated circuit device according to claim 10, wherein the upper surface of the sealing resin layer and the upper surface of the case material are substantially aligned.