JPH02294037A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH02294037A JPH02294037A JP11427789A JP11427789A JPH02294037A JP H02294037 A JPH02294037 A JP H02294037A JP 11427789 A JP11427789 A JP 11427789A JP 11427789 A JP11427789 A JP 11427789A JP H02294037 A JPH02294037 A JP H02294037A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- protective film
- film
- silicon oxide
- silicon nitride
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 14
- 230000001681 protective effect Effects 0.000 claims abstract description 10
- 229910052751 metal Inorganic materials 0.000 claims abstract description 4
- 239000002184 metal Substances 0.000 claims abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 11
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 11
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract description 9
- 229910052782 aluminium Inorganic materials 0.000 abstract description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 8
- 239000012535 impurity Substances 0.000 abstract description 8
- 150000002500 ions Chemical class 0.000 abstract description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract description 4
- 229910052698 phosphorus Inorganic materials 0.000 abstract description 4
- 239000011574 phosphorus Substances 0.000 abstract description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract description 4
- 238000004090 dissolution Methods 0.000 abstract 3
- 238000010276 construction Methods 0.000 abstract 1
- 238000005868 electrolysis reaction Methods 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000035699 permeability Effects 0.000 description 1
- 230000009528 severe injury Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0504—14th Group
- H01L2924/05042—Si3N4
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、金属配線上に、ワイヤボンディング用の開口
部を除いて２層構造の保護膜を形成した半導体装置に関
するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor device in which a two-layer protective film is formed on metal wiring except for the opening for wire bonding.
（従来の技術）
この種の従来の半導体装置について、第２図により説明
するａｎ図は，従来の半導体装置の要部拡大断面図で，
シリコン基板ｌの表面に形成されたアルミニウム配線２
は、ワイヤボンディング用の開口部を除いて，上記のシ
リコン基板１とともに、例えば、リンを重量比で数パー
セント含んだ酸化ケイ素膜３および窒化ケイ素暎４から
なる２層構造の保護膜で覆われている．
なお，上記の酸化ケイ素膜３は，アルミニウム配線２に
加わる応力を緩和し、且つ外部から侵入する不純物やイ
オンを防ぎ，窒化ケイ素膜４は、低い水分透゛ｊ率を利
用して外部からの湿気の侵入を防止し，半導体装置を保
護するものである。(Prior Art) This type of conventional semiconductor device is explained using FIG.
Aluminum wiring 2 formed on the surface of silicon substrate l
The silicon substrate 1 is covered with a two-layer protective film consisting of a silicon oxide film 3 containing several percent by weight of phosphorus and a silicon nitride film 4, except for the opening for wire bonding. ing. The silicon oxide film 3 alleviates the stress applied to the aluminum wiring 2 and prevents impurities and ions from entering from the outside, and the silicon nitride film 4 uses its low moisture permeability to prevent external entry. This prevents moisture from entering and protects semiconductor devices.
（発明，が解決しようとする課題）
しかしながら，上記の構成では、不純物，イオンを含む
水分によって，酸化ケイｌ７４膜３のリンが溶出し，電
・解作用によって、アルミニウム配線２が溶解し，甚し
い場合には半導体装置が故障するという問題があった。(Problem to be solved by the invention) However, in the above configuration, phosphorus in the silicon oxide l74 film 3 is eluted by moisture containing impurities and ions, and the aluminum wiring 2 is dissolved by electrolytic action, resulting in severe damage. There is a problem that the semiconductor device may break down if the problem occurs.
本発明は上記の問題を解決するもので、アルミニウム配
線の溶解が発生しない，信頼性のある半導体装置を提供
するものである。The present invention solves the above problems and provides a reliable semiconductor device in which the aluminum wiring does not melt.
（課題を解決するための手段）
上記の課題を解決するため，本発明は，窒化ケイ素膜の
開口面積を小さくシ，酸化ケイ素膜を完全に覆うもので
ある．
（作 用）
上記の構成によれば、不純物，イオン等を含む水分は窒
化ケイ素膜で妨げられて、酸化ケイ素膜に到達しないの
で、リン等の不純物の溶出もなく、また、これを含む水
の電解作用によるアルミニウム配線の溶解もなくなる。(Means for Solving the Problems) In order to solve the above problems, the present invention reduces the opening area of the silicon nitride film and completely covers the silicon oxide film. (Function) According to the above configuration, water containing impurities, ions, etc. is blocked by the silicon nitride film and does not reach the silicon oxide film, so impurities such as phosphorus do not elute, and water containing impurities and ions does not reach the silicon oxide film. The melting of aluminum wiring due to electrolytic action is also eliminated.
（実施例）
本発明の一実施例を第１図に示す要部拡大断面図により
説明する。同図において、本実施例が第２図に示した従
来例と異なる点は，２層構造の保護膜を具体的に、厚さ
が共に５００ｒｖ＋の酸化ケイ崇膜３と，窒化ケイ素膜
４で形成した点と，窒化ケイ素１漠４の開口部を狭くシ
，酸化ケイ素膜３の端而を完全に被覆した点である。そ
の他は変わらないので、同じ構成部品には同一符号を付
して、その説明を省略する。(Example) An example of the present invention will be described with reference to an enlarged cross-sectional view of main parts shown in FIG. In the same figure, the difference between this embodiment and the conventional example shown in FIG. The second point is that the opening of the silicon nitride film 1 is narrowed and the edge of the silicon oxide film 3 is completely covered. Since the rest remains the same, the same components are given the same reference numerals and their explanations will be omitted.
本発明の実施例と従来の半導体装置を比較した結果，温
度１２５℃，湿度８５％，電源電圧５．５Ｖの環境下で
、従来構造は、５００時間で４５分の１ ． １０００
時間で４５分の３のワイヤボンディング部が溶解したの
に対し、本実施例は、１０００時間で４５分のＯであっ
た。As a result of comparing the embodiment of the present invention with a conventional semiconductor device, it was found that in an environment of a temperature of 125° C., humidity of 85%, and a power supply voltage of 5.5 V, the conventional structure lost 1/45th of 100% in 500 hours. 1000
While the wire bonding part melted in 3/45 hours, in this example, the O temperature was 45 minutes in 1000 hours.
（発明の効果）
以上説明したように、本発明によれば、高温高湿の環境
下でも、金属配線のワイヤボンデイング部が，溶解する
ことがないので、市場故障率を大幅に低減させる信頼性
の高い半導体装置が得られる。(Effects of the Invention) As explained above, according to the present invention, the wire bonding part of the metal wiring does not melt even in a high temperature and high humidity environment, thereby improving reliability and significantly reducing the market failure rate. A semiconductor device with high performance can be obtained.
第１図は本発明による半導体装置の要部拡大断面図，第
２図は従来の半導体装置の要部拡大断面図である。
１ ・・・シリコン基板， ２ ・・・アルミニウム配
線， ３ ・・・酸化ケイ素膜， ４ ・・・窒化ケイ
素膜。
特許出願人 松下電子工業株式会社FIG. 1 is an enlarged sectional view of a main part of a semiconductor device according to the present invention, and FIG. 2 is an enlarged sectional view of a main part of a conventional semiconductor device. 1...Silicon substrate, 2...Aluminum wiring, 3...Silicon oxide film, 4...Silicon nitride film. Patent applicant Matsushita Electronics Co., Ltd.
Claims (1)
上の保護膜で覆われた半導体装置において、最上層の保
護膜の開口部を、下層の保護膜の開口部より狭くし、下
層の保護膜の端面を被覆したことを特徴とする半導体装
置。In a semiconductor device covered with two or more layers of protective film that opens the wire bonding part of the metal wiring, the opening of the uppermost protective film is narrower than the opening of the lower protective film, and the opening of the lower protective film is narrower. A semiconductor device characterized in that its end face is coated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11427789A JPH02294037A (en) | 1989-05-09 | 1989-05-09 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11427789A JPH02294037A (en) | 1989-05-09 | 1989-05-09 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02294037A true JPH02294037A (en) | 1990-12-05 |
Family
ID=14633800
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11427789A Pending JPH02294037A (en) | 1989-05-09 | 1989-05-09 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02294037A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4201792A1 (en) * | 1991-01-29 | 1992-08-06 | Mitsubishi Electric Corp | Improved corrosion-resistant plastic encapsulated integrated circuit - having elastic insulating layer on top of the passivation layer of the side sealing round the ball and and preventing moisture ingress |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5891651A (en) * | 1981-11-26 | 1983-05-31 | Seiko Epson Corp | Semiconductor device |
| JPS58116746A (en) * | 1982-10-13 | 1983-07-12 | Toshiba Corp | Manufacture of semiconductor device |
| JPS62224037A (en) * | 1986-03-26 | 1987-10-02 | Nippon Denso Co Ltd | Semiconductor device |
-
1989
- 1989-05-09 JP JP11427789A patent/JPH02294037A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5891651A (en) * | 1981-11-26 | 1983-05-31 | Seiko Epson Corp | Semiconductor device |
| JPS58116746A (en) * | 1982-10-13 | 1983-07-12 | Toshiba Corp | Manufacture of semiconductor device |
| JPS62224037A (en) * | 1986-03-26 | 1987-10-02 | Nippon Denso Co Ltd | Semiconductor device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4201792A1 (en) * | 1991-01-29 | 1992-08-06 | Mitsubishi Electric Corp | Improved corrosion-resistant plastic encapsulated integrated circuit - having elastic insulating layer on top of the passivation layer of the side sealing round the ball and and preventing moisture ingress |
| DE4201792C2 (en) * | 1991-01-29 | 1996-05-15 | Mitsubishi Electric Corp | Terminal electrode structure and method of making the same |
| US5525546A (en) * | 1991-01-29 | 1996-06-11 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and method of manufacturing thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH02294037A (en) | Semiconductor device | |
| JPS59110122A (en) | Semiconductor integrated circuit device having nitride film | |
| JPS63307758A (en) | Integrated circuit device | |
| JP3077315B2 (en) | Semiconductor device | |
| JP2933554B2 (en) | Semiconductor device and manufacturing method thereof | |
| JPS61232646A (en) | Resin-sealed type semiconductor integrated circuit device | |
| JPS60167432A (en) | Semiconductor device | |
| JP2679388B2 (en) | Method for manufacturing semiconductor device | |
| US4851301A (en) | Solder bonding with improved peel strength | |
| JPH02123753A (en) | Semiconductor device and manufacture thereof | |
| JPS60150657A (en) | Resin molded semiconductor device | |
| JPS61187269A (en) | Semiconductor device | |
| JPH0691126B2 (en) | Semiconductor device | |
| JPH0332214B2 (en) | ||
| JPS643340B2 (en) | ||
| JPH01214126A (en) | Semiconductor device | |
| JPS58192337A (en) | Semiconductor device | |
| JPH02116132A (en) | Protective film for wiring of integrated circuit | |
| JPH03209823A (en) | Resin-sealed semiconductor device | |
| JPH03227539A (en) | Semiconductor device | |
| JPS61112357A (en) | Semiconductor device | |
| JPH01238162A (en) | Semiconductor device | |
| JPH0612829B2 (en) | Semiconductor device | |
| JPS6334938A (en) | Semiconductor device | |
| JPH03136331A (en) | Semiconductor device |