JPH02292851A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPH02292851A
JPH02292851A JP1113769A JP11376989A JPH02292851A JP H02292851 A JPH02292851 A JP H02292851A JP 1113769 A JP1113769 A JP 1113769A JP 11376989 A JP11376989 A JP 11376989A JP H02292851 A JPH02292851 A JP H02292851A
Authority
JP
Japan
Prior art keywords
test
test clip
lead frames
lead frame
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1113769A
Other languages
Japanese (ja)
Inventor
Koji Takemura
幸司 竹村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP1113769A priority Critical patent/JPH02292851A/en
Publication of JPH02292851A publication Critical patent/JPH02292851A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To execute easily and reliably a mounting of test clips as well as to obtain lead frames, by which the generation of a shortcircuiting trouble can be prevented, by a method wherein test clip mounting holes are respectively provided in the base parts of the lead frames. CONSTITUTION:In lead frames 3 which are provided in an alignment on an electronic component 1 formed into a packaging structure, test clip mounting holes 4 are respectively provided in the base parts of the lead frames 3. For example, test clip mounting holes 4 are respectively provided in the base parts of lead frames 3 of a DIP type IC package 1 of a structure, wherein a plurality of pieces of the lead frames 3 are arranged in an alignment from the side surface parts of a builtin IC element main body part 2 toward downward. Thereby, test clips 5 are respectively mounted reliably in the holes 4 and the mounting work is also facilitated. Moreover, a possibility that a certain test clip 5 is moved at the time of a test or measurement and comes into contact to the lead frame 3 adjacent to the test clip 5 is reduced and the generation of a shortcircuiting trouble due to contact can be prevented.

Description

【発明の詳細な説明】 ［発明の目的］ （産業上の利用分野） 本発明は、パッケージ化された電子部品に設けられるリ
ードフレームの改良に関する。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to improvements in lead frames provided in packaged electronic components.

（従来の技術） 第３図には、この種のリードフレームが設けられたＩＣ
パッケージの従来例が示されている。(Prior art) Figure 3 shows an IC equipped with this type of lead frame.
A conventional example of a package is shown.

同図に示すように、このＩＣパッケージ１は、いわゆる
デュアルインライン（ＤＩＰ）型のもので、ＩＣ素子が
内蔵された本体部２の側面部から下方に向けて複数信の
リードフレーム３が整列配置された構造となっている。As shown in the figure, this IC package 1 is of a so-called dual-in-line (DIP) type, and a lead frame 3 for multiple signals is arranged in a line downward from the side surface of a main body 2 in which an IC element is built-in. It has a built-in structure.

ところで、この種のＩＣパッケージは、近年、一層高密
度・高性能となる反面、実装上はより小形化が要求され
ている。Incidentally, in recent years, this type of IC package has become higher in density and higher in performance, but is also required to be more compact in terms of packaging.

このため、従来のリードフレーム３では、ＩＣパッケー
ジ２の付け根部分での間隔が約１ｍｍ乃至１ｍｍ以下で
あり、非常に狭いものとなっている。Therefore, in the conventional lead frame 3, the interval at the base of the IC package 2 is approximately 1 mm to 1 mm or less, which is extremely narrow.

（発明が解決しようとする課題） このように、従来のリードフレームは、その間隔が非常
に狭いので、試験や測定等を行う場合のテストクリップ
の取付けが容易でないばかりか、テストクリップを取付
けた際に隣のリードフレームと接触して短絡し、内部の
ＩＣ等を破壊してしまうという不具合があった。(Problem to be Solved by the Invention) As described above, since the intervals between the conventional lead frames are very narrow, it is not only difficult to attach the test clips when performing tests or measurements, but also makes it difficult to attach the test clips. There was a problem in that when the lead frame came into contact with the adjacent lead frame, it caused a short circuit and destroyed the internal IC.

本発明は、上記従来の課題に鑑みてされたものであり、
その目的は、テストクリップの取付けを容易且つ確実に
するとともに、短絡事故の発生を未然に防止できるリー
ドフレームを提倶することにある。The present invention has been made in view of the above-mentioned conventional problems,
The purpose is to provide a lead frame that allows test clips to be attached easily and reliably, and that can prevent short-circuit accidents.

［発明の構成］ （課題を解決するための手段） 上記目的を達成するために本発明は、パッケージ化され
た電子部品に整列して設けられるリードフレームにおい
て、該リードフレームの基部にテストクリップ取付孔を
設けたことを特徴とするものである。[Structure of the Invention] (Means for Solving the Problem) In order to achieve the above object, the present invention provides a method for attaching a test clip to the base of the lead frame, which is provided in alignment with a packaged electronic component. It is characterized by having holes.

（作用） このような構成において、試験や測定等のためにテスト
クリップをリードフレームに取付ける場合、リードフレ
ームの基部に設けられたテストクリップ取付孔に取付け
ればよく、容易且つ確実な取付ができる。このため、テ
ストクリップがぐらついて隣のリードフレームに接触し
て短絡し、内部部品の破損等を防止できる。(Function) In such a configuration, when attaching the test clip to the lead frame for testing or measurement, it is sufficient to attach it to the test clip attachment hole provided at the base of the lead frame, allowing for easy and reliable attachment. . Therefore, it is possible to prevent the test clip from wobbling and coming into contact with the adjacent lead frame, causing a short circuit and causing damage to internal parts.

（実施例） 第１図は、本発明に係るリードフレームが適用されたＤ
ＩＰ型ＩＣパッケージの外観構成図である。(Example) Fig. 1 shows a D to which the lead frame according to the present invention is applied.
FIG. 2 is an external configuration diagram of an IP type IC package.

同図に示すように、このＩＣパッケージ１は、ＩＣ素子
が内蔵された本体部２の側面部から下方に向けて複数個
のリードフレーム３が整列配置された構造となっている
。As shown in the figure, this IC package 1 has a structure in which a plurality of lead frames 3 are aligned downward from the side surface of a main body 2 in which an IC element is built-in.

特に本実施例では、ＩＣパッケージ１のリードフレーム
２の基部にはテストクリップ取付孔４が設けられている
。Particularly in this embodiment, a test clip attachment hole 4 is provided at the base of the lead frame 2 of the IC package 1.

このテストクリップ取付孔４にテストクリップを取付け
た状態を第２図に示す。FIG. 2 shows a state in which a test clip is attached to this test clip attachment hole 4.

第２図から理解されるように、テストクリップ５はテス
トクリップ取付孔４に確実に取付けられ、また、その取
付け作業も容易である。As understood from FIG. 2, the test clip 5 can be securely attached to the test clip attachment hole 4, and the attachment operation is easy.

また、第２図から理解されるように、テストクリップ５
はテストクリップ取付孔４にしっかり取り付けられるの
で、試験や測定時にテストクリップ５が移動して、隣の
リードフレーム２に接触する可能性は少なく、接触に起
因する短絡事故の発生が未然に防止できる。Moreover, as understood from FIG. 2, test clip 5
Since the test clip 5 is securely attached to the test clip mounting hole 4, there is little chance that the test clip 5 will move and come into contact with the adjacent lead frame 2 during testing or measurement, and short circuit accidents caused by contact can be prevented. .

なお、本実施例では、ＤＩＰ型のＩＣパッケージのリー
ドフレームに本発明を適用した例を示したが、ｓｒｐ型
のＩＣパッケージやその他の電子部品のリードフレーム
にも適用できることは勿論である。In this embodiment, an example was shown in which the present invention was applied to a lead frame of a DIP type IC package, but it goes without saying that the present invention can also be applied to a lead frame of an SRP type IC package or other electronic components.

［発明の効果］ 以上説明したように、本発明によれば、リードフレーム
の基部にテストクリップ取付孔を設けたので、テストク
リップを容易且つ確実に取付けることができる。[Effects of the Invention] As described above, according to the present invention, since the test clip attachment hole is provided at the base of the lead frame, the test clip can be attached easily and reliably.

また、テストクリップが隣のリードフレームと接触する
ことを防止できるので、短絡事故を回避でき、短絡に起
因する内部部品の破損を防止できるという効果を有する
。Furthermore, since the test clip can be prevented from coming into contact with the adjacent lead frame, it is possible to avoid short-circuit accidents and to prevent damage to internal parts caused by short-circuits.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明に係るリードフレームが適用されたＩＣ
パッケージの外観構成図、第２図はテストクリップ孔に
テストクリップを取付けた状態を説明するための外観図
、第３図は従来のリードフレームが設けられたＩＣパッ
ケージの外観構成図である。 １・・・ＩＣパッケージ ２・・・本体部 ３・・・リードフレーム ４・・・テストクリップ取付孔 ５・・・テストクリップFigure 1 shows an IC to which the lead frame according to the present invention is applied.
FIG. 2 is an external view for explaining the state in which a test clip is attached to a test clip hole, and FIG. 3 is an external view of an IC package provided with a conventional lead frame. 1...IC package 2...Body part 3...Lead frame 4...Test clip mounting hole 5...Test clip

Claims (1)

【特許請求の範囲】 パッケージ化された電子部品に整列して設けられるリー
ドフレームにおいて、 基部にテストクリップ取付孔を設けたことを特徴とする
リードフレーム。[Claims] A lead frame arranged in alignment with a packaged electronic component, characterized in that a test clip mounting hole is provided in the base.
JP1113769A 1989-05-08 1989-05-08 Lead frame Pending JPH02292851A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1113769A JPH02292851A (en) 1989-05-08 1989-05-08 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1113769A JPH02292851A (en) 1989-05-08 1989-05-08 Lead frame

Publications (1)

Publication Number Publication Date
JPH02292851A true JPH02292851A (en) 1990-12-04

Family

ID=14620670

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1113769A Pending JPH02292851A (en) 1989-05-08 1989-05-08 Lead frame

Country Status (1)

Country Link
JP (1) JPH02292851A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6316825B1 (en) * 1998-05-15 2001-11-13 Hyundai Electronics Industries Co., Ltd. Chip stack package utilizing a connecting hole to improve electrical connection between leadframes

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6316825B1 (en) * 1998-05-15 2001-11-13 Hyundai Electronics Industries Co., Ltd. Chip stack package utilizing a connecting hole to improve electrical connection between leadframes

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