JPH02292064A - Ｌｅｄプリントヘッド - Google Patents

Ｌｅｄプリントヘッド

Info

Publication number
JPH02292064A
JPH02292064A JP1111473A JP11147389A JPH02292064A JP H02292064 A JPH02292064 A JP H02292064A JP 1111473 A JP1111473 A JP 1111473A JP 11147389 A JP11147389 A JP 11147389A JP H02292064 A JPH02292064 A JP H02292064A
Authority
JP
Japan
Prior art keywords
led array
pad
substrate
drive element
die
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1111473A
Other languages
English (en)
Inventor
Yoshihiro Ogawa
小川　義広
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niigata Fuji Xerox Manufacturing Co Ltd
Original Assignee
Niigata Fuji Xerox Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Niigata Fuji Xerox Manufacturing Co Ltd filed Critical Niigata Fuji Xerox Manufacturing Co Ltd
Priority to JP1111473A priority Critical patent/JPH02292064A/ja
Publication of JPH02292064A publication Critical patent/JPH02292064A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements

Landscapes

  • Exposure Or Original Feeding In Electrophotography (AREA)
  • Led Device Packages (AREA)
  • Dot-Matrix Printers And Others (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はＬＥＤアレイ素子とＬＥＤアレイ駆動素子を同
一配ｔａ基板上に搭載し、ワイヤーボンドによって構成
するＬＥＤプリントヘッドに関する．〔従来の技術〕 従来、この種のＬＥＤプリントヘッドでは、ＣＭＯＳデ
バイスからなるベアチップのＬＥＤアレイ駆動素子を配
線基板上に搭載した場合の駆動素子サブストレート部へ
の電位供給形態は、予め招載すべき駆動素子の極性を想
定して、基板配線パターンにより駆動素子ダイパッド部
へ直接的に電位供給を行ない、ダイパッドと駆動素子間
は導電性接着剤による接続で電位を供給していた．〔発
明が解決しようとする課題〕 上述した従来のＬＥＤ駆動素子がＣＭＯＳデバイスから
なるベアチップである場合、デバイスサブストレート部
への電位供給形態は基板配線パターンにより駆動素子グ
イボンドパッド部へ直接供給されていたため、グイボン
ドパッド部の供給電位と異なる椹性のサブストレートを
もつ駆動素子を搭載することができなかった． 本発明の目的は前記課題を解決したＬＥＤプリントヘッ
ドを提供することにある． 〔課題を解決するための手段〕 前記目的を達成するなめ、本発明は同一配線基板上に複
数個のＬＥＤアレイ素子及びＬＥＤアレイ駆動素子をそ
れぞれ直線上に配列搭載してなるＬＥＤプリントヘッド
において、ＬＥＤアレイ駆動素子をＣＭＯＳデバイスか
らなるベアチップとし、前記ＬＥＤアレイ駆動素子の搭
戟すべき前記配線基板のダイバッド部を電気的に浮いた
パターンとして構成し、かつ前記ＬＥＤアレイ駆動素子
用サブストレート部への電位供給を選択的に切替えるボ
ンディングバッドを前記ダイパッド部に対応させて同一
配線板上に設けたものである．〔実施例〕 次に本発明について図面を参照して説明する．第１図は
本発明の一実施例を示す斜視図である．図において、配
線基板１はＬＥＤアレイ２、ＬＥＤアレイ駆動素子３を
搭載するグイボンドパッド部４，５、ワイヤーボンドパ
ッド部６，〜６・．が形成され、ダイボンドパッド部５
より配線パターン７を引き出し、電源用バッド８及びＧ
ＮＤ用バッド９近傍にボンディングパッド１０が形成さ
れている．各ダイボンドパッド部に措載された素子は導
電性接着剤により固定される．次に、駆動素子３はＣＭ
ＯＳデバイスからなるベアチップ状のものとし、ダイパ
ッド部５への電位供給は搭載した駆動素子のサブストレ
ート極性を判断して、たとえばサブストレートがＰＣＢ
ならボンディングバッド１０と９間をワイヤーボンドし
、またはサブストレートがＮｃＨならボンディングバッ
ド１０と８間をワイヤーボンドすることによって電位供
給を行なう． 〔発明の効果〕 以上説明したように本発明はＬ　Ｅ　Ｄ　ｌｉ［動素子
をＣＭＯＳデバイスからなるベアチップを使用して、配
線基板に搭載した場合、素子のサブストレート極性がＮ
ＣＮ，　ＰＣＮいずれの極性のものであっても、素子サ
ブストレート部への電位供給が選択的に可能となり、プ
リントヘッドの原価低減を実現できる効果を有する，
【図面の簡単な説明】
第１図は本発明の一実施例を示す斜視図である．１・・
・配線基板　　　　　　２・・・ＬＥＤアレイ３・・・
ＬＥＤアレイ駆動素子 ４・・・ＬＥＤアレイのグイボンドパッド部５・・・Ｌ
ＥＤアレイ駆動素子のダイボンドバ・ツド部６・・・ワ
イヤーボンドパッド部 ７・・・配線パターン ８・・・電源用パッド ９・・・ＧＮＤ用パッド １０・・・ワイヤーボンドパッド

Claims (1)

    【特許請求の範囲】
  1. （１）同一配線基板上に複数個のＬＥＤアレイ素子及び
    ＬＥＤアレイ駆動素子をそれぞれ直線上に配列搭載して
    なるＬＥＤプリントヘッドにおいて、ＬＥＤアレイ駆動
    素子をＣＭＯＳデバイスからなるベアチップとし、前記
    ＬＥＤアレイ駆動素子の搭載すべき前記配線基板のダイ
    パッド部を電気的に浮いたパターンとして構成し、かつ
    前記ＬＥＤアレイ駆動素子用サブストレート部への電位
    供給を選択的に切替えるボンディングパッドを前記ダイ
    パッド部に対応させて同一配線板上に設けたことを特徴
    とするＬＥＤプリントヘッド。
JP1111473A 1989-04-28 1989-04-28 Ｌｅｄプリントヘッド Pending JPH02292064A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1111473A JPH02292064A (ja) 1989-04-28 1989-04-28 Ｌｅｄプリントヘッド

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1111473A JPH02292064A (ja) 1989-04-28 1989-04-28 Ｌｅｄプリントヘッド

Publications (1)

Publication Number Publication Date
JPH02292064A true JPH02292064A (ja) 1990-12-03

Family

ID=14562144

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1111473A Pending JPH02292064A (ja) 1989-04-28 1989-04-28 Ｌｅｄプリントヘッド

Country Status (1)

Country Link
JP (1) JPH02292064A (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6025858A (en) * 1997-01-30 2000-02-15 Canon Kabushiki Kaisha Recording head and image forming apparatus using the same
US8884326B2 (en) 2012-01-24 2014-11-11 Cooledge Lighting Inc. Polymeric binders incorporating light-detecting elements and related methods
US8896010B2 (en) 2012-01-24 2014-11-25 Cooledge Lighting Inc. Wafer-level flip chip device packages and related methods
US8907362B2 (en) 2012-01-24 2014-12-09 Cooledge Lighting Inc. Light-emitting dies incorporating wavelength-conversion materials and related methods
US9343443B2 (en) 2014-02-05 2016-05-17 Cooledge Lighting, Inc. Light-emitting dies incorporating wavelength-conversion materials and related methods

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6025858A (en) * 1997-01-30 2000-02-15 Canon Kabushiki Kaisha Recording head and image forming apparatus using the same
US9236502B2 (en) 2012-01-24 2016-01-12 Cooledge Lighting, Inc. Wafer-level flip chip device packages and related methods
US8896010B2 (en) 2012-01-24 2014-11-25 Cooledge Lighting Inc. Wafer-level flip chip device packages and related methods
US8907362B2 (en) 2012-01-24 2014-12-09 Cooledge Lighting Inc. Light-emitting dies incorporating wavelength-conversion materials and related methods
US9184351B2 (en) 2012-01-24 2015-11-10 Cooledge Lighting Inc. Polymeric binders incorporating light-detecting elements
US9190581B2 (en) 2012-01-24 2015-11-17 Cooledge Lighting Inc. Light-emitting dies incorporating wavelength-conversion materials and related methods
US8884326B2 (en) 2012-01-24 2014-11-11 Cooledge Lighting Inc. Polymeric binders incorporating light-detecting elements and related methods
US9276178B2 (en) 2012-01-24 2016-03-01 Cooledge Lighting, Inc. Light-emitting dies incorporating wavelength-conversion materials and related methods
US9472732B2 (en) 2012-01-24 2016-10-18 Cooledge Lighting, Inc. Light-emitting dies incorporating wavelength-conversion materials and related methods
US9478715B2 (en) 2012-01-24 2016-10-25 Cooledge Lighting Inc. Discrete phosphor chips for light-emitting devices and related methods
US9496472B2 (en) 2012-01-24 2016-11-15 Cooledge Lighting Inc. Wafer-level flip chip device packages and related methods
US9343443B2 (en) 2014-02-05 2016-05-17 Cooledge Lighting, Inc. Light-emitting dies incorporating wavelength-conversion materials and related methods
US9343444B2 (en) 2014-02-05 2016-05-17 Cooledge Lighting, Inc. Light-emitting dies incorporating wavelength-conversion materials and related methods

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