JPH0227807A - Electronic circuit - Google Patents

Abstract

PURPOSE:To reduce the mirror capacity and to improve the frequency characteristic by applying emitter follower amplification to an output signal with a small amplitude and in phase with an input signal by the 5th and 6th transistors(TRs) and driving the 3rd and 4th TRs respectively. CONSTITUTION:Bases of the 3rd and 4th TRs Q6, Q7 provided respectively to collectors of two input TRs 1st, 2nd TRs Q1, Q2 forming a differential pair are parted from ground to apply biasing. An output signal with a small amplitude and in phase to the input signal is fed to each base from the 5th and 6th TRs Q8, Q9 with emitter follower amplification respectively. Thus, the gain of the two input TRs Q1, Q2 is less than the unity at least, the mirror capacitance based on the collector junction capacitance is reduced and a differential amplifier with a broad band whose frequency characteristic is improved is obtained.

Description

[Detailed Description of the Invention] [Table of Contents] Overview Industrial Application Fields Prior Art (Figures 3 to 5) Problems to be Solved by the Invention Examples of Means and Actions for Solving the Problems An Embodiment of the Invention ( Figure 1.2) Effects of the invention [Summary] The purpose of this invention is to provide a differential amplifier circuit for electronic circuits that can extremely reduce mirror capacitance and improve frequency characteristics. First and second transistors forming a differential pair, each having its base connected to the input signal difference, each emitter connected to the collector of the first and second transistor, and each collector side connected to the power supply voltage and the first and second output terminals via a resistor,
a third whose base is grounded through a diode, respectively;
a fourth transistor, an emitter connected to the bases of the third and fourth transistors, and a collector connected to a power supply voltage; each base is connected to the collector side of the third and fourth transistors; fifth and sixth transistors each receiving an output signal of small amplitude and in phase with the input signal of the first and second transistors,
The fifth output signal is in phase with the input signal and has a small amplitude.
, the emitter follower is amplified by the sixth transistor, and the third,
By driving each of the fourth transistors, the gain of the first and second transistors is at least less than 1, and the mirror capacitance thereof is reduced.

[Industrial application field]

The present invention relates to an electronic circuit, and more particularly to an electronic circuit that performs wideband differential amplification with low input capacitance.

A differential amplifier circuit that amplifies the difference between two input signals has a well-balanced pair of transistors, so it is widely used as a wideband amplifier, such as in video amplifiers and amplifiers for magnetic heads.Bipolar In integrated circuits using transistors, in order to realize a differential amplifier circuit with good noise characteristics, it is necessary to reduce the base resistance of the differential input transistors, and miniaturization processes are used for this purpose. The shape is 5 to 6 times larger than other elements. Therefore, when such a large transistor is used in the input stage differential amplifier circuit, the parasitic capacitance of this transistor increases, and its Countermeasures are important.

[Conventional technology]

As a conventional differential amplifier circuit of this type, there is a first circuit as shown in FIG. 3, for example. In the figure, input 1.2 is applied to the bases of transistors Q, , Q, respectively, and the difference between the two input signals is taken out via resistor 3.4, which is a load. Note that 5 is a current source. in this case,
A signal that is 0 times as large as the signal applied to the input terminal is output, and the gain A (1 is expressed by the following formula (■).

Also, as shown in the figure, for input l, transistor Q
The outputs of , are in reverse phase, and the outputs of transistor Q are in phase, and the relationship between input 2 and the output of transistor Q1 is the same.

Here, the npn used in the differential amplifier circuit as described above
There are various types of capacitance parasitic to transistors as follows.

(a) Base-emitter capacitance: CB CIE-CIF+CJffi However, C□; Diffusion capacitance C7 section: Emitter junction capacitance (b) Collector-base capacitance! : CJ CCJC: Collector junction capacitance (c) Collector-earth capacitance: ccsCcs: Collector-substrate capacitance e However, RL: Value of load resistance 3.4 r-: Emitter resistance of transistor Q, Q, [Invention] However, in such conventional differential amplifier circuits, as mentioned above, when transistors are integrated, their size is larger than other elements, so the above-mentioned capacitance has a high frequency characteristic. Especially for the junction capacitance CJc, this amplification amount is A.

When the amplification factor is doubled, CJC becomes the feedback capacitance from the output to the input, and equivalently, it looks like (1+A*) CJc capacitance is included alone (becomes a Miller capacitance), which has the largest effect on frequency characteristics. It's having an impact.

Therefore, if emphasis is placed on noise characteristics, there is a problem in that flat transfer characteristics cannot be obtained up to high frequencies.

Here, to explain the mirror capacity, Fig. 4(a)
In the emitter-grounded transistor Q shown in Figure 4(b), the base-collector capacitance CJC is equivalently expressed as (1+A*)C
Looks like JC. Note that 6 is a load resistance. Therefore, in the differential amplifier circuit of FIG. 3, the amplification degree A is Am −
When it is 100,200 times larger, the mirror capacity becomes extremely large.

On the other hand, there is also a second circuit used as a method of reducing the influence of the collector junction capacitance CJc, as shown in FIG. This circuit is a wideband amplifier circuit in which a cascode connection is applied to a differential amplifier, and a transistor Q is connected in cascode between transistors QI and Q and a resistor 3.4.
a and Q are inserted respectively. In this circuit, a signal A,' times the signal applied to the input terminal is transmitted to the transistor Q.
6. Appears on the collector side of Q8. Transistor Q4, Q
, is the base grounded, so the emitter resistance of r-star Qa, Q), and the signal gain A obtained from the output terminal is (1+AI') Cac-(1+1) CJC"
= 2 CJC...■, which can be kept lower than the circuit shown in FIG.

However, even in this circuit, the collector junction capacitance cannot be made less than twice, and there is still room for improvement in order to obtain even better frequency characteristics.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a differential amplifier circuit in which the mirror capacitance can be extremely reduced (and the frequency characteristics can be improved).

[Means to solve the problem]

In order to achieve the above object, the electronic circuit according to the present invention configures a differential pair by connecting the emitters in common, and has first and second transistors to which the input signal difference is input to the bases of each, and each emitter. A third transistor is connected to the collectors of the first and second transistors, each collector side is connected to the power supply voltage and the first and second output terminals via a resistor, and the base is grounded via a diode. , a fourth transistor, an emitter connected to the bases of the third and fourth transistors, and a collector connected to the power supply voltage, each base being connected to the collector of the third and fourth transistors. fifth and sixth transistors each receiving an output signal of small amplitude and in phase with the input signal of the first and second transistors from the side, and outputting an output signal of small amplitude and in phase with the input signal. By amplifying the emitter follower with the fifth and sixth transistors and driving the third and fourth transistors, respectively, the first and second
The gain of the transistor is at least less than 1, and the mirror capacitance thereof is made small.

[Effect]

In the present invention, the bases of the third and fourth transistors provided on the collector sides of the two input transistors (first and second transistors) constituting the differential pair are biased away from the ground. Each base has a fifth output signal that is in phase with the input signal and has a small amplitude.
, are applied to the sixth transistor after being emitter follower amplified.

Therefore, the gains of the two input transistors are at least less than 1, their mirror capacitances are extremely small, and the frequency characteristics are improved.

〔Example〕

Hereinafter, the present invention will be explained based on the drawings.

FIG. 1.2 is a diagram showing an embodiment of an electronic circuit according to the present invention. In explaining this embodiment, the same components as in the conventional example are denoted by the same numbers. First, the structure will be explained. In FIG. 1, differential input transistors QI, Ch (first,
Transistors Q= and Qt (corresponding to the third and fourth transistors) are inserted on the collector sides of the transistors (corresponding to the second transistor), respectively, and a resistor 11.12 and a resistor are connected to the collector sides of the transistors Q and SQ, respectively. 13.14 is connected to the power supply VCC, and transistors Q, , Q
.

An output signal is taken out from the collector of. Further, diodes D+ and Dz for stabilizing bias are connected to the base of the transistor Q, and the emitter of a transistor Qs (corresponding to the fifth transistor) is connected via a resistor 15.

A signal in phase with the input l at the connection point of resistors 13 and 14 is applied to the base of transistor Q, and transistor Q amplifies the in-phase signal as an emitter follower and supplies it to the base of transistor Q. Note that 16 is a resistor.

On the other hand, diodes Ds and D4 are connected to the base of the transistor Q7 to stabilize the bias, and the emitter of the transistor Q (corresponding to the sixth transistor) is connected via a resistor 17. A signal in phase with input 2 at the connection point of resistors 11 and 12 is applied to the base of transistor Q, and transistor Q9 emitter-follower amplifies the in-phase signal and supplies it to the base of transistor Q. Note that the first day is resistance.

In the above configuration, when the differential input is supplied to the bases of the transistors Qs and Q with the signal waveform shown in the figure, the signal waveform of each part changes as shown in the figure.゛At this time, input l
A signal in phase with appears on the collector side of transistor Q,
This signal is divided by resistors 13 and 14 and applied to the base of transistor Q. As a result, the transistor Q amplifies the in-phase signal of the input 1 as an emitter follower and supplies it to the base of the transistor Q. Therefore, when the amplitude of input 1 is large, transistor Q-
The current flowing through the transistor Q is large, and the amplitude appearing on the collector side of the transistor Q can be made smaller than the input signal. This means that the amplification degree of transistor Q is A.

This means that A, ku1, and this phenomenon occurs when the transistor Q! The same applies to

Since Ao<1, the mirror capacity becomes (1+Ao
) CJC<2 Cxc . . .■, and the circuit can be made much smaller than the conventional circuit shown in FIG. Note that the value of the Miller capacitance based on the equation (2) can be changed by adjusting the level of the common mode feedback signal by selecting the resistance value of the resistor 11.12 or the resistor 13.14. On the other hand, the gain at the output terminal remains the same as before and does not decrease.As a result, the collector junction capacitance CJ that has the most influence on the frequency characteristics
Since the value of the Miller capacitance due to C is reduced, a wideband differential amplifier circuit with good frequency characteristics up to a high frequency band can be obtained as shown in FIG. In FIG. 2, the first conventional example refers to the first circuit shown in FIG. 3, and the second conventional example refers to the second circuit shown in FIG. 5. As a result,
Even if low noise is achieved and the input transistors have a large pattern, an amplifier with good frequency characteristics can be realized.

〔effect〕

According to the present invention, it is possible to obtain a wideband differential amplifier circuit based on the collector junction capacitance (the value of the Miller capacitance can be made extremely small, and the frequency characteristics are significantly improved).

[Brief explanation of the drawing]

Figure 1.2 is a diagram showing an embodiment of the electronic circuit according to the present invention, Figure 1 is its circuit diagram, Figure 2 is a diagram showing its frequency characteristics, and Figure 3 is a conventional differential amplifier. FIG. 4 is a circuit diagram showing a first example of the circuit; FIG. 4 is a diagram for explaining Miller capacitance; FIG. 5 is a circuit diagram showing a second example of a conventional differential amplifier circuit. Q. 9 Q. Q. Q. (1st, 2nd...transistor transistor)......transistor transistor)......transistor (5th, 6th transistor) (3rd, 4th transistor) ...Current source, 11 to 18...Resistor, D,,D,...Diode. Electric sacrilege, boiling 1/, 1g, taming, DI, D2, Gui Ding-do, one shell, the supinated sphere, Fig. 1 (α) (shi) Fig.

Claims (1)

[Claims] First and second transistors whose emitters are commonly connected to form a differential pair, each having an input signal inputted to its base; third and fourth transistors each connected to the collector of the transistor, each collector side connected to a power supply voltage and the first and second output terminals via a resistor, and the base thereof each connected to ground via a diode; It has an emitter connected to the bases of the third and fourth transistors, and a collector connected to a power supply voltage, and each base is connected from the collector side of the third and fourth transistors to the first and fourth transistors. fifth and sixth transistors each receiving an output signal that is in phase with the input signal of the second transistor and has a small amplitude;
, the emitter follower is amplified by the sixth transistor, and the third,
An electronic circuit characterized in that the gain of the first and second transistors is at least less than 1 to reduce the mirror capacitance of the first and second transistors by respectively driving the fourth transistor.