JPH02268343A - Instruction frequency measuring system - Google Patents

Abstract

PURPOSE:To accurately measure the instruction frequency of a computer system with a simple circuit constitution by preliminarily determining the timing, at which program executed at present is temporarily interrupted in response to a sampling pulse, for each instruction and setting all of specific timings to the same length as instructions. CONSTITUTION:A specific sampling pulse 1 from a sampling pulse generating mechanism preliminarily determined for each instruction is inputted to an AND circuit 120, and AND between this pulse 1 and an instruction execution completion signal 2 inputted to the other input is operated. When AND in this circuit 120 is true, a timer interrupt latch 123 is set and an instruction frequency measuring routine is started. The sampling pulse 1 of each instruction is not automatically ignored when it does not coincide with the instruction execution completion signal 2, and the instruction frequency of the computer system is accurately measured by the simple circuit constitution.

Description

[Detailed Description of the Invention] [Table of Contents] Overview Industrial Application Fields Conventional Technology and Problems to be Solved by the Invention Means for Solving the Problems Action Examples Effects of the Invention [Summary] Information processing equipment, more limited Central processing unit (CPU)
Regarding an instruction frequency measurement method that measures which instructions are executed and how often in a program executed by A sampling pulse generation mechanism that periodically generates sampling pulses, a mechanism that temporarily interrupts the execution of a currently running program in response to the sampling pulse, and information on the point at which the program is interrupted. , an information processing device equipped with a mechanism for reading an instruction to be executed next from a main storage unit (MSU), and a mechanism for measuring the instruction frequency by decoding the read instruction word, In response, a means is provided to temporarily suspend the execution of the currently executing program at a specific timing predetermined for each instruction, and to make the specific timing the same length for all instructions. , based on the signal generated by the means, the mechanism for measuring the frequency of instructions is activated to measure the frequency of instruction execution.

[Industrial application field]

The present invention relates to an instruction frequency measurement method for measuring which instructions in a program executed by an information processing device, more specifically a central processing unit (CPU), are executed and how often.

Traditionally, in order to improve the processing power of computer systems, central processing units (
When a program is actually executed by a CPU (CPU), it is measured which instructions are executed and how often.

In this case, the amount of hardware is as small as possible, and
More precisely, there is a need for an instruction frequency measurement method that can measure the instruction execution frequency with less disturbance to the operating environment of a computer system.

[Prior art and problems to be solved by the invention] Fig. 2 is a diagram explaining a conventional instruction frequency measurement method, in which (a) shows an example of the overall configuration, and (b) shows an example of the program/status word. An example is shown in which (C) shows an example of an interrupt processing circuit using the sampling method, and (d) shows an operation time chart using the sampling method.

Conventional instruction frequency measurement methods can be roughly divided into two methods: a hardware method and a software (or firmware method).

(1) Hardware method Although not shown in the diagram, counters are implemented in hardware for the number of types of instructions whose execution frequency is to be measured at the same time, and each time the corresponding instruction is executed, the corresponding counter is counted up. At the end of program execution or at any other time,
The value of the counter is read and the instruction execution frequency is calculated.

Therefore, if you try to measure the execution frequency of all types of instructions that can be executed by a central processing unit (CPU), you will need a counter for the number of instructions, for example, around 200 instructions, and the amount of hardware will become enormous. There was a problem with putting it away.

On the other hand, if the number of counters is limited to a realistic number, for example, about 10, it is necessary to repeat the measurement about 20 times under the same environment, which not only increases the measurement time, but also
There was a problem in that it was difficult to reproduce the same environment depending on the content of the program.

(2) Software method (or firmware method) (see FIG. 2) Software method and firmware method are basically the same. That is, in the following explanation, if "program interrupt" is defined as "interruption to firmware" and "instruction frequency measurement routine" 22 is defined as "instruction frequency measurement firmware", then the explanation of the software method becomes the explanation of the firmware method. Furthermore, in the firmware method, instead of storing the data area for the counter on the main storage unit (MSU) 2, it may be stored on the local storage (LS) that can only be accessed by the firmware.

There are also two software methods: an instruction trace method and a sampling method.

(8) Instruction tracing method In FIG. 2(a), each time the central processing unit (CPU) l executes one instruction of the program 23, a program interrupt is generated in the instruction execution/interrupt control circuit 12, and the instruction frequency Control is passed to the measurement routine 22.

At the time of classification, the current program status word (P
SW) is the old program status word (OLD PSW)
) 21 and is stored at a fixed address on the main storage unit (MSU) 2.

The old program status word (hereinafter referred to as OLD PSW)
)21 contains the address of the next instruction to be executed.
(b) Shown in the instruction address portion (IA) of the program status word (PSW) in the figure.

The instruction frequency measurement routine 22 to which control is passed in the separate manner stores the OLD PS 21 (or the OLD PSW 21(7)) from the main storage unit (MSU) 2, and the OLD PSW 21(7)
The program 2 in the main memory device (MStl) 2 is read based on the "IA" section obtained from the "IA" section.
3, reads out the command word to be executed next.

Next, the instruction word is interpreted and the main memory (MSU) is stored in advance.
) 2, there are execution count record words for the number of instructions (
1 to n) 24 corresponding words are read out, incremented by +1, and re-stored in the same area.

In this method, every time one instruction is executed, an interrupt is executed.
Since the instruction frequency measurement routine 22 operates, there is a problem in that the overhead is large and the normal operating environment of the computer system is significantly disturbed.

Therefore, the result may be different from the instruction frequency in a normal operating environment.

(B) Sampling method Originally, the central processing unit (CPU) 1 of a computer system had a timer interrupt mechanism for the purpose of, for example, preferentially executing real-time processing.

In the sampling pulse generation mechanism 11, if an instruction is being executed at the time when the sampling pulse is generated, based on the sampling pulse (2) that is periodically generated, this is performed at the time when the execution of the instruction is completed, or during the execution of the instruction. If not, the mechanism immediately generates a program interrupt at that point and transfers control to the real-time processing.

Specifically, as shown in the figure (c), the sampling pulse (2) output from the sampling pulse generation mechanism 11 is once latched by the latch 121, waits for the instruction execution completion signal (2), and then the currently executed instruction is The logical product (8ND) circuit 122 performs a logical product with the instruction execution completion signal (2) indicating that the instruction has been completed, and the interrupt latch 123 is activated, thereby functioning to transfer control to the processing of the real-time interrupt routine. (
(d) Refer to the operation time chart in the figure) Therefore, the instruction frequency measurement using the sampling method uses the timer interrupt mechanism, and when the sampling pulse ■ is generated and the instruction being executed is completed, the instruction frequency measurement described above is performed. Ruled by routine 22? Make sure to pass lIl.

Since the program execution is sampled and the instruction execution frequency is measured, it does not match the actual instruction execution frequency, but by increasing the measurement time, the execution frequency is probability-wise very close to the actual instruction execution frequency. You can get the frequency,
In addition, since sampling is performed, there is little disturbance to the normal operating environment.

The processing contents executed by the instruction frequency measurement routine 22 at this time include the following two methods.

(B-1): A method of sampling the next instruction after the last executed instruction. Similar to the method (A) described above, based on the OLD PSW 21, the instruction word that should have been executed next is read and the 1 degree is added to the execution count record word (1 to n) 24 on the main storage unit (MSU) 2 corresponding to the command word.

In the Kono method, even if a branch instruction or an instruction to change the address mode is executed, the OLD PS 21 is for the branch destination or address mode change destination, so only the actually executed instruction is correct. Although it has the advantage of being counted, the probability is that sampling pulses will occur more often while executing instructions that take a long time to execute.
There is a problem in that an instruction immediately following the long-running instruction is measured at a higher frequency than the actual frequency, resulting in erroneous measurements.

(B-2): Method of sampling the last executed instruction The OLD PSW 21 includes the instruction immediately before the interrupt, that is,
Since it contains the length information of the last executed instruction (instruction length code (ILC) of ps- in figure (b)),
The instruction length code (“ILC”) of the immediately preceding instruction is determined from the value of the next instruction address (CIA) in PSw.
The address of the last executed instruction can be obtained by subtracting the value of .

Therefore, based on this address, the instruction word of the last executed instruction is stored in the program 2 of the main memory (MSII) 2.
3, and in the same manner as in (A) above, 1' is added to the contents of the execution count record word (1 to n) on the main storage unit (MSU) 2 corresponding to that instruction.

This method has the advantage of being able to measure the weighted instruction frequency by weighting the instruction execution time, since instructions with long execution times are sampled many times. When an instruction to change the address mode or the like is executed, the corresponding OLD PSW
As mentioned above, since 21 is the branch destination or address mode change destination, it is not possible to obtain the address of the last executed instruction, and if the instruction frequency is measured using the above method, an incorrect instruction (actually There is a fatal problem in counting instructions that are never executed.

In view of the above-mentioned conventional drawbacks, the present invention provides a method for measuring which instructions in a program executed by a central processing unit (CPU) of an information processing device is executed and how often, with a small amount of hardware. , and an instruction frequency measurement method that causes less disturbance to the operating environment of the computer system, that is, a method that samples the instruction following the last executed instruction, so that even if there is an instruction with a long execution time, the immediately following instruction It is an object of the present invention to provide a method for measuring the frequency of commands that does not measure the frequency higher than the actual frequency.

[Means to solve the problem]

The above problems are solved by the instruction frequency measurement method configured as follows.

A sampling pulse generation mechanism that periodically generates sampling pulses, a mechanism that temporarily interrupts the execution of the currently running program in response to the sampling pulse, and a system that determines what should be executed next based on the information at the time of interruption of the program. In an information processing device that is equipped with a mechanism for reading out an instruction from a main memory unit (MSU) and a mechanism for measuring the frequency of instructions by decoding the read instruction word, an information processing device is configured to read out an instruction currently being executed in response to the sampling pulse. Providing a means for temporarily suspending the execution of the program at a specific timing predetermined for each instruction, and making the specific timing the same length for all instructions, Based on the signal, the mechanism for measuring the frequency of commands is activated to measure the frequency of command execution.

[Effect]

Generally, there are a variety of instructions executed by a central processing unit (CPU) of an information processing device, ranging from basic instructions that complete execution in one machine cycle to complex instructions that take several tens of machine cycles. Furthermore, there are special instructions that take an extremely long execution time.

The probability that a certain instruction is being executed when a sampling pulse of a certain period occurs is given by the fact that the two events, the generation of the sampling pulse and the execution of the instruction, are independent.
It is proportional to the length of execution time of the instruction.

In addition, in the above-mentioned "B-1 method of sampling the next instruction after the last executed instruction", if a certain instruction is being executed at the time when the sampling pulse ■ is generated, as shown in FIG.
As is clear from the sampling method circuit in c) and the operation time chart in FIG. Upon completion of execution of the command,
Program interrupts are now generated.

In other words, interrupts are usually processed between instructions, and interrupt factors that occur during the execution of one instruction are suspended until the execution of that instruction is completed, and then processed. become.

Therefore, even in the instruction frequency measurement method that uses such an interrupt processing mechanism as is, the sampling method uses the separate interrupt processing mechanism, and thus operates as described above.

As a result, the longer the execution time of an instruction, the more frequently the instruction frequency measuring routine will be activated in proportion to the execution time. On the other hand, in the instruction frequency measurement routine based on the above-mentioned "B-1 method of sampling the instruction following the last executed instruction," the instruction following the last executed instruction is counted, and as a result, , a meaningless instruction frequency weighted by the length of execution time of a completely unrelated immediately preceding instruction is measured.

Therefore, in the present invention, an ``instruction frequency measurement method that samples the next instruction after the last executed instruction'', that is, the above-mentioned B
Focusing on the fact that the drawback of the -1 method is that the next instruction whose frequency is actually measured is weighted by the length of the execution time of the immediately preceding instruction, which is unrelated to the measurement of instruction frequency. (1) For all instructions, the reference to the sampling pulse ■ is limited to a specific timing that passes only once during the execution of each instruction, and (2) the sampling pulse ■ is limited to a specific timing other than the above-mentioned specific timing. If it occurs, ignore the sampling pulse, capture the sampling pulse only when it occurs at the specific timing, generate the same timer interrupt as before, and pass control to the instruction frequency measurement routine. do it like this.

(3) The length of the specific timing described above does not need to be limited to one machine cycle, but should be the same length for all instructions so that it is not affected by the instruction execution time.

(4) Examples of specific timing include the first cycle (or state) of instruction execution, the final cycle of execution, etc., which are unrelated to the execution time of each instruction, but usually the final cycle of instruction execution Since the cycle also determines the occurrence of an interrupt, it is effective to use the final cycle of the execution as the specific timing.

(5) As an example, when the above specific timing of 1 machine cycle is adopted for a central processing unit (CPU) whose average instruction execution time is 3 machine cycles, 273 of the sampling pulses will be wasted with probability. Therefore, in consideration of this, the period of the sampling pulse may be tripled, or the measurement time of the instruction frequency may be tripled.

This way, it works, so you can use less hardware.
In addition, the instruction frequency is measured using a sampling method that causes less disturbance to the operating environment of the computer system, and there is an effect that the instruction frequency can be accurately measured without being affected by the length of instruction execution time.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a diagram showing an embodiment of the present invention, (a) shows a configuration example, (bl) and (b2) show operation time charts, and FIG. 2 (a) shows an example of the configuration. The sampling pulse (■) with a constant period output from the sampling pulse generation mechanism 11 in the overall configuration example shown in FIG.
A means for performing a logical AND operation and setting the interrupt latch 123 is a means necessary to implement the present invention. Note that the same reference numerals indicate the same objects throughout the figures.

Hereinafter, the instruction frequency measuring method of the present invention will be explained with reference to FIG.

Even if the present invention is implemented, the basic operation of measuring the instruction frequency using the sampling method is not particularly different from the conventional method, so it will be omitted here. The following description focuses on the operation of generating a timer interrupt using a signal, for example, the instruction execution completion signal (2), and activating the instruction frequency measurement routine 22.

In this embodiment, as described above, the predetermined specific timing for each instruction is the most effective, for example, the cycle that determines the occurrence of an interrupt, and when the execution of each instruction is started. , the instruction execution completion signal ■ is always output regardless of the execution time of the instruction, but
Needless to say, it is not limited to this.

This instruction execution completion signal ■ and the sampling pulse ■ periodically output from the large sampling pulse generation mechanism 11 (see FIG. 2(a)) are connected to a logical product (AND) circuit 120.
When a match is found, the timer interrupt latch 123 is set and the conventionally used instruction frequency measuring routine 22 is activated. (See the operation time chart in Figure (b2).) Therefore, the specific timing of each instruction, that is, the sampling pulse (2) that does not match the instruction execution completion signal (2) is automatically ignored. (
(Refer to the operation time chart in the figure (bl)) As a result, a part of the sampling pulse (■) will be wasted, so as mentioned above, the cycle of the sampling pulse (■) may be shortened, or the frequency of the command may be measured. Correction processing such as extending the command frequency measurement time by routine 22 is required.

As described above, the present invention utilizes the timer interrupt mechanism originally provided in the computer system to save information on the main storage unit (MSU) when the currently executing program is interrupted by software means using the timer interrupt. OLD
PS-, in the instruction frequency measurement method that "samples the next instruction after the last executed instruction", it is actually measured by the execution time of the last executed instruction, which is unrelated to instruction frequency measurement. In order to prevent the frequency of instructions from being weighted, the specific timing when each instruction is executed, for example, the instruction execution completion signal, which is also the interrupt generation cycle.
The feature is that the sampling pulse (2) that coincides with is captured, the above-mentioned timer interrupt is generated, and the instruction frequency measurement routine is activated.

〔Effect of the invention〕

As described above in detail, the instruction frequency measurement method of the present invention measures which instructions in a program executed by the central processing unit (CPU) of an information processing device are executed and how often. a sampling pulse generation mechanism that periodically generates sampling pulses; a mechanism that temporarily interrupts execution of a currently running program in response to the sampling pulse; and information on the point at which the program is interrupted;
In an information processing device that is equipped with a mechanism that reads an instruction that should be executed next from a main storage unit (MSU), and a mechanism that decodes the read instruction word and measures the instruction frequency, the sampling pulse In response, a means is provided to temporarily suspend the execution of the currently executing program at a specific timing predetermined for each instruction, and to make the specific timing the same length for all instructions. , Based on the signal generated by the means, the mechanism for measuring the frequency of instructions is activated to measure the frequency of instruction execution, so that the amount of hardware is small and the operating environment of the computer system is By measuring the instruction frequency using a sampling method that causes less disturbance to the instruction, it is possible to accurately measure the instruction frequency without being affected by the length of the instruction execution time.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention. FIG. 2 is a diagram illustrating a conventional instruction frequency measurement method. It is. In the drawings, 1 is a central processing unit (CPU). 11 is a sampling pulse generation mechanism. 12 is an instruction execution/interrupt control circuit. 120.122 is a logical product (AND) circuit. 121.123 is a latch. 2 is the main storage unit (MSU). 21 is an old program status word (OLD 22 is an instruction frequency measurement routine. 23 is a program. 24 is an execution count record word (1 to nL). ■ indicates a sampling pulse. ■ indicates an instruction execution completion signal. PSW). Figure (Part 1)

Claims (1)

[Claims] A sampling pulse generation mechanism (11) that periodically generates a sampling pulse ([1]), and a temporary suspension of execution of a currently running program in response to the sampling pulse ([1]). and a mechanism (21, 12) that reads the next instruction to be executed from the main storage unit (MSU) (2) based on the information at the time the program was interrupted.
and a mechanism (12, 22, 24) for decoding the read instruction word and measuring the instruction frequency, the program currently being executed in response to the sampling pulse ([1]) A means ([2]) for temporarily suspending the execution of the instruction at a specific timing ([2]) predetermined for each instruction, and for making the specific timing ([2]) the same length for all instructions. 120), activating the mechanism (12, 22, 24) for measuring the frequency of commands based on the signal generated by the means (120);
An instruction frequency measurement method characterized by measuring instruction execution frequency.